#include <mach/machine.h>
#include <mach/processor.h>
#include <kern/kalloc.h>
#include <i386/cpu_affinity.h>
#include <i386/cpu_topology.h>
#include <i386/cpu_threads.h>
#include <i386/machine_cpu.h>
#include <i386/bit_routines.h>
#include <i386/cpu_data.h>
#include <i386/lapic.h>
#include <i386/machine_routines.h>
#include <stddef.h>
__private_extern__ void qsort(
void * array,
size_t nmembers,
size_t member_size,
int (*)(const void *, const void *));
static int lapicid_cmp(const void *x, const void *y);
static x86_affinity_set_t *find_cache_affinity(x86_cpu_cache_t *L2_cachep);
x86_affinity_set_t *x86_affinities = NULL;
static int x86_affinity_count = 0;
extern cpu_data_t cpshadows[];
#if DEVELOPMENT || DEBUG
void iotrace_init(int ncpus);
#endif
static void
cpu_shadow_sort(int ncpus)
{
for (int i = 0; i < ncpus; i++) {
cpu_data_t *cpup = cpu_datap(i);
ptrdiff_t coff = cpup - cpu_datap(0);
cpup->cd_shadow = &cpshadows[coff];
}
}
void
cpu_topology_sort(int ncpus)
{
int i;
boolean_t istate;
processor_t lprim = NULL;
assert(machine_info.physical_cpu == 1);
assert(machine_info.logical_cpu == 1);
assert(master_cpu == 0);
assert(cpu_number() == 0);
assert(cpu_datap(0)->cpu_number == 0);
istate = ml_set_interrupts_enabled(FALSE);
if (topo_dbg) {
TOPO_DBG("cpu_topology_start() %d cpu%s registered\n",
ncpus, (ncpus > 1) ? "s" : "");
for (i = 0; i < ncpus; i++) {
cpu_data_t *cpup = cpu_datap(i);
TOPO_DBG("\tcpu_data[%d]:%p local apic 0x%x\n",
i, (void *) cpup, cpup->cpu_phys_number);
}
}
if (ncpus > 1) {
qsort((void *) &cpu_data_ptr[1],
ncpus - 1,
sizeof(cpu_data_t *),
lapicid_cmp);
}
if (topo_dbg) {
TOPO_DBG("cpu_topology_start() after sorting:\n");
for (i = 0; i < ncpus; i++) {
cpu_data_t *cpup = cpu_datap(i);
TOPO_DBG("\tcpu_data[%d]:%p local apic 0x%x\n",
i, (void *) cpup, cpup->cpu_phys_number);
}
}
for (i = 0; i < ncpus; i++) {
cpu_data_t *cpup = cpu_datap(i);
if (cpup->cpu_number != i) {
kprintf("cpu_datap(%d):%p local apic id 0x%x "
"remapped from %d\n",
i, cpup, cpup->cpu_phys_number,
cpup->cpu_number);
}
cpup->cpu_number = i;
lapic_cpu_map(cpup->cpu_phys_number, i);
x86_set_logical_topology(&cpup->lcpu, cpup->cpu_phys_number, i);
}
cpu_shadow_sort(ncpus);
x86_validate_topology();
ml_set_interrupts_enabled(istate);
TOPO_DBG("cpu_topology_start() LLC is L%d\n", topoParms.LLCDepth + 1);
#if DEVELOPMENT || DEBUG
iotrace_init(ncpus);
#endif
topoParms.stable = TRUE;
pmCPUStateInit();
TOPO_DBG("cpu_topology_start() creating affinity sets:\n");
for (i = 0; i < ncpus; i++) {
cpu_data_t *cpup = cpu_datap(i);
x86_lcpu_t *lcpup = cpu_to_lcpu(i);
x86_cpu_cache_t *LLC_cachep;
x86_affinity_set_t *aset;
LLC_cachep = lcpup->caches[topoParms.LLCDepth];
assert(LLC_cachep->type == CPU_CACHE_TYPE_UNIF);
aset = find_cache_affinity(LLC_cachep);
if (aset == NULL) {
aset = (x86_affinity_set_t *) kalloc(sizeof(*aset));
if (aset == NULL) {
panic("cpu_topology_start() failed aset alloc");
}
aset->next = x86_affinities;
x86_affinities = aset;
aset->num = x86_affinity_count++;
aset->cache = LLC_cachep;
aset->pset = (i == master_cpu) ?
processor_pset(master_processor) :
pset_create(pset_node_root());
if (aset->pset == PROCESSOR_SET_NULL) {
panic("cpu_topology_start: pset_create");
}
TOPO_DBG("\tnew set %p(%d) pset %p for cache %p\n",
aset, aset->num, aset->pset, aset->cache);
}
TOPO_DBG("\tprocessor_init set %p(%d) lcpup %p(%d) cpu %p processor %p\n",
aset, aset->num, lcpup, lcpup->cpu_num, cpup, cpup->cpu_processor);
if (i != master_cpu) {
processor_init(cpup->cpu_processor, i, aset->pset);
}
if (lcpup->core->num_lcpus > 1) {
if (lcpup->lnum == 0) {
lprim = cpup->cpu_processor;
}
processor_set_primary(cpup->cpu_processor, lprim);
}
}
}
kern_return_t
cpu_topology_start_cpu( int cpunum )
{
int ncpus = machine_info.max_cpus;
int i = cpunum;
TOPO_DBG("cpu_topology_start() processor_start():\n");
if (i < ncpus) {
TOPO_DBG("\tlcpu %d\n", cpu_datap(i)->cpu_number);
processor_start(cpu_datap(i)->cpu_processor);
return KERN_SUCCESS;
} else {
return KERN_FAILURE;
}
}
static int
lapicid_cmp(const void *x, const void *y)
{
cpu_data_t *cpu_x = *((cpu_data_t **)(uintptr_t)x);
cpu_data_t *cpu_y = *((cpu_data_t **)(uintptr_t)y);
TOPO_DBG("lapicid_cmp(%p,%p) (%d,%d)\n",
x, y, cpu_x->cpu_phys_number, cpu_y->cpu_phys_number);
if (cpu_x->cpu_phys_number < cpu_y->cpu_phys_number) {
return -1;
}
if (cpu_x->cpu_phys_number == cpu_y->cpu_phys_number) {
return 0;
}
return 1;
}
static x86_affinity_set_t *
find_cache_affinity(x86_cpu_cache_t *l2_cachep)
{
x86_affinity_set_t *aset;
for (aset = x86_affinities; aset != NULL; aset = aset->next) {
if (l2_cachep == aset->cache) {
break;
}
}
return aset;
}
int
ml_get_max_affinity_sets(void)
{
return x86_affinity_count;
}
processor_set_t
ml_affinity_to_pset(uint32_t affinity_num)
{
x86_affinity_set_t *aset;
for (aset = x86_affinities; aset != NULL; aset = aset->next) {
if (affinity_num == aset->num) {
break;
}
}
return (aset == NULL) ? PROCESSOR_SET_NULL : aset->pset;
}
uint64_t
ml_cpu_cache_size(unsigned int level)
{
x86_cpu_cache_t *cachep;
if (level == 0) {
return machine_info.max_mem;
} else if (1 <= level && level <= MAX_CACHE_DEPTH) {
cachep = current_cpu_datap()->lcpu.caches[level - 1];
return cachep ? cachep->cache_size : 0;
} else {
return 0;
}
}
uint64_t
ml_cpu_cache_sharing(unsigned int level)
{
x86_cpu_cache_t *cachep;
if (level == 0) {
return machine_info.max_cpus;
} else if (1 <= level && level <= MAX_CACHE_DEPTH) {
cachep = current_cpu_datap()->lcpu.caches[level - 1];
return cachep ? cachep->nlcpus : 0;
} else {
return 0;
}
}
#if DEVELOPMENT || DEBUG
volatile int mmiotrace_enabled = 1;
int iotrace_generators = 0;
int iotrace_entries_per_cpu = 0;
int *iotrace_next;
iotrace_entry_t **iotrace_ring;
void
init_iotrace_bufs(int cpucnt, int entries_per_cpu)
{
int i;
iotrace_next = kalloc_tag(cpucnt * sizeof(int), VM_KERN_MEMORY_DIAG);
if (__improbable(iotrace_next == NULL)) {
iotrace_generators = 0;
return;
} else {
bzero(iotrace_next, cpucnt * sizeof(int));
}
iotrace_ring = kalloc_tag(cpucnt * sizeof(iotrace_entry_t *), VM_KERN_MEMORY_DIAG);
if (__improbable(iotrace_ring == NULL)) {
kfree(iotrace_next, cpucnt * sizeof(int));
iotrace_generators = 0;
return;
}
for (i = 0; i < cpucnt; i++) {
iotrace_ring[i] = kalloc_tag(entries_per_cpu * sizeof(iotrace_entry_t), VM_KERN_MEMORY_DIAG);
if (__improbable(iotrace_ring[i] == NULL)) {
kfree(iotrace_next, cpucnt * sizeof(int));
iotrace_next = NULL;
for (int j = 0; j < i; j++) {
kfree(iotrace_ring[j], entries_per_cpu * sizeof(iotrace_entry_t));
}
kfree(iotrace_ring, cpucnt * sizeof(iotrace_entry_t *));
iotrace_ring = NULL;
return;
}
bzero(iotrace_ring[i], entries_per_cpu * sizeof(iotrace_entry_t));
}
iotrace_entries_per_cpu = entries_per_cpu;
iotrace_generators = cpucnt;
}
void
iotrace_init(int ncpus)
{
int iot, epc;
int entries_per_cpu;
if (PE_parse_boot_argn("iotrace", &iot, sizeof(iot))) {
mmiotrace_enabled = iot;
}
if (mmiotrace_enabled == 0) {
return;
}
if (PE_parse_boot_argn("iotrace_epc", &epc, sizeof(epc)) &&
epc >= 1 && epc <= IOTRACE_MAX_ENTRIES_PER_CPU) {
entries_per_cpu = epc;
} else {
entries_per_cpu = DEFAULT_IOTRACE_ENTRIES_PER_CPU;
}
init_iotrace_bufs(ncpus, entries_per_cpu);
}
#endif