pe_clock_speed_asm.s [plain text]
/*
* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* The contents of this file constitute Original Code as defined in and
* are subject to the Apple Public Source License Version 1.1 (the
* "License"). You may not use this file except in compliance with the
* License. Please obtain a copy of the License at
* http://www.apple.com/publicsource and read it before using this file.
*
* This Original Code and all software distributed under the License are
* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
* License for the specific language governing rights and limitations
* under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* clock_speed_asm.s - Uses the Via timer, decrementer, and counter
* to determine the clock and bus rates.
*
* (c) Apple Computer, Inc. 1998-9
*
* Writen by: Josh de Cesare
*
*/
#include <ppc/asm.h>
// constants for the via
#define CountLow 0x800
#define CountHigh 0xa00
#define LatchLow 0xc00
#define LatchHigh 0xe00
// void pe_run_clock_test(clock_test_data *data)
//
// data points to the base address of the via and two longs
// for storing the via and dec results.
//
// The basic idea is this...
// Use the counter register to execute a loop that will take
// 10,000,000 processor clocks. Time it using both the via counter
// and the time base. Return the number of ticks for both so the
// raw values for processor and bus speed can be calculated.
ENTRY(pe_run_clock_test, TAG_NO_FRAME_USED)
li r4, 1 lwz r9, 0(r3) L_again:
mtctr r5 stb r5, CountLow(r9) stb r5, CountHigh(r9)
eieio
mftb r10
L_loop:
addi r5, r5, 1 addi r5, r5, 3
addi r5, r5, 4
addi r5, r5, 5
addi r5, r5, 6
addi r5, r5, 7
addi r5, r5, 8
bdnz L_loop
sync
mftb r5 eieio
lbz r7, CountLow(r9)
eieio
lbz r8, CountHigh(r9)
eieio
cmpi cr0, r4, 1
li r4, 0 oris r5, r5, 0x13
b L_again
L_finish_up:
cmpi cr0, r7, 0
mr r6, r8 L_use_H1:
rlwimi r7, r6, 8, 16, 23
not r6, r7 stw r6, 4(r3) sub r5, r5, r10
blr