#include <mach_rt.h>
#include <mach_kdb.h>
#include <mach_kdp.h>
#include <mach_ldebug.h>
#include <gprof.h>
#include <mach/mach_types.h>
#include <mach/kern_return.h>
#include <kern/kern_types.h>
#include <kern/startup.h>
#include <kern/timer_queue.h>
#include <kern/processor.h>
#include <kern/cpu_number.h>
#include <kern/cpu_data.h>
#include <kern/assert.h>
#include <kern/machine.h>
#include <kern/pms.h>
#include <kern/misc_protos.h>
#include <kern/etimer.h>
#include <vm/vm_map.h>
#include <vm/vm_kern.h>
#include <profiling/profile-mk.h>
#include <i386/proc_reg.h>
#include <i386/cpu_threads.h>
#include <i386/mp_desc.h>
#include <i386/misc_protos.h>
#include <i386/trap.h>
#include <i386/postcode.h>
#include <i386/machine_routines.h>
#include <i386/mp.h>
#include <i386/mp_events.h>
#include <i386/lapic.h>
#include <i386/ipl.h>
#include <i386/cpuid.h>
#include <i386/fpu.h>
#include <i386/machine_cpu.h>
#include <i386/mtrr.h>
#include <i386/pmCPU.h>
#if CONFIG_MCA
#include <i386/machine_check.h>
#endif
#include <i386/acpi.h>
#include <chud/chud_xnu.h>
#include <chud/chud_xnu_private.h>
#include <sys/kdebug.h>
#if MACH_KDB
#include <machine/db_machdep.h>
#include <ddb/db_aout.h>
#include <ddb/db_access.h>
#include <ddb/db_sym.h>
#include <ddb/db_variables.h>
#include <ddb/db_command.h>
#include <ddb/db_output.h>
#include <ddb/db_expr.h>
#endif
#if MP_DEBUG
#define PAUSE delay(1000000)
#define DBG(x...) kprintf(x)
#else
#define DBG(x...)
#define PAUSE
#endif
#define ABS(v) (((v) > 0)?(v):-(v))
void slave_boot_init(void);
#if MACH_KDB
static void mp_kdb_wait(void);
volatile boolean_t mp_kdb_trap = FALSE;
volatile long mp_kdb_ncpus = 0;
#endif
static void mp_kdp_wait(boolean_t flush, boolean_t isNMI);
static void mp_rendezvous_action(void);
static void mp_broadcast_action(void);
static boolean_t cpu_signal_pending(int cpu, mp_event_t event);
static int cpu_signal_handler(x86_saved_state_t *regs);
static int NMIInterruptHandler(x86_saved_state_t *regs);
boolean_t smp_initialized = FALSE;
uint32_t TSC_sync_margin = 0xFFF;
volatile boolean_t force_immediate_debugger_NMI = FALSE;
volatile boolean_t pmap_tlb_flush_timeout = FALSE;
decl_simple_lock_data(,mp_kdp_lock);
decl_lck_mtx_data(static, mp_cpu_boot_lock);
lck_mtx_ext_t mp_cpu_boot_lock_ext;
decl_simple_lock_data(,mp_rv_lock);
static void (*mp_rv_setup_func)(void *arg);
static void (*mp_rv_action_func)(void *arg);
static void (*mp_rv_teardown_func)(void *arg);
static void *mp_rv_func_arg;
static volatile int mp_rv_ncpus;
static volatile long mp_rv_entry __attribute__((aligned(64)));
static volatile long mp_rv_exit __attribute__((aligned(64)));
static volatile long mp_rv_complete __attribute__((aligned(64)));
volatile uint64_t debugger_entry_time;
volatile uint64_t debugger_exit_time;
#if MACH_KDP
static struct _kdp_xcpu_call_func {
kdp_x86_xcpu_func_t func;
void *arg0, *arg1;
volatile long ret;
volatile uint16_t cpu;
} kdp_xcpu_call_func = {
.cpu = KDP_XCPU_NONE
};
#endif
static void (*mp_bc_action_func)(void *arg);
static void *mp_bc_func_arg;
static int mp_bc_ncpus;
static volatile long mp_bc_count;
decl_lck_mtx_data(static, mp_bc_lock);
lck_mtx_ext_t mp_bc_lock_ext;
static volatile int debugger_cpu = -1;
static void mp_cpus_call_action(void);
static void mp_call_PM(void);
char mp_slave_stack[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE)));
#if GPROF
struct profile_vars _profile_vars;
struct profile_vars *_profile_vars_cpus[MAX_CPUS] = { &_profile_vars };
#define GPROF_INIT() \
{ \
int i; \
\
\
for (i = 1; i < MAX_CPUS; i++) \
_profile_vars_cpus[i] = &_profile_vars; \
}
#else
#define GPROF_INIT()
#endif
static lck_grp_t smp_lck_grp;
static lck_grp_attr_t smp_lck_grp_attr;
extern void slave_pstart(void);
void
smp_init(void)
{
simple_lock_init(&mp_kdp_lock, 0);
simple_lock_init(&mp_rv_lock, 0);
lck_grp_attr_setdefault(&smp_lck_grp_attr);
lck_grp_init(&smp_lck_grp, "i386_smp", &smp_lck_grp_attr);
lck_mtx_init_ext(&mp_cpu_boot_lock, &mp_cpu_boot_lock_ext, &smp_lck_grp, LCK_ATTR_NULL);
lck_mtx_init_ext(&mp_bc_lock, &mp_bc_lock_ext, &smp_lck_grp, LCK_ATTR_NULL);
console_init();
if (!lapic_probe())
return;
lapic_init();
lapic_configure();
lapic_set_intr_func(LAPIC_NMI_INTERRUPT, NMIInterruptHandler);
lapic_set_intr_func(LAPIC_VECTOR(INTERPROCESSOR), cpu_signal_handler);
cpu_thread_init();
GPROF_INIT();
DBGLOG_CPU_INIT(master_cpu);
install_real_mode_bootstrap(slave_pstart);
if (PE_parse_boot_argn("TSC_sync_margin",
&TSC_sync_margin, sizeof(TSC_sync_margin)))
kprintf("TSC sync Margin 0x%x\n", TSC_sync_margin);
smp_initialized = TRUE;
return;
}
typedef struct {
int target_cpu;
int target_lapic;
int starter_cpu;
} processor_start_info_t;
static processor_start_info_t start_info __attribute__((aligned(64)));
static volatile long tsc_entry_barrier __attribute__((aligned(64)));
static volatile long tsc_exit_barrier __attribute__((aligned(64)));
static volatile uint64_t tsc_target __attribute__((aligned(64)));
static void
mp_wait_for_cpu_up(int slot_num, unsigned int iters, unsigned int usecdelay)
{
while (iters-- > 0) {
if (cpu_datap(slot_num)->cpu_running)
break;
delay(usecdelay);
}
}
kern_return_t
intel_startCPU_fast(int slot_num)
{
kern_return_t rc;
rc = pmCPUExitHalt(slot_num);
if (rc != KERN_SUCCESS)
return(rc);
mp_disable_preemption();
mp_wait_for_cpu_up(slot_num, 30000, 1);
mp_enable_preemption();
if (cpu_datap(slot_num)->cpu_running)
return(KERN_SUCCESS);
else
return(KERN_FAILURE);
}
static void
started_cpu(void)
{
if (TSC_sync_margin &&
start_info.target_cpu == cpu_number()) {
tsc_target = 0;
atomic_decl(&tsc_entry_barrier, 1);
while (tsc_entry_barrier != 0)
;
tsc_target = rdtsc64();
atomic_decl(&tsc_exit_barrier, 1);
}
}
static void
start_cpu(void *arg)
{
int i = 1000;
processor_start_info_t *psip = (processor_start_info_t *) arg;
if (cpu_number() != psip->starter_cpu)
return;
LAPIC_WRITE(ICRD, psip->target_lapic << LAPIC_ICRD_DEST_SHIFT);
LAPIC_WRITE(ICR, LAPIC_ICR_DM_INIT);
delay(100);
LAPIC_WRITE(ICRD, psip->target_lapic << LAPIC_ICRD_DEST_SHIFT);
LAPIC_WRITE(ICR, LAPIC_ICR_DM_STARTUP|(REAL_MODE_BOOTSTRAP_OFFSET>>12));
#ifdef POSTCODE_DELAY
i *= 10000;
#endif
mp_wait_for_cpu_up(psip->target_cpu, i*100, 100);
if (TSC_sync_margin &&
cpu_datap(psip->target_cpu)->cpu_running) {
uint64_t tsc_starter;
int64_t tsc_delta;
atomic_decl(&tsc_entry_barrier, 1);
while (tsc_entry_barrier != 0)
;
tsc_starter = rdtsc64();
atomic_decl(&tsc_exit_barrier, 1);
while (tsc_exit_barrier != 0)
;
tsc_delta = tsc_target - tsc_starter;
kprintf("TSC sync for cpu %d: 0x%016llx delta 0x%llx (%lld)\n",
psip->target_cpu, tsc_target, tsc_delta, tsc_delta);
if (ABS(tsc_delta) > (int64_t) TSC_sync_margin) {
#if DEBUG
panic(
#else
printf(
#endif
"Unsynchronized TSC for cpu %d: "
"0x%016llx, delta 0x%llx\n",
psip->target_cpu, tsc_target, tsc_delta);
}
}
}
extern char prot_mode_gdt[];
extern char slave_boot_base[];
extern char real_mode_bootstrap_base[];
extern char real_mode_bootstrap_end[];
extern char slave_boot_end[];
kern_return_t
intel_startCPU(
int slot_num)
{
int lapic = cpu_to_lapic[slot_num];
boolean_t istate;
assert(lapic != -1);
DBGLOG_CPU_INIT(slot_num);
DBG("intel_startCPU(%d) lapic_id=%d\n", slot_num, lapic);
DBG("IdlePTD(%p): 0x%x\n", &IdlePTD, (int) IdlePTD);
if (cpu_mode_is64bit())
cpu_desc_init64(cpu_datap(slot_num));
else
cpu_desc_init(cpu_datap(slot_num));
lck_mtx_lock(&mp_cpu_boot_lock);
istate = ml_set_interrupts_enabled(FALSE);
if (slot_num == get_cpu_number()) {
ml_set_interrupts_enabled(istate);
lck_mtx_unlock(&mp_cpu_boot_lock);
return KERN_SUCCESS;
}
start_info.starter_cpu = cpu_number();
start_info.target_cpu = slot_num;
start_info.target_lapic = lapic;
tsc_entry_barrier = 2;
tsc_exit_barrier = 2;
mp_rendezvous_no_intrs(start_cpu, (void *) &start_info);
start_info.target_cpu = 0;
ml_set_interrupts_enabled(istate);
lck_mtx_unlock(&mp_cpu_boot_lock);
if (!cpu_datap(slot_num)->cpu_running) {
kprintf("Failed to start CPU %02d\n", slot_num);
printf("Failed to start CPU %02d, rebooting...\n", slot_num);
delay(1000000);
halt_cpu();
return KERN_SUCCESS;
} else {
kprintf("Started cpu %d (lapic id %08x)\n", slot_num, lapic);
return KERN_SUCCESS;
}
}
#if MP_DEBUG
cpu_signal_event_log_t *cpu_signal[MAX_CPUS];
cpu_signal_event_log_t *cpu_handle[MAX_CPUS];
MP_EVENT_NAME_DECL();
#endif
int
cpu_signal_handler(x86_saved_state_t *regs)
{
int my_cpu;
volatile int *my_word;
#if MACH_KDB && MACH_ASSERT
int i=100;
#endif
mp_disable_preemption();
my_cpu = cpu_number();
my_word = ¤t_cpu_datap()->cpu_signals;
do {
#if MACH_KDB && MACH_ASSERT
if (i-- <= 0)
Debugger("cpu_signal_handler: signals did not clear");
#endif
#if MACH_KDP
if (i_bit(MP_KDP, my_word)) {
DBGLOG(cpu_handle,my_cpu,MP_KDP);
i_bit_clear(MP_KDP, my_word);
sync_iss_to_iks(regs);
mp_kdp_wait(TRUE, FALSE);
} else
#endif
if (i_bit(MP_TLB_FLUSH, my_word)) {
DBGLOG(cpu_handle,my_cpu,MP_TLB_FLUSH);
i_bit_clear(MP_TLB_FLUSH, my_word);
pmap_update_interrupt();
} else if (i_bit(MP_AST, my_word)) {
DBGLOG(cpu_handle,my_cpu,MP_AST);
i_bit_clear(MP_AST, my_word);
ast_check(cpu_to_processor(my_cpu));
#if MACH_KDB
} else if (i_bit(MP_KDB, my_word)) {
i_bit_clear(MP_KDB, my_word);
current_cpu_datap()->cpu_kdb_is_slave++;
mp_kdb_wait();
current_cpu_datap()->cpu_kdb_is_slave--;
#endif
} else if (i_bit(MP_RENDEZVOUS, my_word)) {
DBGLOG(cpu_handle,my_cpu,MP_RENDEZVOUS);
i_bit_clear(MP_RENDEZVOUS, my_word);
mp_rendezvous_action();
} else if (i_bit(MP_BROADCAST, my_word)) {
DBGLOG(cpu_handle,my_cpu,MP_BROADCAST);
i_bit_clear(MP_BROADCAST, my_word);
mp_broadcast_action();
} else if (i_bit(MP_CHUD, my_word)) {
DBGLOG(cpu_handle,my_cpu,MP_CHUD);
i_bit_clear(MP_CHUD, my_word);
chudxnu_cpu_signal_handler();
} else if (i_bit(MP_CALL, my_word)) {
DBGLOG(cpu_handle,my_cpu,MP_CALL);
i_bit_clear(MP_CALL, my_word);
mp_cpus_call_action();
} else if (i_bit(MP_CALL_PM, my_word)) {
DBGLOG(cpu_handle,my_cpu,MP_CALL_PM);
i_bit_clear(MP_CALL_PM, my_word);
mp_call_PM();
}
} while (*my_word);
mp_enable_preemption();
return 0;
}
static int
NMIInterruptHandler(x86_saved_state_t *regs)
{
void *stackptr;
sync_iss_to_iks_unconditionally(regs);
#if defined (__i386__)
__asm__ volatile("movl %%ebp, %0" : "=m" (stackptr));
#elif defined (__x86_64__)
__asm__ volatile("movq %%rbp, %0" : "=m" (stackptr));
#endif
if (cpu_number() == debugger_cpu)
goto NMExit;
if (pmap_tlb_flush_timeout == TRUE && current_cpu_datap()->cpu_tlb_invalid) {
char pstr[128];
snprintf(&pstr[0], sizeof(pstr), "Panic(CPU %d): Unresponsive processor\n", cpu_number());
panic_i386_backtrace(stackptr, 16, &pstr[0], TRUE, regs);
}
#if MACH_KDP
mp_kdp_wait(FALSE, pmap_tlb_flush_timeout);
#endif
NMExit:
return 1;
}
#ifdef MP_DEBUG
int max_lock_loops = 100000000;
int trappedalready = 0;
#endif
static void
i386_cpu_IPI(int cpu)
{
boolean_t state;
#ifdef MP_DEBUG
if(cpu_datap(cpu)->cpu_signals & 6) {
kprintf("i386_cpu_IPI: sending enter debugger signal (%08X) to cpu %d\n", cpu_datap(cpu)->cpu_signals, cpu);
}
#endif
#if MACH_KDB
#ifdef MP_DEBUG
if(!trappedalready && (cpu_datap(cpu)->cpu_signals & 6)) {
if(kdb_cpu != cpu_number()) {
trappedalready = 1;
panic("i386_cpu_IPI: sending enter debugger signal (%08X) to cpu %d and I do not own debugger, owner = %08X\n",
cpu_datap(cpu)->cpu_signals, cpu, kdb_cpu);
}
}
#endif
#endif
#ifdef MP_DEBUG
int pending_busy_count = 0;
while (LAPIC_READ(ICR) & LAPIC_ICR_DS_PENDING) {
if (++pending_busy_count > max_lock_loops)
panic("i386_cpu_IPI() deadlock\n");
#else
while (LAPIC_READ(ICR) & LAPIC_ICR_DS_PENDING) {
#endif
cpu_pause();
}
state = ml_set_interrupts_enabled(FALSE);
LAPIC_WRITE(ICRD, cpu_to_lapic[cpu] << LAPIC_ICRD_DEST_SHIFT);
LAPIC_WRITE(ICR, LAPIC_VECTOR(INTERPROCESSOR) | LAPIC_ICR_DM_FIXED);
(void) ml_set_interrupts_enabled(state);
}
void
cpu_interrupt(int cpu)
{
if (smp_initialized
&& pmCPUExitIdle(cpu_datap(cpu))) {
i386_cpu_IPI(cpu);
}
}
void
cpu_NMI_interrupt(int cpu)
{
boolean_t state;
if (smp_initialized) {
state = ml_set_interrupts_enabled(FALSE);
LAPIC_WRITE(ICRD, cpu_to_lapic[cpu] << LAPIC_ICRD_DEST_SHIFT);
LAPIC_WRITE(ICR, LAPIC_VECTOR(INTERPROCESSOR)|LAPIC_ICR_DM_NMI);
(void) ml_set_interrupts_enabled(state);
}
}
static void (* volatile mp_PM_func)(void) = NULL;
static void
mp_call_PM(void)
{
assert(!ml_get_interrupts_enabled());
if (mp_PM_func != NULL)
mp_PM_func();
}
void
cpu_PM_interrupt(int cpu)
{
assert(!ml_get_interrupts_enabled());
if (mp_PM_func != NULL) {
if (cpu == cpu_number())
mp_PM_func();
else
i386_signal_cpu(cpu, MP_CALL_PM, ASYNC);
}
}
void
PM_interrupt_register(void (*fn)(void))
{
mp_PM_func = fn;
}
void
i386_signal_cpu(int cpu, mp_event_t event, mp_sync_t mode)
{
volatile int *signals = &cpu_datap(cpu)->cpu_signals;
uint64_t tsc_timeout;
if (!cpu_datap(cpu)->cpu_running)
return;
if (event == MP_TLB_FLUSH)
KERNEL_DEBUG(0xef800020 | DBG_FUNC_START, cpu, 0, 0, 0, 0);
DBGLOG(cpu_signal, cpu, event);
i_bit_set(event, signals);
i386_cpu_IPI(cpu);
if (mode == SYNC) {
again:
tsc_timeout = rdtsc64() + (1000*1000*1000);
while (i_bit(event, signals) && rdtsc64() < tsc_timeout) {
cpu_pause();
}
if (i_bit(event, signals)) {
DBG("i386_signal_cpu(%d, 0x%x, SYNC) timed out\n",
cpu, event);
goto again;
}
}
if (event == MP_TLB_FLUSH)
KERNEL_DEBUG(0xef800020 | DBG_FUNC_END, cpu, 0, 0, 0, 0);
}
void
i386_signal_cpus(mp_event_t event, mp_sync_t mode)
{
unsigned int cpu;
unsigned int my_cpu = cpu_number();
assert(hw_lock_held((hw_lock_t)&x86_topo_lock));
for (cpu = 0; cpu < real_ncpus; cpu++) {
if (cpu == my_cpu || !cpu_datap(cpu)->cpu_running)
continue;
i386_signal_cpu(cpu, event, mode);
}
}
int
i386_active_cpus(void)
{
unsigned int cpu;
unsigned int ncpus = 0;
assert(hw_lock_held((hw_lock_t)&x86_topo_lock));
for (cpu = 0; cpu < real_ncpus; cpu++) {
if (cpu_datap(cpu)->cpu_running)
ncpus++;
}
return(ncpus);
}
static void
mp_rendezvous_action(void)
{
boolean_t intrs_enabled;
if (mp_rv_setup_func != NULL)
mp_rv_setup_func(mp_rv_func_arg);
intrs_enabled = ml_get_interrupts_enabled();
atomic_incl(&mp_rv_entry, 1);
while (mp_rv_entry < mp_rv_ncpus) {
if (!intrs_enabled)
handle_pending_TLB_flushes();
cpu_pause();
}
if (mp_rv_action_func != NULL)
mp_rv_action_func(mp_rv_func_arg);
atomic_incl(&mp_rv_exit, 1);
while (mp_rv_exit < mp_rv_ncpus) {
if (!intrs_enabled)
handle_pending_TLB_flushes();
cpu_pause();
}
if (mp_rv_teardown_func != NULL)
mp_rv_teardown_func(mp_rv_func_arg);
atomic_incl(&mp_rv_complete, 1);
}
void
mp_rendezvous(void (*setup_func)(void *),
void (*action_func)(void *),
void (*teardown_func)(void *),
void *arg)
{
if (!smp_initialized) {
if (setup_func != NULL)
setup_func(arg);
if (action_func != NULL)
action_func(arg);
if (teardown_func != NULL)
teardown_func(arg);
return;
}
simple_lock(&mp_rv_lock);
mp_rv_setup_func = setup_func;
mp_rv_action_func = action_func;
mp_rv_teardown_func = teardown_func;
mp_rv_func_arg = arg;
mp_rv_entry = 0;
mp_rv_exit = 0;
mp_rv_complete = 0;
simple_lock(&x86_topo_lock);
mp_rv_ncpus = i386_active_cpus();
i386_signal_cpus(MP_RENDEZVOUS, ASYNC);
simple_unlock(&x86_topo_lock);
mp_rendezvous_action();
while (mp_rv_complete < mp_rv_ncpus) {
cpu_pause();
}
mp_rv_setup_func = NULL;
mp_rv_action_func = NULL;
mp_rv_teardown_func = NULL;
mp_rv_func_arg = NULL;
simple_unlock(&mp_rv_lock);
}
void
mp_rendezvous_break_lock(void)
{
simple_lock_init(&mp_rv_lock, 0);
}
static void
setup_disable_intrs(__unused void * param_not_used)
{
boolean_t intr = ml_set_interrupts_enabled(FALSE);
current_cpu_datap()->cpu_iflag = intr;
DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__);
}
static void
teardown_restore_intrs(__unused void * param_not_used)
{
ml_set_interrupts_enabled(current_cpu_datap()->cpu_iflag);
DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__);
}
void
mp_rendezvous_no_intrs(
void (*action_func)(void *),
void *arg)
{
mp_rendezvous(setup_disable_intrs,
action_func,
teardown_restore_intrs,
arg);
}
void
handle_pending_TLB_flushes(void)
{
volatile int *my_word = ¤t_cpu_datap()->cpu_signals;
if (i_bit(MP_TLB_FLUSH, my_word)) {
DBGLOG(cpu_handle, cpu_number(), MP_TLB_FLUSH);
i_bit_clear(MP_TLB_FLUSH, my_word);
pmap_update_interrupt();
}
}
static void
mp_cpus_call_action(void)
{
if (mp_rv_action_func != NULL)
mp_rv_action_func(mp_rv_func_arg);
atomic_incl(&mp_rv_complete, 1);
}
cpu_t
mp_cpus_call(
cpumask_t cpus,
mp_sync_t mode,
void (*action_func)(void *),
void *arg)
{
cpu_t cpu;
boolean_t intrs_enabled = ml_get_interrupts_enabled();
boolean_t call_self = FALSE;
if (!smp_initialized) {
if ((cpus & CPUMASK_SELF) == 0)
return 0;
if (action_func != NULL) {
(void) ml_set_interrupts_enabled(FALSE);
action_func(arg);
ml_set_interrupts_enabled(intrs_enabled);
}
return 1;
}
simple_lock(&mp_rv_lock);
mp_rv_action_func = action_func;
mp_rv_func_arg = arg;
mp_rv_ncpus = 0;
mp_rv_complete = 0;
simple_lock(&x86_topo_lock);
for (cpu = 0; cpu < (cpu_t) real_ncpus; cpu++) {
if (((cpu_to_cpumask(cpu) & cpus) == 0) ||
!cpu_datap(cpu)->cpu_running)
continue;
if (cpu == (cpu_t) cpu_number()) {
call_self = TRUE;
if (mode == SYNC && action_func != NULL) {
(void) ml_set_interrupts_enabled(FALSE);
action_func(arg);
ml_set_interrupts_enabled(intrs_enabled);
}
} else {
mp_rv_ncpus++;
i386_signal_cpu(cpu, MP_CALL, ASYNC);
if (mode == SYNC) {
simple_unlock(&x86_topo_lock);
while (mp_rv_complete < mp_rv_ncpus) {
if (!intrs_enabled)
handle_pending_TLB_flushes();
cpu_pause();
}
simple_lock(&x86_topo_lock);
}
}
}
simple_unlock(&x86_topo_lock);
if (mode == ASYNC) {
if (call_self && action_func != NULL) {
(void) ml_set_interrupts_enabled(FALSE);
action_func(arg);
ml_set_interrupts_enabled(intrs_enabled);
}
while (mp_rv_complete < mp_rv_ncpus) {
if (!intrs_enabled)
handle_pending_TLB_flushes();
cpu_pause();
}
}
cpu = mp_rv_ncpus + (call_self ? 1 : 0);
simple_unlock(&mp_rv_lock);
return cpu;
}
static void
mp_broadcast_action(void)
{
if (mp_bc_action_func != NULL)
mp_bc_action_func(mp_bc_func_arg);
if (atomic_decl_and_test(&mp_bc_count, 1))
thread_wakeup(((event_t)(uintptr_t) &mp_bc_count));
}
void
mp_broadcast(
void (*action_func)(void *),
void *arg)
{
if (!smp_initialized) {
if (action_func != NULL)
action_func(arg);
return;
}
lck_mtx_lock(&mp_bc_lock);
mp_bc_action_func = action_func;
mp_bc_func_arg = arg;
assert_wait((event_t)(uintptr_t)&mp_bc_count, THREAD_UNINT);
simple_lock(&x86_topo_lock);
mp_bc_ncpus = i386_active_cpus();
mp_bc_count = mp_bc_ncpus;
i386_signal_cpus(MP_BROADCAST, ASYNC);
mp_broadcast_action();
simple_unlock(&x86_topo_lock);
if (mp_bc_ncpus > 1)
thread_block(THREAD_CONTINUE_NULL);
else
clear_wait(current_thread(), THREAD_AWAKENED);
lck_mtx_unlock(&mp_bc_lock);
}
void
i386_activate_cpu(void)
{
cpu_data_t *cdp = current_cpu_datap();
assert(!ml_get_interrupts_enabled());
if (!smp_initialized) {
cdp->cpu_running = TRUE;
return;
}
simple_lock(&x86_topo_lock);
cdp->cpu_running = TRUE;
started_cpu();
simple_unlock(&x86_topo_lock);
}
extern void etimer_timer_expire(void *arg);
void
i386_deactivate_cpu(void)
{
cpu_data_t *cdp = current_cpu_datap();
assert(!ml_get_interrupts_enabled());
simple_lock(&x86_topo_lock);
cdp->cpu_running = FALSE;
simple_unlock(&x86_topo_lock);
timer_queue_shutdown(&cdp->rtclock_timer.queue);
cdp->rtclock_timer.deadline = EndOfAllTime;
mp_cpus_call(cpu_to_cpumask(master_cpu), ASYNC, etimer_timer_expire, NULL);
if (i_bit(MP_RENDEZVOUS, &cdp->cpu_signals))
mp_rendezvous_action();
if (i_bit(MP_BROADCAST, &cdp->cpu_signals))
mp_broadcast_action();
if (i_bit(MP_CALL, &cdp->cpu_signals))
mp_cpus_call_action();
cdp->cpu_signals = 0;
}
int pmsafe_debug = 1;
#if MACH_KDP
volatile boolean_t mp_kdp_trap = FALSE;
volatile unsigned long mp_kdp_ncpus;
boolean_t mp_kdp_state;
void
mp_kdp_enter(void)
{
unsigned int cpu;
unsigned int ncpus;
unsigned int my_cpu;
uint64_t tsc_timeout;
DBG("mp_kdp_enter()\n");
mp_kdp_state = ml_set_interrupts_enabled(FALSE);
simple_lock(&mp_kdp_lock);
debugger_entry_time = mach_absolute_time();
if (pmsafe_debug)
pmSafeMode(¤t_cpu_datap()->lcpu, PM_SAFE_FL_SAFE);
while (mp_kdp_trap) {
simple_unlock(&mp_kdp_lock);
DBG("mp_kdp_enter() race lost\n");
#if MACH_KDP
mp_kdp_wait(TRUE, FALSE);
#endif
simple_lock(&mp_kdp_lock);
}
my_cpu = cpu_number();
debugger_cpu = my_cpu;
mp_kdp_ncpus = 1;
mp_kdp_trap = TRUE;
simple_unlock(&mp_kdp_lock);
DBG("mp_kdp_enter() signaling other processors\n");
if (force_immediate_debugger_NMI == FALSE) {
for (ncpus = 1, cpu = 0; cpu < real_ncpus; cpu++) {
if (cpu == my_cpu || !cpu_datap(cpu)->cpu_running)
continue;
ncpus++;
i386_signal_cpu(cpu, MP_KDP, ASYNC);
}
DBG("mp_kdp_enter() waiting for (%d) processors to suspend\n", ncpus);
tsc_timeout = rdtsc64() + (ncpus * 1000 * 1000);
while (mp_kdp_ncpus != ncpus && rdtsc64() < tsc_timeout) {
handle_pending_TLB_flushes();
cpu_pause();
}
if (mp_kdp_ncpus != ncpus) {
for (cpu = 0; cpu < real_ncpus; cpu++) {
if (cpu == my_cpu || !cpu_datap(cpu)->cpu_running)
continue;
if (cpu_signal_pending(cpu, MP_KDP))
cpu_NMI_interrupt(cpu);
}
}
}
else
for (cpu = 0; cpu < real_ncpus; cpu++) {
if (cpu == my_cpu || !cpu_datap(cpu)->cpu_running)
continue;
cpu_NMI_interrupt(cpu);
}
DBG("mp_kdp_enter() %u processors done %s\n",
mp_kdp_ncpus, (mp_kdp_ncpus == ncpus) ? "OK" : "timed out");
postcode(MP_KDP_ENTER);
}
static boolean_t
cpu_signal_pending(int cpu, mp_event_t event)
{
volatile int *signals = &cpu_datap(cpu)->cpu_signals;
boolean_t retval = FALSE;
if (i_bit(event, signals))
retval = TRUE;
return retval;
}
long kdp_x86_xcpu_invoke(const uint16_t lcpu, kdp_x86_xcpu_func_t func,
void *arg0, void *arg1)
{
if (lcpu > (real_ncpus - 1))
return -1;
if (func == NULL)
return -1;
kdp_xcpu_call_func.func = func;
kdp_xcpu_call_func.ret = -1;
kdp_xcpu_call_func.arg0 = arg0;
kdp_xcpu_call_func.arg1 = arg1;
kdp_xcpu_call_func.cpu = lcpu;
DBG("Invoking function %p on CPU %d\n", func, (int32_t)lcpu);
while (kdp_xcpu_call_func.cpu != KDP_XCPU_NONE)
cpu_pause();
return kdp_xcpu_call_func.ret;
}
static void
kdp_x86_xcpu_poll(void)
{
if ((uint16_t)cpu_number() == kdp_xcpu_call_func.cpu) {
kdp_xcpu_call_func.ret =
kdp_xcpu_call_func.func(kdp_xcpu_call_func.arg0,
kdp_xcpu_call_func.arg1,
cpu_number());
kdp_xcpu_call_func.cpu = KDP_XCPU_NONE;
}
}
static void
mp_kdp_wait(boolean_t flush, boolean_t isNMI)
{
DBG("mp_kdp_wait()\n");
panic_io_port_read();
#if CONFIG_MCA
mca_check_save();
#endif
if (pmsafe_debug)
pmSafeMode(¤t_cpu_datap()->lcpu, PM_SAFE_FL_SAFE);
atomic_incl((volatile long *)&mp_kdp_ncpus, 1);
while (mp_kdp_trap || (isNMI == TRUE)) {
if (flush)
handle_pending_TLB_flushes();
kdp_x86_xcpu_poll();
cpu_pause();
}
if (pmsafe_debug)
pmSafeMode(¤t_cpu_datap()->lcpu, PM_SAFE_FL_NORMAL);
atomic_decl((volatile long *)&mp_kdp_ncpus, 1);
DBG("mp_kdp_wait() done\n");
}
void
mp_kdp_exit(void)
{
DBG("mp_kdp_exit()\n");
debugger_cpu = -1;
atomic_decl((volatile long *)&mp_kdp_ncpus, 1);
debugger_exit_time = mach_absolute_time();
mp_kdp_trap = FALSE;
__asm__ volatile("mfence");
DBG("mp_kdp_exit() waiting for processors to resume\n");
while (mp_kdp_ncpus > 0) {
handle_pending_TLB_flushes();
cpu_pause();
}
if (pmsafe_debug)
pmSafeMode(¤t_cpu_datap()->lcpu, PM_SAFE_FL_NORMAL);
DBG("mp_kdp_exit() done\n");
(void) ml_set_interrupts_enabled(mp_kdp_state);
postcode(0);
}
#endif
boolean_t
mp_recent_debugger_activity() {
return (((mach_absolute_time() - debugger_entry_time) < LastDebuggerEntryAllowance) ||
((mach_absolute_time() - debugger_exit_time) < LastDebuggerEntryAllowance));
}
void
init_ast_check(
__unused processor_t processor)
{
}
void
cause_ast_check(
processor_t processor)
{
int cpu = processor->cpu_id;
if (cpu != cpu_number()) {
i386_signal_cpu(cpu, MP_AST, ASYNC);
}
}
#if MACH_KDB
void
remote_kdb(void)
{
unsigned int my_cpu = cpu_number();
unsigned int cpu;
int kdb_ncpus;
uint64_t tsc_timeout = 0;
mp_kdb_trap = TRUE;
mp_kdb_ncpus = 1;
for (kdb_ncpus = 1, cpu = 0; cpu < real_ncpus; cpu++) {
if (cpu == my_cpu || !cpu_datap(cpu)->cpu_running)
continue;
kdb_ncpus++;
i386_signal_cpu(cpu, MP_KDB, ASYNC);
}
DBG("remote_kdb() waiting for (%d) processors to suspend\n",kdb_ncpus);
tsc_timeout = rdtsc64() + (kdb_ncpus * 100 * 1000 * 1000);
while (mp_kdb_ncpus != kdb_ncpus && rdtsc64() < tsc_timeout) {
handle_pending_TLB_flushes();
cpu_pause();
}
DBG("mp_kdp_enter() %d processors done %s\n",
mp_kdb_ncpus, (mp_kdb_ncpus == kdb_ncpus) ? "OK" : "timed out");
}
static void
mp_kdb_wait(void)
{
DBG("mp_kdb_wait()\n");
panic_io_port_read();
atomic_incl(&mp_kdb_ncpus, 1);
while (mp_kdb_trap) {
handle_pending_TLB_flushes();
cpu_pause();
}
atomic_decl((volatile long *)&mp_kdb_ncpus, 1);
DBG("mp_kdb_wait() done\n");
}
void
clear_kdb_intr(void)
{
mp_disable_preemption();
i_bit_clear(MP_KDB, ¤t_cpu_datap()->cpu_signals);
mp_enable_preemption();
}
void
mp_kdb_exit(void)
{
DBG("mp_kdb_exit()\n");
atomic_decl((volatile long *)&mp_kdb_ncpus, 1);
mp_kdb_trap = FALSE;
__asm__ volatile("mfence");
while (mp_kdb_ncpus > 0) {
handle_pending_TLB_flushes();
cpu_pause();
}
DBG("mp_kdb_exit() done\n");
}
#endif
void
slave_machine_init(void *param)
{
DBG("slave_machine_init() CPU%d\n", get_cpu_number());
if (param == FULL_SLAVE_INIT) {
clock_init();
cpu_machine_init();
}
}
#undef cpu_number
int cpu_number(void)
{
return get_cpu_number();
}
#if MACH_KDB
#include <ddb/db_output.h>
#define TRAP_DEBUG 0
#if TRAP_DEBUG
#define MTRAPS 100
struct mp_trap_hist_struct {
unsigned char type;
unsigned char data[5];
} trap_hist[MTRAPS], *cur_trap_hist = trap_hist,
*max_trap_hist = &trap_hist[MTRAPS];
void db_trap_hist(void);
void
db_trap_hist(void)
{
int i,j;
for(i=0;i<MTRAPS;i++)
if (trap_hist[i].type == 1 || trap_hist[i].type == 2) {
db_printf("%s%s",
(&trap_hist[i]>=cur_trap_hist)?"*":" ",
(trap_hist[i].type == 1)?"SPL":"INT");
for(j=0;j<5;j++)
db_printf(" %02x", trap_hist[i].data[j]);
db_printf("\n");
}
}
#endif
#endif