SubtargetEmitter.cpp [plain text]
#include "SubtargetEmitter.h"
#include "CodeGenTarget.h"
#include "Record.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/Debug.h"
#include <algorithm>
using namespace llvm;
void SubtargetEmitter::Enumeration(raw_ostream &OS,
const char *ClassName,
bool isBits) {
std::vector<Record*> DefList = Records.getAllDerivedDefinitions(ClassName);
std::sort(DefList.begin(), DefList.end(), LessRecord());
OS << "enum {\n";
for (unsigned i = 0, N = DefList.size(); i < N;) {
Record *Def = DefList[i];
OS << " " << Def->getName();
if (isBits) OS << " = " << " 1 << " << i;
if (++i < N) OS << ",";
OS << "\n";
}
OS << "};\n";
}
void SubtargetEmitter::FeatureKeyValues(raw_ostream &OS) {
std::vector<Record*> FeatureList =
Records.getAllDerivedDefinitions("SubtargetFeature");
std::sort(FeatureList.begin(), FeatureList.end(), LessRecordFieldName());
OS << "// Sorted (by key) array of values for CPU features.\n"
<< "static const llvm::SubtargetFeatureKV FeatureKV[] = {\n";
for (unsigned i = 0, N = FeatureList.size(); i < N; ++i) {
Record *Feature = FeatureList[i];
const std::string &Name = Feature->getName();
const std::string &CommandLineName = Feature->getValueAsString("Name");
const std::string &Desc = Feature->getValueAsString("Desc");
if (CommandLineName.empty()) continue;
OS << " { "
<< "\"" << CommandLineName << "\", "
<< "\"" << Desc << "\", "
<< Name << ", ";
const std::vector<Record*> &ImpliesList =
Feature->getValueAsListOfDefs("Implies");
if (ImpliesList.empty()) {
OS << "0";
} else {
for (unsigned j = 0, M = ImpliesList.size(); j < M;) {
OS << ImpliesList[j]->getName();
if (++j < M) OS << " | ";
}
}
OS << " }";
if ((i + 1) < N) OS << ",";
OS << "\n";
}
OS << "};\n";
OS<<"\nenum {\n";
OS<<" FeatureKVSize = sizeof(FeatureKV)/sizeof(llvm::SubtargetFeatureKV)\n";
OS<<"};\n";
}
void SubtargetEmitter::CPUKeyValues(raw_ostream &OS) {
std::vector<Record*> ProcessorList =
Records.getAllDerivedDefinitions("Processor");
std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
OS << "// Sorted (by key) array of values for CPU subtype.\n"
<< "static const llvm::SubtargetFeatureKV SubTypeKV[] = {\n";
for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
Record *Processor = ProcessorList[i];
const std::string &Name = Processor->getValueAsString("Name");
const std::vector<Record*> &FeatureList =
Processor->getValueAsListOfDefs("Features");
OS << " { "
<< "\"" << Name << "\", "
<< "\"Select the " << Name << " processor\", ";
if (FeatureList.empty()) {
OS << "0";
} else {
for (unsigned j = 0, M = FeatureList.size(); j < M;) {
OS << FeatureList[j]->getName();
if (++j < M) OS << " | ";
}
}
OS << ", 0 }";
if (++i < N) OS << ",";
OS << "\n";
}
OS << "};\n";
OS<<"\nenum {\n";
OS<<" SubTypeKVSize = sizeof(SubTypeKV)/sizeof(llvm::SubtargetFeatureKV)\n";
OS<<"};\n";
}
unsigned SubtargetEmitter::CollectAllItinClasses(raw_ostream &OS,
std::map<std::string, unsigned> &ItinClassesMap) {
std::vector<Record*> ItinClassList =
Records.getAllDerivedDefinitions("InstrItinClass");
std::sort(ItinClassList.begin(), ItinClassList.end(), LessRecord());
unsigned N = ItinClassList.size();
for (unsigned i = 0; i < N; i++) {
const Record *ItinClass = ItinClassList[i];
ItinClassesMap[ItinClass->getName()] = i;
}
OS<<"\nenum {\n";
OS<<" ItinClassesSize = " << N << "\n";
OS<<"};\n";
return N;
}
void SubtargetEmitter::FormItineraryStageString(Record *ItinData,
std::string &ItinString,
unsigned &NStages) {
const std::vector<Record*> &StageList =
ItinData->getValueAsListOfDefs("Stages");
unsigned N = NStages = StageList.size();
for (unsigned i = 0; i < N;) {
const Record *Stage = StageList[i];
int Cycles = Stage->getValueAsInt("Cycles");
ItinString += " { " + itostr(Cycles) + ", ";
const std::vector<Record*> &UnitList = Stage->getValueAsListOfDefs("Units");
for (unsigned j = 0, M = UnitList.size(); j < M;) {
ItinString += UnitList[j]->getName();
if (++j < M) ItinString += " | ";
}
int TimeInc = Stage->getValueAsInt("TimeInc");
ItinString += ", " + itostr(TimeInc);
ItinString += " }";
if (++i < N) ItinString += ", ";
}
}
void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData,
std::string &ItinString, unsigned &NOperandCycles) {
const std::vector<int64_t> &OperandCycleList =
ItinData->getValueAsListOfInts("OperandCycles");
unsigned N = NOperandCycles = OperandCycleList.size();
for (unsigned i = 0; i < N;) {
const int OCycle = OperandCycleList[i];
ItinString += " " + itostr(OCycle);
if (++i < N) ItinString += ", ";
}
}
void SubtargetEmitter::EmitStageAndOperandCycleData(raw_ostream &OS,
unsigned NItinClasses,
std::map<std::string, unsigned> &ItinClassesMap,
std::vector<std::vector<InstrItinerary> > &ProcList) {
std::vector<Record*> ProcItinList =
Records.getAllDerivedDefinitions("ProcessorItineraries");
if (ProcItinList.size() < 2) return;
std::string StageTable = "static const llvm::InstrStage Stages[] = {\n";
StageTable += " { 0, 0, 0 }, // No itinerary\n";
std::string OperandCycleTable = "static const unsigned OperandCycles[] = {\n";
OperandCycleTable += " 0, // No itinerary\n";
unsigned StageCount = 1, OperandCycleCount = 1;
unsigned ItinStageEnum = 1, ItinOperandCycleEnum = 1;
std::map<std::string, unsigned> ItinStageMap, ItinOperandCycleMap;
for (unsigned i = 0, N = ProcItinList.size(); i < N; i++) {
Record *Proc = ProcItinList[i];
const std::string &Name = Proc->getName();
if (Name == "NoItineraries") continue;
std::vector<InstrItinerary> ItinList;
ItinList.resize(NItinClasses);
std::vector<Record*> ItinDataList = Proc->getValueAsListOfDefs("IID");
for (unsigned j = 0, M = ItinDataList.size(); j < M; j++) {
Record *ItinData = ItinDataList[j];
std::string ItinStageString;
unsigned NStages;
FormItineraryStageString(ItinData, ItinStageString, NStages);
std::string ItinOperandCycleString;
unsigned NOperandCycles;
FormItineraryOperandCycleString(ItinData, ItinOperandCycleString,
NOperandCycles);
unsigned FindStage = 0;
if (NStages > 0) {
FindStage = ItinStageMap[ItinStageString];
if (FindStage == 0) {
StageTable += ItinStageString + ", // " + itostr(ItinStageEnum) + "\n";
ItinStageMap[ItinStageString] = FindStage = StageCount;
StageCount += NStages;
ItinStageEnum++;
}
}
unsigned FindOperandCycle = 0;
if (NOperandCycles > 0) {
FindOperandCycle = ItinOperandCycleMap[ItinOperandCycleString];
if (FindOperandCycle == 0) {
OperandCycleTable += ItinOperandCycleString + ", // " +
itostr(ItinOperandCycleEnum) + "\n";
ItinOperandCycleMap[ItinOperandCycleString] =
FindOperandCycle = OperandCycleCount;
OperandCycleCount += NOperandCycles;
ItinOperandCycleEnum++;
}
}
InstrItinerary Intinerary = { FindStage, FindStage + NStages,
FindOperandCycle, FindOperandCycle + NOperandCycles};
const std::string &Name = ItinData->getValueAsDef("TheClass")->getName();
unsigned Find = ItinClassesMap[Name];
ItinList[Find] = Intinerary;
}
ProcList.push_back(ItinList);
}
StageTable += " { 0, 0, 0 } // End itinerary\n";
StageTable += "};\n";
OperandCycleTable += " 0 // End itinerary\n";
OperandCycleTable += "};\n";
OS << StageTable;
OS << OperandCycleTable;
OS<<"\nenum {\n";
OS<<" StagesSize = sizeof(Stages)/sizeof(llvm::InstrStage),\n";
OS<<" OperandCyclesSize = sizeof(OperandCycles)/sizeof(unsigned)\n";
OS<<"};\n";
}
void SubtargetEmitter::EmitProcessorData(raw_ostream &OS,
std::vector<std::vector<InstrItinerary> > &ProcList) {
std::vector<std::vector<InstrItinerary> >::iterator
ProcListIter = ProcList.begin();
std::vector<Record*> Itins =
Records.getAllDerivedDefinitions("ProcessorItineraries");
for (unsigned i = 0, N = Itins.size(); i < N; i++) {
Record *Itin = Itins[i];
const std::string &Name = Itin->getName();
if (Name == "NoItineraries") continue;
OS << "\n";
OS << "static const llvm::InstrItinerary " << Name << "[] = {\n";
std::vector<InstrItinerary> &ItinList = *ProcListIter++;
for (unsigned j = 0, M = ItinList.size(); j < M; ++j) {
InstrItinerary &Intinerary = ItinList[j];
if (Intinerary.FirstStage == 0) {
OS << " { 0, 0, 0, 0 }";
} else {
OS << " { " << Intinerary.FirstStage << ", " <<
Intinerary.LastStage << ", " <<
Intinerary.FirstOperandCycle << ", " <<
Intinerary.LastOperandCycle << " }";
}
OS << ", // " << j << "\n";
}
OS << " { ~0U, ~0U, ~0U, ~0U } // end marker\n";
OS << "};\n";
}
}
void SubtargetEmitter::EmitProcessorLookup(raw_ostream &OS) {
std::vector<Record*> ProcessorList =
Records.getAllDerivedDefinitions("Processor");
std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
OS << "\n";
OS << "// Sorted (by key) array of itineraries for CPU subtype.\n"
<< "static const llvm::SubtargetInfoKV ProcItinKV[] = {\n";
for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
Record *Processor = ProcessorList[i];
const std::string &Name = Processor->getValueAsString("Name");
const std::string &ProcItin =
Processor->getValueAsDef("ProcItin")->getName();
OS << " { "
<< "\"" << Name << "\", "
<< "(void *)&" << ProcItin;
OS << " }";
if (++i < N) OS << ",";
OS << "\n";
}
OS << "};\n";
OS<<"\nenum {\n";
OS<<" ProcItinKVSize = sizeof(ProcItinKV)/"
"sizeof(llvm::SubtargetInfoKV)\n";
OS<<"};\n";
}
void SubtargetEmitter::EmitData(raw_ostream &OS) {
std::map<std::string, unsigned> ItinClassesMap;
std::vector<std::vector<InstrItinerary> > ProcList;
unsigned NItinClasses = CollectAllItinClasses(OS, ItinClassesMap);
HasItineraries = NItinClasses != 1;
if (HasItineraries) {
EmitStageAndOperandCycleData(OS, NItinClasses, ItinClassesMap, ProcList);
EmitProcessorData(OS, ProcList);
EmitProcessorLookup(OS);
}
}
void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS) {
std::vector<Record*> Features =
Records.getAllDerivedDefinitions("SubtargetFeature");
std::sort(Features.begin(), Features.end(), LessRecord());
OS << "// ParseSubtargetFeatures - Parses features string setting specified\n"
<< "// subtarget options.\n"
<< "std::string llvm::";
OS << Target;
OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
<< " const std::string &CPU) {\n"
<< " DEBUG(dbgs() << \"\\nFeatures:\" << FS);\n"
<< " DEBUG(dbgs() << \"\\nCPU:\" << CPU);\n"
<< " SubtargetFeatures Features(FS);\n"
<< " Features.setCPUIfNone(CPU);\n"
<< " uint32_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
<< " FeatureKV, FeatureKVSize);\n";
for (unsigned i = 0; i < Features.size(); i++) {
Record *R = Features[i];
const std::string &Instance = R->getName();
const std::string &Value = R->getValueAsString("Value");
const std::string &Attribute = R->getValueAsString("Attribute");
if (Value=="true" || Value=="false")
OS << " if ((Bits & " << Instance << ") != 0) "
<< Attribute << " = " << Value << ";\n";
else
OS << " if ((Bits & " << Instance << ") != 0 && " << Attribute <<
" < " << Value << ") " << Attribute << " = " << Value << ";\n";
}
if (HasItineraries) {
OS << "\n"
<< " InstrItinerary *Itinerary = (InstrItinerary *)"
<< "Features.getInfo(ProcItinKV, ProcItinKVSize);\n"
<< " InstrItins = InstrItineraryData(Stages, OperandCycles, Itinerary);\n";
}
OS << " return Features.getCPU();\n"
<< "}\n";
}
void SubtargetEmitter::run(raw_ostream &OS) {
Target = CodeGenTarget().getName();
EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
OS << "#include \"llvm/Support/Debug.h\"\n";
OS << "#include \"llvm/Support/raw_ostream.h\"\n";
OS << "#include \"llvm/Target/SubtargetFeature.h\"\n";
OS << "#include \"llvm/Target/TargetInstrItineraries.h\"\n\n";
Enumeration(OS, "FuncUnit", true);
OS<<"\n";
Enumeration(OS, "SubtargetFeature", true);
OS<<"\n";
FeatureKeyValues(OS);
OS<<"\n";
CPUKeyValues(OS);
OS<<"\n";
EmitData(OS);
OS<<"\n";
ParseFeaturesFunction(OS);
}