HexagonAsmPrinter.cpp [plain text]
#define DEBUG_TYPE "asm-printer"
#include "Hexagon.h"
#include "HexagonTargetMachine.h"
#include "HexagonSubtarget.h"
#include "HexagonMachineFunctionInfo.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Module.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/Mangler.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
static cl::opt<bool> AlignCalls(
"hexagon-align-calls", cl::Hidden, cl::init(true),
cl::desc("Insert falign after call instruction for Hexagon target"));
namespace {
class HexagonAsmPrinter : public AsmPrinter {
const HexagonSubtarget *Subtarget;
public:
explicit HexagonAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
: AsmPrinter(TM, Streamer) {
Subtarget = &TM.getSubtarget<HexagonSubtarget>();
}
virtual const char *getPassName() const {
return "Hexagon Assembly Printer";
}
void printInstruction(const MachineInstr *MI, raw_ostream &O);
virtual void EmitInstruction(const MachineInstr *MI);
void printOp(const MachineOperand &MO, raw_ostream &O);
void printRegister(const MachineOperand &MO, bool R0AsZero,
raw_ostream &O) {
unsigned RegNo = MO.getReg();
assert(TargetRegisterInfo::isPhysicalRegister(RegNo) && "Not physreg??");
O << getRegisterName(RegNo);
}
void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &OS) {
const MachineOperand &MO = MI->getOperand(OpNo);
if (MO.isReg()) {
printRegister(MO, false, OS);
} else if (MO.isImm()) {
OS << MO.getImm();
} else {
printOp(MO, OS);
}
}
bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const;
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &OS);
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &OS);
void printHexagonImmOperand(const MachineInstr *MI, unsigned OpNo,
raw_ostream &O) {
int value = MI->getOperand(OpNo).getImm();
O << value;
}
void printHexagonNegImmOperand(const MachineInstr *MI, unsigned OpNo,
raw_ostream &O) {
int value = MI->getOperand(OpNo).getImm();
O << -value;
}
void printHexagonMEMriOperand(const MachineInstr *MI, unsigned OpNo,
raw_ostream &O) {
const MachineOperand &MO1 = MI->getOperand(OpNo);
const MachineOperand &MO2 = MI->getOperand(OpNo+1);
O << getRegisterName(MO1.getReg())
<< " + #"
<< (int) MO2.getImm();
}
void printHexagonFrameIndexOperand(const MachineInstr *MI, unsigned OpNo,
raw_ostream &O) {
const MachineOperand &MO1 = MI->getOperand(OpNo);
const MachineOperand &MO2 = MI->getOperand(OpNo+1);
O << getRegisterName(MO1.getReg())
<< ", #"
<< MO2.getImm();
}
void printBranchOperand(const MachineInstr *MI, unsigned OpNo,
raw_ostream &O) {
if (MI->getOperand(OpNo).isImm()) {
O << "$+" << MI->getOperand(OpNo).getImm()*4;
} else {
printOp(MI->getOperand(OpNo), O);
}
}
void printCallOperand(const MachineInstr *MI, unsigned OpNo,
raw_ostream &O) {
}
void printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo,
raw_ostream &O) {
}
void printSymbolHi(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) {
O << "#HI(";
if (MI->getOperand(OpNo).isImm()) {
printHexagonImmOperand(MI, OpNo, O);
} else {
printOp(MI->getOperand(OpNo), O);
}
O << ")";
}
void printSymbolLo(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) {
O << "#HI(";
if (MI->getOperand(OpNo).isImm()) {
printHexagonImmOperand(MI, OpNo, O);
} else {
printOp(MI->getOperand(OpNo), O);
}
O << ")";
}
void printPredicateOperand(const MachineInstr *MI, unsigned OpNo,
raw_ostream &O);
void printAddrModeBasePlusOffset(const MachineInstr *MI, int OpNo,
raw_ostream &O);
void printGlobalOperand(const MachineInstr *MI, int OpNo, raw_ostream &O);
void printJumpTable(const MachineInstr *MI, int OpNo, raw_ostream &O);
void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0) const;
static const char *getRegisterName(unsigned RegNo);
};
}
#include "HexagonGenAsmWriter.inc"
void HexagonAsmPrinter::EmitAlignment(unsigned NumBits,
const GlobalValue *GV) const {
if (!GV) {
OutStreamer.EmitRawText(StringRef("\t.falign"));
return;
}
AsmPrinter::EmitAlignment(NumBits, GV);
}
void HexagonAsmPrinter::printOp(const MachineOperand &MO, raw_ostream &O) {
switch (MO.getType()) {
case MachineOperand::MO_Immediate:
dbgs() << "printOp() does not handle immediate values\n";
abort();
return;
case MachineOperand::MO_MachineBasicBlock:
O << *MO.getMBB()->getSymbol();
return;
case MachineOperand::MO_JumpTableIndex:
O << *GetJTISymbol(MO.getIndex());
return;
case MachineOperand::MO_ConstantPoolIndex:
O << *GetCPISymbol(MO.getIndex());
return;
case MachineOperand::MO_ExternalSymbol:
O << *GetExternalSymbolSymbol(MO.getSymbolName());
return;
case MachineOperand::MO_GlobalAddress: {
O << *Mang->getSymbol(MO.getGlobal());
printOffset(MO.getOffset(), O);
return;
}
default:
O << "<unknown operand type: " << MO.getType() << ">";
return;
}
}
bool HexagonAsmPrinter::
isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
if (MBB->hasAddressTaken()) {
return false;
}
return AsmPrinter::isBlockOnlyReachableByFallthrough(MBB);
}
bool HexagonAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant,
const char *ExtraCode,
raw_ostream &OS) {
if (ExtraCode && ExtraCode[0]) {
if (ExtraCode[1] != 0) return true;
switch (ExtraCode[0]) {
default: return true; case 'c': printOperand(MI, OpNo, OS);
return false;
case 'L': if (!MI->getOperand(OpNo).isReg() ||
OpNo+1 == MI->getNumOperands() ||
!MI->getOperand(OpNo+1).isReg())
return true;
++OpNo; break;
case 'I':
if (MI->getOperand(OpNo).isImm())
OS << "i";
return false;
}
}
printOperand(MI, OpNo, OS);
return false;
}
bool HexagonAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
unsigned OpNo, unsigned AsmVariant,
const char *ExtraCode,
raw_ostream &O) {
if (ExtraCode && ExtraCode[0])
return true;
const MachineOperand &Base = MI->getOperand(OpNo);
const MachineOperand &Offset = MI->getOperand(OpNo+1);
if (Base.isReg())
printOperand(MI, OpNo, O);
else
assert(0 && "Unimplemented");
if (Offset.isImm()) {
if (Offset.getImm())
O << " + #" << Offset.getImm();
}
else
assert(0 && "Unimplemented");
return false;
}
void HexagonAsmPrinter::printPredicateOperand(const MachineInstr *MI,
unsigned OpNo,
raw_ostream &O) {
assert(0 && "Unimplemented");
}
void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
SmallString<128> Str;
raw_svector_ostream O(Str);
const MachineFunction* MF = MI->getParent()->getParent();
const HexagonMachineFunctionInfo* MFI =
(const HexagonMachineFunctionInfo*)
MF->getInfo<HexagonMachineFunctionInfo>();
if (MFI->isStartPacket(MI)) {
O << "\t{" << '\n';
}
DEBUG( O << "// MI = " << *MI << '\n';);
O << "\t";
if (MI->getOpcode() == Hexagon::ENDLOOP0) {
if (MFI->isEndPacket(MI) && MFI->isStartPacket(MI)) {
O << "\t{ nop }";
} else {
O << "}";
}
printInstruction(MI, O);
} else if (MI->getOpcode() == Hexagon::STriwt) {
O << "\tmemw(";
printHexagonMEMriOperand(MI, 0, O);
O << ") = ";
unsigned SubRegNum =
TM.getRegisterInfo()->getSubReg(MI->getOperand(2)
.getReg(), Hexagon::subreg_loreg);
const char *SubRegName = getRegisterName(SubRegNum);
O << SubRegName << '\n';
} else if (MI->getOpcode() == Hexagon::MPYI_rin) {
printOperand(MI, 0, O);
O << " =- mpyi(";
printOperand(MI, 1, O);
O << ", #";
printHexagonNegImmOperand(MI, 2, O);
O << ")";
} else if (MI->getOpcode() == Hexagon::MEMw_ADDSUBi_indexed_MEM_V4) {
O << "\tmemw("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
int addend = MI->getOperand(2).getImm();
if (addend < 0)
O << "-= " << "#" << -addend << '\n';
else
O << "+= " << "#" << addend << '\n';
} else if (MI->getOpcode() == Hexagon::MEMw_ADDSUBi_MEM_V4) {
O << "\tmemw("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
int addend = MI->getOperand(2).getImm();
if (addend < 0)
O << "-= " << "#" << -addend << '\n';
else
O << "+= " << "#" << addend << '\n';
} else if (MI->getOpcode() == Hexagon::MEMh_ADDSUBi_indexed_MEM_V4) {
O << "\tmemh("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
int addend = MI->getOperand(2).getImm();
if (addend < 0)
O << "-= " << "#" << -addend << '\n';
else
O << "+= " << "#" << addend << '\n';
} else if (MI->getOpcode() == Hexagon::MEMh_ADDSUBi_MEM_V4) {
O << "\tmemh("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
int addend = MI->getOperand(2).getImm();
if (addend < 0)
O << "-= " << "#" << -addend << '\n';
else
O << "+= " << "#" << addend << '\n';
} else if (MI->getOpcode() == Hexagon::MEMb_ADDSUBi_indexed_MEM_V4) {
O << "\tmemb("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
int addend = MI->getOperand(2).getImm();
if (addend < 0)
O << "-= " << "#" << -addend << '\n';
else
O << "+= " << "#" << addend << '\n';
} else if (MI->getOpcode() == Hexagon::MEMb_ADDSUBi_MEM_V4) {
O << "\tmemb("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
int addend = MI->getOperand(2).getImm();
if (addend < 0)
O << "-= " << "#" << -addend << '\n';
else
O << "+= " << "#" << addend << '\n';
} else if (MI->getOpcode() == Hexagon::CMPbGTri_V4) {
O << "\t";
printRegister(MI->getOperand(0), false, O);
O << " = cmpb.gt(";
printRegister(MI->getOperand(1), false, O);
O << ", ";
int val = MI->getOperand(2).getImm() >> 24;
O << "#" << val << ")" << '\n';
} else if (MI->getOpcode() == Hexagon::CMPhEQri_V4) {
O << "\t";
printRegister(MI->getOperand(0), false, O);
O << " = cmph.eq(";
printRegister(MI->getOperand(1), false, O);
O << ", ";
int val = MI->getOperand(2).getImm();
assert((((0 <= val) && (val <= 127)) ||
((65408 <= val) && (val <= 65535))) &&
"Not in correct range!");
if (val >= 65408) val -= 65536;
O << "#" << val << ")" << '\n';
} else if (MI->getOpcode() == Hexagon::CMPhGTri_V4) {
O << "\t";
printRegister(MI->getOperand(0), false, O);
O << " = cmph.gt(";
printRegister(MI->getOperand(1), false, O);
O << ", ";
int val = MI->getOperand(2).getImm() >> 16;
O << "#" << val << ")" << '\n';
} else {
printInstruction(MI, O);
}
if (MFI->isEndPacket(MI) && MI->getOpcode() != Hexagon::ENDLOOP0) {
O << "\n\t}" << '\n';
}
if (AlignCalls && MI->getDesc().isCall()) {
O << "\n\t.falign" << "\n";
}
OutStreamer.EmitRawText(O.str());
return;
}
void HexagonAsmPrinter::printAddrModeBasePlusOffset(const MachineInstr *MI,
int OpNo, raw_ostream &O) {
const MachineOperand &MO1 = MI->getOperand(OpNo);
const MachineOperand &MO2 = MI->getOperand(OpNo+1);
O << getRegisterName(MO1.getReg())
<< " + #"
<< MO2.getImm();
}
void HexagonAsmPrinter::printGlobalOperand(const MachineInstr *MI, int OpNo,
raw_ostream &O) {
const MachineOperand &MO = MI->getOperand(OpNo);
assert( (MO.getType() == MachineOperand::MO_GlobalAddress) &&
"Expecting global address");
O << *Mang->getSymbol(MO.getGlobal());
if (MO.getOffset() != 0) {
O << " + ";
O << MO.getOffset();
}
}
void HexagonAsmPrinter::printJumpTable(const MachineInstr *MI, int OpNo,
raw_ostream &O) {
const MachineOperand &MO = MI->getOperand(OpNo);
assert( (MO.getType() == MachineOperand::MO_JumpTableIndex) &&
"Expecting jump table index");
O << *GetJTISymbol(MO.getIndex());
}
extern "C" void LLVMInitializeHexagonAsmPrinter() {
RegisterAsmPrinter<HexagonAsmPrinter> X(TheHexagonTarget);
}