#ifdef MOTOROLA
# undef MOTOROLA
# define MOTOROLA 1
# define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)")
#else
# define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)")
# define MOTOROLA 0
#endif
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
builtin_define ("__m68k__"); \
builtin_define_std ("mc68000"); \
if (TARGET_68040_ONLY) \
{ \
if (TARGET_68060) \
builtin_define_std ("mc68060"); \
else \
builtin_define_std ("mc68040"); \
} \
else if (TARGET_68060) \
{ \
builtin_define_std ("mc68060"); \
builtin_define_std ("mc68040"); \
builtin_define_std ("mc68030"); \
builtin_define_std ("mc68020"); \
} \
else if (TARGET_68040) \
{ \
builtin_define_std ("mc68040"); \
builtin_define_std ("mc68030"); \
builtin_define_std ("mc68020"); \
} \
else if (TARGET_68030) \
builtin_define_std ("mc68030"); \
else if (TARGET_68020) \
builtin_define_std ("mc68020"); \
if (TARGET_68881) \
builtin_define ("__HAVE_68881__"); \
if (TARGET_CPU32) \
{ \
builtin_define_std ("mc68332"); \
builtin_define_std ("mcpu32"); \
} \
if (TARGET_COLDFIRE) \
builtin_define ("__mcoldfire__"); \
if (TARGET_5200) \
builtin_define ("__mcf5200__"); \
if (TARGET_528x) \
{ \
builtin_define ("__mcf528x__"); \
builtin_define ("__mcf5200__"); \
} \
if (TARGET_CFV3) \
{ \
builtin_define ("__mcf5300__"); \
builtin_define ("__mcf5307__"); \
} \
if (TARGET_CFV4) \
{ \
builtin_define ("__mcf5400__"); \
builtin_define ("__mcf5407__"); \
} \
if (TARGET_CF_HWDIV) \
builtin_define ("__mcfhwdiv__"); \
if (flag_pic) \
{ \
builtin_define ("__pic__"); \
if (flag_pic > 1) \
builtin_define ("__PIC__"); \
} \
builtin_assert ("cpu=m68k"); \
builtin_assert ("machine=m68k"); \
} \
while (0)
#define INT_OP_STANDARD 0
#define INT_OP_DOT_WORD 1
#define INT_OP_NO_DOT 2
#define INT_OP_DC 3
#define INT_OP_GROUP INT_OP_DOT_WORD
extern int target_flags;
#define MASK_68020 (1<<0)
#define TARGET_68020 (target_flags & MASK_68020)
#define MASK_68030 (1<<1)
#define TARGET_68030 (target_flags & MASK_68030)
#define MASK_68040 (1<<2)
#define TARGET_68040 (target_flags & MASK_68040)
#define MASK_68040_ONLY (1<<3)
#define TARGET_68040_ONLY (target_flags & MASK_68040_ONLY)
#define MASK_68060 (1<<4)
#define TARGET_68060 (target_flags & MASK_68060)
#define MASK_5200 (1<<5)
#define TARGET_5200 (target_flags & MASK_5200)
#define MASK_CFV3 (1<<6)
#define TARGET_CFV3 (target_flags & MASK_CFV3)
#define MASK_CFV4 (1<<7)
#define TARGET_CFV4 (target_flags & MASK_CFV4)
#define MASK_528x (1<<8)
#define TARGET_528x (target_flags & MASK_528x)
#define MASK_CF_HWDIV (1<<9)
#define TARGET_CF_HWDIV (target_flags & MASK_CF_HWDIV)
#define MASK_68881 (1<<10)
#define TARGET_68881 (target_flags & MASK_68881)
#define MASK_BITFIELD (1<<11)
#define TARGET_BITFIELD (target_flags & MASK_BITFIELD)
#define MASK_SHORT (1<<12)
#define TARGET_SHORT (target_flags & MASK_SHORT)
#define MASK_ALIGN_INT (1<<13)
#define TARGET_ALIGN_INT (target_flags & MASK_ALIGN_INT)
#define MASK_PCREL (1<<14)
#define TARGET_PCREL (target_flags & MASK_PCREL)
#define MASK_NO_STRICT_ALIGNMENT (1<<15)
#define TARGET_STRICT_ALIGNMENT (~target_flags & MASK_NO_STRICT_ALIGNMENT)
#define MASK_RTD (1<<16)
#define TARGET_RTD (target_flags & MASK_RTD)
#define MASK_SEP_DATA (1<<17)
#define TARGET_SEP_DATA (target_flags & MASK_SEP_DATA)
#define MASK_ID_SHARED_LIBRARY (1<<18)
#define TARGET_ID_SHARED_LIBRARY (target_flags & MASK_ID_SHARED_LIBRARY)
#define TARGET_CPU32 (TARGET_68020 && !TARGET_BITFIELD)
#define MASK_COLDFIRE (MASK_5200|MASK_528x|MASK_CFV3|MASK_CFV4)
#define TARGET_COLDFIRE (target_flags & MASK_COLDFIRE)
#define MASK_ALL_CF_BITS (MASK_COLDFIRE|MASK_CF_HWDIV)
#define TARGET_SWITCHES \
{ { "68020", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY), \
N_("Generate code for a 68020") }, \
{ "c68020", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY), \
N_("Generate code for a 68020") }, \
{ "68020", (MASK_68020|MASK_BITFIELD), "" }, \
{ "c68020", (MASK_68020|MASK_BITFIELD), "" }, \
{ "68000", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_68020|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a 68000") }, \
{ "c68000", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_68020|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a 68000") }, \
{ "bitfield", MASK_BITFIELD, \
N_("Use the bit-field instructions") }, \
{ "nobitfield", - MASK_BITFIELD, \
N_("Do not use the bit-field instructions") }, \
{ "short", MASK_SHORT, \
N_("Consider type 'int' to be 16 bits wide") }, \
{ "noshort", - MASK_SHORT, \
N_("Consider type 'int' to be 32 bits wide") }, \
{ "68881", MASK_68881, "" }, \
{ "soft-float", - MASK_68881, \
N_("Generate code with library calls for floating point") }, \
{ "68020-40", -(MASK_ALL_CF_BITS|MASK_68060|MASK_68040_ONLY), \
N_("Generate code for a 68040, without any new instructions") }, \
{ "68020-40", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040), ""},\
{ "68020-60", -(MASK_ALL_CF_BITS|MASK_68040_ONLY), \
N_("Generate code for a 68060, without any new instructions") }, \
{ "68020-60", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040 \
|MASK_68060), "" }, \
{ "68030", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY), \
N_("Generate code for a 68030") }, \
{ "68030", (MASK_68020|MASK_68030|MASK_BITFIELD), "" }, \
{ "68040", - (MASK_ALL_CF_BITS|MASK_68060), \
N_("Generate code for a 68040") }, \
{ "68040", (MASK_68020|MASK_68881|MASK_BITFIELD \
|MASK_68040_ONLY|MASK_68040), "" }, \
{ "68060", - (MASK_ALL_CF_BITS|MASK_68040), \
N_("Generate code for a 68060") }, \
{ "68060", (MASK_68020|MASK_68881|MASK_BITFIELD \
|MASK_68040_ONLY|MASK_68060), "" }, \
{ "5200", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a 520X") }, \
{ "5200", (MASK_5200), "" }, \
{ "5206e", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a 5206e") }, \
{ "5206e", (MASK_5200|MASK_CF_HWDIV), "" }, \
{ "528x", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a 528x") }, \
{ "528x", (MASK_528x|MASK_CF_HWDIV), "" }, \
{ "5307", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a 5307") }, \
{ "5307", (MASK_CFV3|MASK_CF_HWDIV), "" }, \
{ "5407", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a 5407") }, \
{ "5407", (MASK_CFV4|MASK_CF_HWDIV), "" }, \
{ "68851", 0, \
N_("Generate code for a 68851") }, \
{ "no-68851", 0, \
N_("Do no generate code for a 68851") }, \
{ "68302", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_68020|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a 68302") }, \
{ "68332", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a 68332") }, \
{ "68332", MASK_68020, "" }, \
{ "cpu32", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_BITFIELD|MASK_68881), \
N_("Generate code for a cpu32") }, \
{ "cpu32", MASK_68020, "" }, \
{ "align-int", MASK_ALIGN_INT, \
N_("Align variables on a 32-bit boundary") }, \
{ "no-align-int", -MASK_ALIGN_INT, \
N_("Align variables on a 16-bit boundary") }, \
{ "sep-data", MASK_SEP_DATA, \
N_("Enable separate data segment") }, \
{ "no-sep-data", -MASK_SEP_DATA, \
N_("Disable separate data segment") }, \
{ "id-shared-library", MASK_ID_SHARED_LIBRARY, \
N_("Enable ID based shared library") }, \
{ "no-id-shared-library", -MASK_ID_SHARED_LIBRARY, \
N_("Disable ID based shared library") }, \
{ "pcrel", MASK_PCREL, \
N_("Generate pc-relative code") }, \
{ "strict-align", -MASK_NO_STRICT_ALIGNMENT, \
N_("Do not use unaligned memory references") }, \
{ "no-strict-align", MASK_NO_STRICT_ALIGNMENT, \
N_("Use unaligned memory references") }, \
{ "rtd", MASK_RTD, \
N_("Use different calling convention using 'rtd'") }, \
{ "nortd", - MASK_RTD, \
N_("Use normal calling convention") }, \
SUBTARGET_SWITCHES \
{ "", TARGET_DEFAULT, "" }}
#define TARGET_OPTIONS \
{ \
{ "shared-library-id=", &m68k_library_id_string, \
N_("ID of shared library to build"), 0}, \
SUBTARGET_OPTIONS \
}
#define OVERRIDE_OPTIONS override_options()
#define SUBTARGET_SWITCHES
#define SUBTARGET_OPTIONS
#define SUBTARGET_OVERRIDE_OPTIONS
#define LONG_DOUBLE_TYPE_SIZE 80
#define TARGET_FLT_EVAL_METHOD ((TARGET_68040_ONLY || ! TARGET_68881) ? 0 : 2)
#define BITS_BIG_ENDIAN 1
#define BYTES_BIG_ENDIAN 1
#define WORDS_BIG_ENDIAN 1
#define UNITS_PER_WORD 4
#define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
#define STACK_BOUNDARY 16
#define FUNCTION_BOUNDARY 16
#define EMPTY_FIELD_BOUNDARY 16
#define BIGGEST_ALIGNMENT (TARGET_ALIGN_INT ? 32 : 16)
#define STRICT_ALIGNMENT (TARGET_STRICT_ALIGNMENT)
#define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
#define WCHAR_TYPE "long int"
#define WCHAR_TYPE_SIZE 32
#define MAX_LIBRARY_ID 255
#define FIRST_PSEUDO_REGISTER 25
#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 13 : INVALID_REGNUM)
#define FIXED_REGISTERS \
{ \
0, 0, 0, 0, 0, 0, 0, 0, \
\
\
0, 0, 0, 0, 0, 0, 0, 1, \
\
\
0, 0, 0, 0, 0, 0, 0, 0, \
\
\
1 }
#define CALL_USED_REGISTERS \
{ \
1, 1, 0, 0, 0, 0, 0, 0, \
\
\
1, 1, 0, 0, 0, 0, 0, 1, \
\
\
1, 1, 0, 0, 0, 0, 0, 0, \
\
\
1 }
#define REG_ALLOC_ORDER \
{ \
0, 1, 8, 9, \
\
2, 3, 4, 5, 6, 7, \
\
10, 11, 12, 13, 14, 15, 24, \
\
16, 17, 18, 19, 20, 21, 22, 23\
}
#define CONDITIONAL_REGISTER_USAGE \
{ \
int i; \
HARD_REG_SET x; \
if (! TARGET_68881) \
{ \
COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
if (TEST_HARD_REG_BIT (x, i)) \
fixed_regs[i] = call_used_regs[i] = 1; \
} \
if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \
fixed_regs[PIC_OFFSET_TABLE_REGNUM] \
= call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
}
#define HARD_REGNO_NREGS(REGNO, MODE) \
((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
m68k_hard_regno_rename_ok (OLD_REG, NEW_REG)
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
(((REGNO) < 16 \
&& !((REGNO) < 8 && (REGNO) + GET_MODE_SIZE (MODE) / 4 > 8)) \
|| ((REGNO) >= 16 && (REGNO) < 24 \
&& (GET_MODE_CLASS (MODE) == MODE_FLOAT \
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
&& GET_MODE_UNIT_SIZE (MODE) <= 12))
#define MODES_TIEABLE_P(MODE1, MODE2) \
(! TARGET_68881 \
|| ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
|| GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
== (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
|| GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)))
#define STACK_POINTER_REGNUM 15
#define FRAME_POINTER_REGNUM 14
#define FRAME_POINTER_REQUIRED 0
#define ARG_POINTER_REGNUM 24
#define STATIC_CHAIN_REGNUM 8
#define M68K_STRUCT_VALUE_REGNUM 9
enum reg_class {
NO_REGS, DATA_REGS,
ADDR_REGS, FP_REGS,
GENERAL_REGS, DATA_OR_FP_REGS,
ADDR_OR_FP_REGS, ALL_REGS,
LIM_REG_CLASSES };
#define N_REG_CLASSES (int) LIM_REG_CLASSES
#define REG_CLASS_NAMES \
{ "NO_REGS", "DATA_REGS", \
"ADDR_REGS", "FP_REGS", \
"GENERAL_REGS", "DATA_OR_FP_REGS", \
"ADDR_OR_FP_REGS", "ALL_REGS" }
#define REG_CLASS_CONTENTS \
{ \
{0x00000000}, \
{0x000000ff}, \
{0x0100ff00}, \
{0x00ff0000}, \
{0x0100ffff}, \
{0x00ff00ff}, \
{0x01ffff00}, \
{0x01ffffff}, \
}
extern enum reg_class regno_reg_class[];
#define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)])
#define INDEX_REG_CLASS GENERAL_REGS
#define BASE_REG_CLASS ADDR_REGS
#define REG_CLASS_FROM_LETTER(C) \
((C) == 'a' ? ADDR_REGS : \
((C) == 'd' ? DATA_REGS : \
((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
NO_REGS) : \
NO_REGS)))
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
(C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
(C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
(C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : \
(C) == 'M' ? (VALUE) < -0x100 || (VALUE) >= 0x100 : \
(C) == 'N' ? (VALUE) >= 24 && (VALUE) <= 31 : \
(C) == 'O' ? (VALUE) == 16 : \
(C) == 'P' ? (VALUE) >= 8 && (VALUE) <= 15 : 0)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )
#define EXTRA_CONSTRAINT(OP,CODE) \
(((CODE) == 'S') \
? (TARGET_PCREL \
&& GET_CODE (OP) == MEM \
&& (GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \
|| GET_CODE (XEXP (OP, 0)) == LABEL_REF \
|| GET_CODE (XEXP (OP, 0)) == CONST)) \
: \
(((CODE) == 'T') \
? ( !TARGET_PCREL \
&& (GET_CODE (OP) == SYMBOL_REF \
|| GET_CODE (OP) == LABEL_REF \
|| GET_CODE (OP) == CONST)) \
: \
(((CODE) == 'Q') \
? (GET_CODE (OP) == MEM \
&& GET_CODE (XEXP (OP, 0)) == REG) \
: \
(((CODE) == 'U') \
? (GET_CODE (OP) == MEM \
&& GET_CODE (XEXP (OP, 0)) == PLUS \
&& GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
&& GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT) \
: \
0))))
#define PREFERRED_RELOAD_CLASS(X,CLASS) \
((GET_CODE (X) == CONST_INT \
&& (unsigned) (INTVAL (X) + 0x80) < 0x100 \
&& (CLASS) != ADDR_REGS) \
? DATA_REGS \
: (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \
? DATA_REGS \
: (GET_CODE (X) == CONST_DOUBLE \
&& GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
? (TARGET_68881 && (CLASS == FP_REGS || CLASS == DATA_OR_FP_REGS) \
? FP_REGS : NO_REGS) \
: (TARGET_PCREL \
&& (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
|| GET_CODE (X) == LABEL_REF)) \
? ADDR_REGS \
: (CLASS))
#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
(((MODE) == QImode && (CLASS) != ADDR_REGS) \
? DATA_REGS \
: (CLASS))
#define CLASS_MAX_NREGS(CLASS, MODE) \
((CLASS) == FP_REGS ? 1 \
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
(((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
|| ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
? 4 : 2)
#define STACK_GROWS_DOWNWARD
#define FRAME_GROWS_DOWNWARD
#define STARTING_FRAME_OFFSET 0
#define PUSH_ROUNDING(BYTES) (TARGET_COLDFIRE ? BYTES : ((BYTES) + 1) & ~1)
#define FIRST_PARM_OFFSET(FNDECL) 8
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
((TARGET_RTD && (!(FUNDECL) || TREE_CODE (FUNDECL) != IDENTIFIER_NODE) \
&& (TYPE_ARG_TYPES (FUNTYPE) == 0 \
|| (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
== void_type_node))) \
? (SIZE) : 0)
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
#define NEEDS_UNTYPED_CALL 0
#define PCC_STATIC_STRUCT_RETURN
#define FUNCTION_ARG_REGNO_P(N) 0
#define CUMULATIVE_ARGS int
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
((CUM) = 0)
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
((CUM) += ((MODE) != BLKmode \
? (GET_MODE_SIZE (MODE) + 3) & ~3 \
: (int_size_in_bytes (TYPE) + 3) & ~3))
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
#define FUNCTION_PROFILER(FILE, LABELNO) \
asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO))
#define EXIT_IGNORE_STACK 1
#define USE_RETURN_INSN use_return_insn ()
#define TRAMPOLINE_SIZE 12
#define TRAMPOLINE_ALIGNMENT 16
#ifndef FINALIZE_TRAMPOLINE
#define FINALIZE_TRAMPOLINE(TRAMP)
#endif
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx_MEM (HImode, TRAMP), GEN_INT(0x207C)); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 2)), CXT); \
emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 6)), \
GEN_INT(0x4EF9)); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), FNADDR); \
FINALIZE_TRAMPOLINE(TRAMP); \
}
#define TRANSFER_FROM_TRAMPOLINE \
void \
__transfer_from_trampoline () \
{ \
register char *a0 asm ("%a0"); \
asm (GLOBAL_ASM_OP "___trampoline"); \
asm ("___trampoline:"); \
asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \
asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \
asm ("rts":); \
}
#define ELIMINABLE_REGS \
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
#define CAN_ELIMINATE(FROM, TO) \
((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = m68k_initial_elimination_offset(FROM, TO)
#define HAVE_POST_INCREMENT 1
#define HAVE_PRE_DECREMENT 1
#define REGNO_OK_FOR_INDEX_P(REGNO) \
((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
#define REGNO_OK_FOR_BASE_P(REGNO) \
(((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
#define REGNO_OK_FOR_DATA_P(REGNO) \
((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
#define REGNO_OK_FOR_FP_P(REGNO) \
(((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
#define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
#define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
#define MAX_REGS_PER_ADDRESS 2
#define CONSTANT_ADDRESS_P(X) \
(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
|| GET_CODE (X) == HIGH)
#define LEGITIMATE_CONSTANT_P(X) (GET_MODE (X) != XFmode)
#ifndef REG_OK_STRICT
#define PCREL_GENERAL_OPERAND_OK 0
#else
#define PCREL_GENERAL_OPERAND_OK (TARGET_PCREL)
#endif
#define LEGITIMATE_PIC_OPERAND_P(X) \
(! symbolic_operand (X, VOIDmode) \
|| (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)) \
|| PCREL_GENERAL_OPERAND_OK)
#ifndef REG_OK_STRICT
#define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
#define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
#else
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
#endif
#define LEGITIMATE_BASE_REG_P(X) \
((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
|| (GET_CODE (X) == SUBREG \
&& GET_CODE (SUBREG_REG (X)) == REG \
&& REG_OK_FOR_BASE_P (SUBREG_REG (X))))
#define INDIRECTABLE_1_ADDRESS_P(X) \
((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
|| LEGITIMATE_BASE_REG_P (X) \
|| ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
&& LEGITIMATE_BASE_REG_P (XEXP (X, 0))) \
|| (GET_CODE (X) == PLUS \
&& LEGITIMATE_BASE_REG_P (XEXP (X, 0)) \
&& GET_CODE (XEXP (X, 1)) == CONST_INT \
&& (TARGET_68020 \
|| ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000)) \
|| (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
&& flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \
|| (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
&& flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF))
#define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
{ if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
#define GO_IF_INDEXABLE_BASE(X, ADDR) \
{ rtx temp; \
if (GET_CODE (X) == LABEL_REF \
&& (temp = next_nonnote_insn (XEXP (X, 0))) != 0 \
&& GET_CODE (temp) == JUMP_INSN \
&& (GET_CODE (PATTERN (temp)) == ADDR_VEC \
|| GET_CODE (PATTERN (temp)) == ADDR_DIFF_VEC)) \
goto ADDR; \
if (LEGITIMATE_BASE_REG_P (X)) goto ADDR; }
#define GO_IF_INDEXING(X, ADDR) \
{ if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
{ GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
{ GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
#define GO_IF_INDEXED_ADDRESS(X, ADDR) \
{ GO_IF_INDEXING (X, ADDR); \
if (GET_CODE (X) == PLUS) \
{ if (GET_CODE (XEXP (X, 1)) == CONST_INT \
&& (TARGET_68020 || (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100)) \
{ rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
if (GET_CODE (XEXP (X, 0)) == CONST_INT \
&& (TARGET_68020 || (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100)) \
{ rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
#define LEGITIMATE_INDEX_REG_P(X) \
((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
|| (! TARGET_COLDFIRE \
&& GET_CODE (X) == SIGN_EXTEND \
&& GET_CODE (XEXP (X, 0)) == REG \
&& GET_MODE (XEXP (X, 0)) == HImode \
&& REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
|| (GET_CODE (X) == SUBREG \
&& GET_CODE (SUBREG_REG (X)) == REG \
&& REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
#define LEGITIMATE_INDEX_P(X) \
(LEGITIMATE_INDEX_REG_P (X) \
|| ((TARGET_68020 || TARGET_COLDFIRE) && GET_CODE (X) == MULT \
&& LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
&& GET_CODE (XEXP (X, 1)) == CONST_INT \
&& (INTVAL (XEXP (X, 1)) == 2 \
|| INTVAL (XEXP (X, 1)) == 4 \
|| (INTVAL (XEXP (X, 1)) == 8 && !TARGET_COLDFIRE))))
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
GO_IF_INDEXED_ADDRESS (X, ADDR); \
if (flag_pic && MODE == CASE_VECTOR_MODE && GET_CODE (X) == PLUS \
&& LEGITIMATE_INDEX_P (XEXP (X, 0)) \
&& GET_CODE (XEXP (X, 1)) == LABEL_REF) \
goto ADDR; }
#define PIC_CASE_VECTOR_ADDRESS(index) index
#define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
{ register int ch = (X) != (OLDX); \
if (GET_CODE (X) == PLUS) \
{ int copied = 0; \
if (GET_CODE (XEXP (X, 0)) == MULT) \
{ COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \
if (GET_CODE (XEXP (X, 1)) == MULT) \
{ COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \
if (ch && GET_CODE (XEXP (X, 1)) == REG \
&& GET_CODE (XEXP (X, 0)) == REG) \
goto WIN; \
if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
if (GET_CODE (XEXP (X, 0)) == REG \
|| (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
&& GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
&& GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
{ register rtx temp = gen_reg_rtx (Pmode); \
register rtx val = force_operand (XEXP (X, 1), 0); \
emit_move_insn (temp, val); \
COPY_ONCE (X); \
XEXP (X, 1) = temp; \
goto WIN; } \
else if (GET_CODE (XEXP (X, 1)) == REG \
|| (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
&& GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
&& GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
{ register rtx temp = gen_reg_rtx (Pmode); \
register rtx val = force_operand (XEXP (X, 0), 0); \
emit_move_insn (temp, val); \
COPY_ONCE (X); \
XEXP (X, 0) = temp; \
goto WIN; }}}
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
#define CASE_VECTOR_MODE HImode
#define CASE_VECTOR_PC_RELATIVE 1
#define DEFAULT_SIGNED_CHAR 1
#define MOVE_MAX 4
#define SLOW_BYTE_ACCESS 0
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
#define STORE_FLAG_VALUE (-1)
#define Pmode SImode
#define FUNCTION_MODE QImode
#define CC_IN_68881 04000
#define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN)
#define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
do { if (cc_prev_status.flags & CC_IN_68881) \
return FLOAT; \
if (cc_prev_status.flags & CC_NO_OVERFLOW) \
return NO_OV; \
return NORMAL; } while (0)
#define ASM_APP_ON "#APP\n"
#define ASM_APP_OFF "#NO_APP\n"
#define TEXT_SECTION_ASM_OP "\t.text"
#define DATA_SECTION_ASM_OP "\t.data"
#define GLOBAL_ASM_OP "\t.globl\t"
#define REGISTER_PREFIX ""
#define LOCAL_LABEL_PREFIX ""
#define USER_LABEL_PREFIX "_"
#define IMMEDIATE_PREFIX "#"
#define REGISTER_NAMES \
{REGISTER_PREFIX"d0", REGISTER_PREFIX"d1", REGISTER_PREFIX"d2", \
REGISTER_PREFIX"d3", REGISTER_PREFIX"d4", REGISTER_PREFIX"d5", \
REGISTER_PREFIX"d6", REGISTER_PREFIX"d7", \
REGISTER_PREFIX"a0", REGISTER_PREFIX"a1", REGISTER_PREFIX"a2", \
REGISTER_PREFIX"a3", REGISTER_PREFIX"a4", REGISTER_PREFIX"a5", \
REGISTER_PREFIX"a6", REGISTER_PREFIX"sp", \
REGISTER_PREFIX"fp0", REGISTER_PREFIX"fp1", REGISTER_PREFIX"fp2", \
REGISTER_PREFIX"fp3", REGISTER_PREFIX"fp4", REGISTER_PREFIX"fp5", \
REGISTER_PREFIX"fp6", REGISTER_PREFIX"fp7", REGISTER_PREFIX"argptr" }
#define M68K_FP_REG_NAME REGISTER_PREFIX"fp"
#define M68K_REGNAME(r) ( \
((FRAME_POINTER_REGNUM == 14) \
&& ((r) == FRAME_POINTER_REGNUM) \
&& frame_pointer_needed) ? \
M68K_FP_REG_NAME : reg_names[(r)])
#define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
#define INCOMING_RETURN_ADDR_RTX \
gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
#define DWARF_FRAME_REGNUM(REG) REG
#define INCOMING_FRAME_SP_OFFSET 4
#define EH_RETURN_DATA_REGNO(N) \
((N) < 2 ? (N) : INVALID_REGNUM)
#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 8)
#define EH_RETURN_HANDLER_RTX \
gen_rtx_MEM (Pmode, \
gen_rtx_PLUS (Pmode, arg_pointer_rtx, \
plus_constant (EH_RETURN_STACKADJ_RTX, \
UNITS_PER_WORD)))
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
(flag_pic \
? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
: DW_EH_PE_absptr)
#define ASM_OUTPUT_LABELREF(FILE,NAME) \
asm_fprintf (FILE, "%U%s", NAME)
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long)(NUM))
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO])
#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO])
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
asm_fprintf (FILE, "\t.long %LL%d\n", VALUE)
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL)
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
if ((LOG) >= 1) \
fprintf (FILE, "\t.even\n");
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
fprintf (FILE, "\t.skip %u\n", (int)(SIZE))
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
( fputs (".comm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
( fputs (".lcomm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
#define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
do { \
if (CODE == 'f') \
{ \
char dstr[30]; \
real_to_decimal (dstr, &(VALUE), sizeof (dstr), 9, 0); \
asm_fprintf ((FILE), "%I0r%s", dstr); \
} \
else \
{ \
long l; \
REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
asm_fprintf ((FILE), "%I0x%lx", l); \
} \
} while (0)
#define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
do { char dstr[30]; \
real_to_decimal (dstr, &(VALUE), sizeof (dstr), 0, 1); \
asm_fprintf (FILE, "%I0r%s", dstr); \
} while (0)
#define ASM_OUTPUT_LONG_DOUBLE_OPERAND(FILE,VALUE) \
do { char dstr[30]; \
real_to_decimal (dstr, &(VALUE), sizeof (dstr), 0, 1); \
asm_fprintf (FILE, "%I0r%s", dstr); \
} while (0)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
|| (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \
|| (CODE) == '$' || (CODE) == '&' || (CODE) == '/')
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
extern const char *m68k_library_id_string;
extern int m68k_last_compare_had_fp_operands;
#define PREDICATE_CODES \
{"general_src_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
LABEL_REF, SUBREG, REG, MEM}}, \
{"nonimmediate_src_operand", {SUBREG, REG, MEM}}, \
{"memory_src_operand", {SUBREG, MEM}}, \
{"not_sp_operand", {SUBREG, REG, MEM}}, \
{"pcrel_address", {SYMBOL_REF, LABEL_REF, CONST}}, \
{"const_uint32_operand", {CONST_INT, CONST_DOUBLE}}, \
{"const_sint32_operand", {CONST_INT}}, \
{"valid_dbcc_comparison_p", {EQ, NE, GTU, LTU, GEU, LEU, \
GT, LT, GE, LE}}, \
{"extend_operator", {SIGN_EXTEND, ZERO_EXTEND}}, \
{"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
{"post_inc_operand", {MEM}}, \
{"pre_dec_operand", {MEM}},