#ifndef __NANO_ZONE_H
#define __NANO_ZONE_H
#if CONFIG_NANOZONE
#define NANO_MAG_INDEX(nz) (_os_cpu_number() >> nz->hyper_shift)
#define MAX_RECORDER_BUFFER 256
#if defined(__x86_64)
#define NANO_SIGNATURE_BITS 20
#define NANOZONE_SIGNATURE 0x00006ULL // 0x00006nnnnnnnnnnn the address range devoted to us.
#define NANO_MAG_BITS 5
#define NANO_BAND_BITS 18
#define NANO_SLOT_BITS 4
#define NANO_OFFSET_BITS 17
#else
#error Unknown Architecture
#endif
#if defined(__BIG_ENDIAN__)
struct nano_blk_addr_s {
uint64_t
nano_signature:NANO_SIGNATURE_BITS, nano_mag_index:NANO_MAG_BITS, nano_band:NANO_BAND_BITS,
nano_slot:NANO_SLOT_BITS, nano_offset:NANO_OFFSET_BITS; };
#else
struct nano_blk_addr_s {
uint64_t
nano_offset:NANO_OFFSET_BITS, nano_slot:NANO_SLOT_BITS, nano_band:NANO_BAND_BITS,
nano_mag_index:NANO_MAG_BITS, nano_signature:NANO_SIGNATURE_BITS; };
#endif
typedef union {
uint64_t addr;
struct nano_blk_addr_s fields;
} nano_blk_addr_t;
#define NANO_MAX_SIZE 256
#define SHIFT_NANO_QUANTUM 4
#define NANO_REGIME_QUANTA_SIZE (1 << SHIFT_NANO_QUANTUM) // 16
#define NANO_QUANTA_MASK 0xFULL // NANO_REGIME_QUANTA_SIZE - 1
#define SLOT_IN_BAND_SIZE (1 << NANO_OFFSET_BITS)
#define SLOT_KEY_LIMIT (1 << NANO_SLOT_BITS)
#define BAND_SIZE (1 << (NANO_SLOT_BITS + NANO_OFFSET_BITS))
#define NANO_MAG_SIZE (1 << NANO_MAG_BITS)
#define NANO_SLOT_SIZE (1 << NANO_SLOT_BITS)
typedef struct chained_block_s {
uintptr_t double_free_guard;
struct chained_block_s *next;
} *chained_block_t;
typedef struct nano_meta_s {
OSQueueHead slot_LIFO MALLOC_NANO_CACHE_ALIGN;
unsigned int slot_madvised_log_page_count;
volatile uintptr_t slot_current_base_addr;
volatile uintptr_t slot_limit_addr;
volatile size_t slot_objects_mapped;
volatile size_t slot_objects_skipped;
bitarray_t slot_madvised_pages;
volatile uintptr_t slot_bump_addr MALLOC_NANO_CACHE_ALIGN;
volatile boolean_t slot_exhausted;
unsigned int slot_bytes;
unsigned int slot_objects;
} *nano_meta_admin_t;
typedef struct nanozone_s {
malloc_zone_t basic_zone;
uint8_t pad[PAGE_MAX_SIZE - sizeof(malloc_zone_t)];
struct nano_meta_s meta_data[NANO_MAG_SIZE][NANO_SLOT_SIZE];
_malloc_lock_s band_resupply_lock[NANO_MAG_SIZE];
uintptr_t band_max_mapped_baseaddr[NANO_MAG_SIZE];
size_t core_mapped_size[NANO_MAG_SIZE];
unsigned debug_flags;
unsigned our_signature;
unsigned phys_ncpus;
unsigned logical_ncpus;
unsigned hyper_shift;
uintptr_t cookie;
malloc_zone_t *helper_zone;
} nanozone_t;
#define NANOZONE_PAGED_SIZE ((sizeof(nanozone_t) + vm_page_size - 1) & ~ (vm_page_size - 1))
#endif // CONFIG_NANOZONE
#endif // __NANO_ZONE_H