#include "sim-main.h"
#include "hw-main.h"
enum
{
ISR_REG = 0,
IMR_REG = 1,
ILR0_REG = 4,
ILR1_REG = 5,
ILR2_REG = 6,
ILR3_REG = 7,
};
enum
{
INT1_PORT = 0, INT2_PORT, INT3_PORT, INT4_PORT, INT5_PORT, INT6_PORT, INT7_PORT,
DMAC3_PORT, DMAC2_PORT, DMAC1_PORT, DMAC0_PORT, SIO0_PORT, SIO1_PORT,
TMR0_PORT, TMR1_PORT, TMR2_PORT,
INT0_PORT,
RESET_PORT,
IP_PORT
};
static const struct hw_port_descriptor tx3904irc_ports[] = {
{ "ip", IP_PORT, 0, output_port, },
{ "int1", INT1_PORT, 0, input_port, },
{ "int2", INT2_PORT, 0, input_port, },
{ "int3", INT3_PORT, 0, input_port, },
{ "int4", INT4_PORT, 0, input_port, },
{ "int5", INT5_PORT, 0, input_port, },
{ "int6", INT6_PORT, 0, input_port, },
{ "int7", INT7_PORT, 0, input_port, },
{ "dmac3", DMAC3_PORT, 0, input_port, },
{ "dmac2", DMAC2_PORT, 0, input_port, },
{ "dmac1", DMAC1_PORT, 0, input_port, },
{ "dmac0", DMAC0_PORT, 0, input_port, },
{ "sio0", SIO0_PORT, 0, input_port, },
{ "sio1", SIO1_PORT, 0, input_port, },
{ "tmr0", TMR0_PORT, 0, input_port, },
{ "tmr1", TMR1_PORT, 0, input_port, },
{ "tmr2", TMR2_PORT, 0, input_port, },
{ "reset", RESET_PORT, 0, input_port, },
{ "int0", INT0_PORT, 0, input_port, },
{ NULL, },
};
#define NR_SOURCES (TMR3_PORT - INT1_PORT + 1)
struct tx3904irc {
address_word base_address;
unsigned_4 isr;
#define ISR_SET(c,s) ((c)->isr &= ~ (1 << (s)))
unsigned_4 imr;
#define IMR_GET(c) ((c)->imr)
unsigned_4 ilr[4];
#define ILR_GET(c,s) LSEXTRACTED32((c)->ilr[(s)/4], (s) % 4 * 8 + 2, (s) % 4 * 8)
};
static hw_io_read_buffer_method tx3904irc_io_read_buffer;
static hw_io_write_buffer_method tx3904irc_io_write_buffer;
static hw_port_event_method tx3904irc_port_event;
static void
attach_tx3904irc_regs (struct hw *me,
struct tx3904irc *controller)
{
unsigned_word attach_address;
int attach_space;
unsigned attach_size;
reg_property_spec reg;
if (hw_find_property (me, "reg") == NULL)
hw_abort (me, "Missing \"reg\" property");
if (!hw_find_reg_array_property (me, "reg", 0, ®))
hw_abort (me, "\"reg\" property must contain one addr/size entry");
hw_unit_address_to_attach_address (hw_parent (me),
®.address,
&attach_space,
&attach_address,
me);
hw_unit_size_to_attach_size (hw_parent (me),
®.size,
&attach_size, me);
hw_attach_address (hw_parent (me), 0,
attach_space, attach_address, attach_size,
me);
controller->base_address = attach_address;
}
static void
tx3904irc_finish (struct hw *me)
{
struct tx3904irc *controller;
controller = HW_ZALLOC (me, struct tx3904irc);
set_hw_data (me, controller);
set_hw_io_read_buffer (me, tx3904irc_io_read_buffer);
set_hw_io_write_buffer (me, tx3904irc_io_write_buffer);
set_hw_ports (me, tx3904irc_ports);
set_hw_port_event (me, tx3904irc_port_event);
attach_tx3904irc_regs (me, controller);
controller->isr = 0x0000ffff;
controller->imr = 0;
controller->ilr[0] =
controller->ilr[1] =
controller->ilr[2] =
controller->ilr[3] = 0;
}
static void
tx3904irc_port_event (struct hw *me,
int my_port,
struct hw *source_dev,
int source_port,
int level)
{
struct tx3904irc *controller = hw_data (me);
if(level == 0)
{
HW_TRACE ((me, "interrupt cleared on port %d", my_port));
hw_port_event(me, IP_PORT, 0);
return;
}
switch (my_port)
{
case INT0_PORT:
{
int ip_number = 32;
HW_TRACE ((me, "port-event INT[0]"));
hw_port_event(me, IP_PORT, ip_number);
break;
}
case INT1_PORT: case INT2_PORT: case INT3_PORT: case INT4_PORT:
case INT5_PORT: case INT6_PORT: case INT7_PORT: case DMAC3_PORT:
case DMAC2_PORT: case DMAC1_PORT: case DMAC0_PORT: case SIO0_PORT:
case SIO1_PORT: case TMR0_PORT: case TMR1_PORT: case TMR2_PORT:
{
int source = my_port - INT1_PORT;
HW_TRACE ((me, "interrupt asserted on port %d", source));
ISR_SET(controller, source);
if(ILR_GET(controller, source) > IMR_GET(controller))
{
int ip_number = 16 + source;
HW_TRACE ((me, "interrupt level %d", ILR_GET(controller,source)));
hw_port_event(me, IP_PORT, ip_number);
}
break;
}
case RESET_PORT:
{
HW_TRACE ((me, "reset"));
controller->isr = 0x0000ffff;
controller->imr = 0;
controller->ilr[0] =
controller->ilr[1] =
controller->ilr[2] =
controller->ilr[3] = 0;
break;
}
case IP_PORT:
hw_abort (me, "Event on output port %d", my_port);
break;
default:
hw_abort (me, "Event on unknown port %d", my_port);
break;
}
}
static unsigned
tx3904irc_io_read_buffer (struct hw *me,
void *dest,
int space,
unsigned_word base,
unsigned nr_bytes)
{
struct tx3904irc *controller = hw_data (me);
unsigned byte;
HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
for (byte = 0; byte < nr_bytes; byte++)
{
address_word address = base + byte;
int reg_number = (address - controller->base_address) / 4;
int reg_offset = (address - controller->base_address) % 4;
unsigned_4 register_value;
switch (reg_number)
{
case ISR_REG: register_value = controller->isr; break;
case IMR_REG: register_value = controller->imr; break;
case ILR0_REG: register_value = controller->ilr[0]; break;
case ILR1_REG: register_value = controller->ilr[1]; break;
case ILR2_REG: register_value = controller->ilr[2]; break;
case ILR3_REG: register_value = controller->ilr[3]; break;
default: register_value = 0;
}
register_value = H2T_4(register_value);
memcpy ((char*) dest + byte, ((char*)& register_value)+reg_offset, 1);
}
return nr_bytes;
}
static unsigned
tx3904irc_io_write_buffer (struct hw *me,
const void *source,
int space,
unsigned_word base,
unsigned nr_bytes)
{
struct tx3904irc *controller = hw_data (me);
unsigned byte;
HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
for (byte = 0; byte < nr_bytes; byte++)
{
address_word address = base + byte;
int reg_number = (address - controller->base_address) / 4;
int reg_offset = (address - controller->base_address) % 4;
unsigned_4* register_ptr;
unsigned_4 register_value;
switch (reg_number)
{
case ISR_REG: register_ptr = & controller->isr; break;
case IMR_REG: register_ptr = & controller->imr; break;
case ILR0_REG: register_ptr = & controller->ilr[0]; break;
case ILR1_REG: register_ptr = & controller->ilr[1]; break;
case ILR2_REG: register_ptr = & controller->ilr[2]; break;
case ILR3_REG: register_ptr = & controller->ilr[3]; break;
default: register_ptr = & register_value;
}
register_value = H2T_4(* register_ptr);
memcpy (((char*)®ister_value)+reg_offset, (const char*)source + byte, 1);
* register_ptr = T2H_4(register_value);
}
return nr_bytes;
}
const struct hw_descriptor dv_tx3904irc_descriptor[] = {
{ "tx3904irc", tx3904irc_finish, },
{ NULL },
};