#include "sim-main.h"
#include "sim-options.h"
#include "libiberty.h"
#include "bfd.h"
#ifdef HAVE_STRING_H
#include <string.h>
#else
#ifdef HAVE_STRINGS_H
#include <strings.h>
#endif
#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
static void free_state (SIM_DESC);
static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
SIM_DESC current_state;
static void
free_state (SIM_DESC sd)
{
if (STATE_MODULES (sd) != NULL)
sim_module_uninstall (sd);
sim_cpu_free_all (sd);
sim_state_free (sd);
}
SIM_DESC
sim_open (kind, callback, abfd, argv)
SIM_OPEN_KIND kind;
host_callback *callback;
struct _bfd *abfd;
char **argv;
{
SIM_DESC sd = sim_state_alloc (kind, callback);
char c;
int i;
if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
#if 0
{
SIM_CPU *current_cpu = STATE_CPU (sd, 0);
STATE_WATCHPOINTS (sd)->pc = &(PC);
STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
}
#endif
if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
#ifdef HAVE_DV_SOCKSER
if (dv_sockser_install (sd) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
#endif
#if 0
if (extra_options != NULL)
sim_add_option_table (sd, extra_options);
#endif
if (sim_parse_args (sd, argv) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
if (sim_core_read_buffer (sd, NULL, read_map, &c, M32R_DEVICE_ADDR, 1) == 0)
sim_core_attach (sd, NULL,
0 ,
access_read_write,
0 ,
M32R_DEVICE_ADDR, M32R_DEVICE_LEN ,
0 ,
&m32r_devices,
NULL );
if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
if (sim_analyze_program (sd,
(STATE_PROG_ARGV (sd) != NULL
? *STATE_PROG_ARGV (sd)
: NULL),
abfd) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
if (sim_config (sd) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
if (sim_post_argv_init (sd) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
{
CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
CGEN_ENDIAN_BIG);
for (i = 0; i < MAX_NR_PROCESSORS; ++i)
{
SIM_CPU *cpu = STATE_CPU (sd, i);
CPU_CPU_DESC (cpu) = cd;
CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
}
m32r_cgen_init_dis (cd);
}
cgen_init (sd);
for (c = 0; c < MAX_NR_PROCESSORS; ++c)
{
memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
= print_m32r_misc_cpu;
}
current_state = sd;
return sd;
}
void
sim_close (sd, quitting)
SIM_DESC sd;
int quitting;
{
m32r_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
sim_module_uninstall (sd);
}
SIM_RC
sim_create_inferior (sd, abfd, argv, envp)
SIM_DESC sd;
struct _bfd *abfd;
char **argv;
char **envp;
{
SIM_CPU *current_cpu = STATE_CPU (sd, 0);
SIM_ADDR addr;
if (abfd != NULL)
addr = bfd_get_start_address (abfd);
else
addr = 0;
sim_pc_set (current_cpu, addr);
#if 0
STATE_ARGV (sd) = sim_copy_argv (argv);
STATE_ENVP (sd) = sim_copy_argv (envp);
#endif
return SIM_RC_OK;
}
static void
print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
{
SIM_DESC sd = CPU_STATE (cpu);
char buf[20];
if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
{
sim_io_printf (sd, "Miscellaneous Statistics\n\n");
sim_io_printf (sd, " %-*s %s\n\n",
PROFILE_LABEL_WIDTH, "Fill nops:",
sim_add_commas (buf, sizeof (buf),
CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
sim_io_printf (sd, " %-*s %s\n\n",
PROFILE_LABEL_WIDTH, "Parallel insns:",
sim_add_commas (buf, sizeof (buf),
CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
}
}
void
sim_do_command (sd, cmd)
SIM_DESC sd;
char *cmd;
{
char **argv;
if (cmd == NULL)
return;
argv = buildargv (cmd);
if (argv[0] != NULL
&& strcasecmp (argv[0], "info") == 0
&& argv[1] != NULL
&& strncasecmp (argv[1], "reg", 3) == 0)
{
SI val;
if (argv[2] == NULL)
sim_io_eprintf (sd, "Missing register in `%s'\n", cmd);
else if (argv[3] != NULL)
sim_io_eprintf (sd, "Too many arguments in `%s'\n", cmd);
else if (strcasecmp (argv[2], "bbpsw") == 0)
{
val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPSW);
sim_io_printf (sd, "bbpsw 0x%x %d\n", val, val);
}
else if (strcasecmp (argv[2], "bbpc") == 0)
{
val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPC);
sim_io_printf (sd, "bbpc 0x%x %d\n", val, val);
}
else
sim_io_eprintf (sd, "Printing of register `%s' not supported with `sim info'\n",
argv[2]);
}
else
{
if (sim_args_command (sd, cmd) != SIM_RC_OK)
sim_io_eprintf (sd, "Unknown sim command `%s'\n", cmd);
}
freeargv (argv);
}