# Simulator main loop for m32rx. -*- C -*-
# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
#
# This file is part of the GNU Simulators.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2, or (at your option)
# any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
# Syntax:
# /bin/sh mainloop.in command
#
# Command is one of:
#
# init
# support
# extract-{simple,scache,pbb}
# {full,fast}-exec-{simple,scache,pbb}
#
# A target need only provide a "full" version of one of simple,scache,pbb.
# If the target wants it can also provide a fast version of same, or if
# the slow (full featured) version is `simple', then the fast version can be
# one of scache/pbb.
# A target can't provide more than this.
# ??? After a few more ports are done, revisit.
# Will eventually need to machine generate a lot of this.
case "x$1" in
xsupport)
cat <<EOF
static INLINE void
emit_par_finish (SIM_CPU *current_cpu, PCADDR pc, SCACHE *sc,
SCACHE *sc1, const IDESC *id1, SCACHE *sc2, const IDESC *id2)
{
ARGBUF *abuf;
abuf = &sc->argbuf;
id1 = id1->par_idesc;
abuf->fields.write.abuf = &sc1->argbuf;
@cpu@_fill_argbuf (current_cpu, abuf, id1, pc, 0);
#if 0
abuf = &sc[1].argbuf;
id2 = id2->par_idesc;
abuf->fields.write.abuf = &sc2->argbuf;
@cpu@_fill_argbuf (current_cpu, abuf, id2, pc + 2, 0);
#endif
}
static INLINE const IDESC *
emit_16 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
SCACHE *sc, int fast_p, int parallel_p)
{
ARGBUF *abuf = &sc->argbuf;
const IDESC *id = @cpu@_decode (current_cpu, pc, insn, insn, abuf);
if (parallel_p)
id = id->par_idesc;
@cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
return id;
}
static INLINE const IDESC *
emit_full16 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, SCACHE *sc,
int trace_p, int profile_p)
{
const IDESC *id;
@cpu@_emit_before (current_cpu, sc, pc, 1);
id = emit_16 (current_cpu, pc, insn, sc + 1, 0, 0);
@cpu@_emit_after (current_cpu, sc + 2, pc);
sc[1].argbuf.trace_p = trace_p;
sc[1].argbuf.profile_p = profile_p;
return id;
}
static INLINE const IDESC *
emit_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
SCACHE *sc, int fast_p)
{
const IDESC *id,*id2;
id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);
id2 = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc + 1, fast_p, 0);
if (IDESC_SKIP_P (id))
SEM_SKIP_COMPILE (current_cpu, sc, 1);
emit_par_finish (current_cpu, pc, sc + 2, sc, id, sc + 1, id2);
return id;
}
static INLINE const IDESC *
emit_full_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
SCACHE *sc, int trace_p, int profile_p)
{
const IDESC *id,*id2;
@cpu@_emit_before (current_cpu, sc, pc, 1);
id = emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 1);
sc[1].argbuf.trace_p = trace_p;
sc[1].argbuf.profile_p = profile_p;
@cpu@_emit_before (current_cpu, sc + 2, pc, 0);
id2 = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc + 3, 0, 0);
sc[3].argbuf.trace_p = trace_p;
sc[3].argbuf.profile_p = profile_p;
if (IDESC_SKIP_P (id))
SEM_SKIP_COMPILE (current_cpu, sc, 4);
emit_par_finish (current_cpu, pc, sc + 4, sc + 1, id, sc + 3, id2);
@cpu@_emit_after (current_cpu, sc + 5, pc);
return id;
}
static INLINE const IDESC *
emit_32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
SCACHE *sc, int fast_p)
{
ARGBUF *abuf = &sc->argbuf;
const IDESC *id = @cpu@_decode (current_cpu, pc,
(USI) insn >> 16, insn, abuf);
@cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
return id;
}
static INLINE const IDESC *
emit_full32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, SCACHE *sc,
int trace_p, int profile_p)
{
const IDESC *id;
@cpu@_emit_before (current_cpu, sc, pc, 1);
id = emit_32 (current_cpu, pc, insn, sc + 1, 0);
@cpu@_emit_after (current_cpu, sc + 2, pc);
sc[1].argbuf.trace_p = trace_p;
sc[1].argbuf.profile_p = profile_p;
return id;
}
EOF
;;
xinit)
# Nothing needed.
;;
xextract-pbb)
# Inputs: current_cpu, pc, sc, max_insns, FAST_P
# Outputs: sc, pc
# sc must be left pointing past the last created entry.
# pc must be left pointing past the last created entry.
# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
# to record the vpc of the cti insn.
# SET_INSN_COUNT(n) must be called to record number of real insns.
cat <<EOF
{
const IDESC *idesc;
int icount = 0;
if ((pc & 3) != 0)
{
UHI insn = GETIMEMUHI (current_cpu, pc);
int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
SCACHE *cti_sc;
#if 0
if ((insn & 0x8000) != 0
&& (insn & 0x7fff) != 0x7000)
sim_engine_invalid_insn (current_cpu, pc, 0);
#endif
if (FAST_P || (! trace_p && ! profile_p))
{
idesc = emit_16 (current_cpu, pc, insn & 0x7fff, sc, FAST_P, 0);
cti_sc = sc;
++sc;
--max_insns;
}
else
{
idesc = emit_full16 (current_cpu, pc, insn & 0x7fff, sc,
trace_p, profile_p);
cti_sc = sc + 1;
sc += 3;
max_insns -= 3;
}
++icount;
pc += 2;
if (IDESC_CTI_P (idesc))
{
SET_CTI_VPC (cti_sc);
goto Finish;
}
}
if (FAST_P)
{
while (max_insns > 0)
{
USI insn = GETIMEMUSI (current_cpu, pc);
if ((SI) insn < 0)
{
idesc = emit_32 (current_cpu, pc, insn, sc, 1);
++sc;
--max_insns;
++icount;
pc += 4;
if (IDESC_CTI_P (idesc))
{
SET_CTI_VPC (sc - 1);
break;
}
}
else
{
if ((insn & 0x8000) != 0)
{
idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
sc += 3;
max_insns -= 3;
icount += 2;
pc += 4;
if (IDESC_CTI_P (idesc))
{
SET_CTI_VPC (sc - 3);
break;
}
}
else
{
idesc = emit_16 (current_cpu, pc, insn >> 16, sc, 1, 0);
++sc;
--max_insns;
++icount;
pc += 2;
if (IDESC_CTI_P (idesc))
{
SET_CTI_VPC (sc - 1);
break;
}
if (max_insns == 0)
break;
idesc = emit_16 (current_cpu, pc, insn & 0x7fff, sc, 1, 0);
++sc;
--max_insns;
++icount;
pc += 2;
if (IDESC_CTI_P (idesc))
{
SET_CTI_VPC (sc - 1);
break;
}
}
}
}
}
else
{
while (max_insns > 0)
{
USI insn = GETIMEMUSI (current_cpu, pc);
int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
SCACHE *cti_sc;
if ((SI) insn < 0)
{
if (trace_p || profile_p)
{
idesc = emit_full32 (current_cpu, pc, insn, sc,
trace_p, profile_p);
cti_sc = sc + 1;
sc += 3;
max_insns -= 3;
}
else
{
idesc = emit_32 (current_cpu, pc, insn, sc, 0);
cti_sc = sc;
++sc;
--max_insns;
}
++icount;
pc += 4;
if (IDESC_CTI_P (idesc))
{
SET_CTI_VPC (cti_sc);
break;
}
}
else
{
if ((insn & 0x8000) != 0)
{
if (trace_p || profile_p)
{
idesc = emit_full_parallel (current_cpu, pc, insn, sc,
trace_p, profile_p);
cti_sc = sc + 1;
sc += 6;
max_insns -= 6;
}
else
{
idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
cti_sc = sc;
sc += 3;
max_insns -= 3;
}
icount += 2;
pc += 4;
if (IDESC_CTI_P (idesc))
{
SET_CTI_VPC (cti_sc);
break;
}
}
else
{
if (trace_p || profile_p)
{
idesc = emit_full16 (current_cpu, pc, insn >> 16, sc,
trace_p, profile_p);
cti_sc = sc + 1;
sc += 3;
max_insns -= 3;
}
else
{
idesc = emit_16 (current_cpu, pc, insn >> 16, sc, 0, 0);
cti_sc = sc;
++sc;
--max_insns;
}
++icount;
pc += 2;
if (IDESC_CTI_P (idesc))
{
SET_CTI_VPC (cti_sc);
break;
}
if (max_insns <= 0)
break;
if (trace_p || profile_p)
{
idesc = emit_full16 (current_cpu, pc, insn & 0x7fff, sc,
trace_p, profile_p);
cti_sc = sc + 1;
sc += 3;
max_insns -= 3;
}
else
{
idesc = emit_16 (current_cpu, pc, insn & 0x7fff, sc, 0, 0);
cti_sc = sc;
++sc;
--max_insns;
}
++icount;
pc += 2;
if (IDESC_CTI_P (idesc))
{
SET_CTI_VPC (cti_sc);
break;
}
}
}
}
}
Finish:
SET_INSN_COUNT (icount);
}
EOF
;;
xfull-exec-pbb)
# Inputs: current_cpu, vpc, FAST_P
# Outputs: vpc
# vpc is the virtual program counter.
cat <<EOF
#define DEFINE_SWITCH
#include "semx-switch.c"
EOF
;;
*)
echo "Invalid argument to mainloop.in: $1" >&2
exit 1
;;
esac