#include "config.h"
#include "system.h"
#include <math.h>
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "real.h"
#include "insn-config.h"
#include "conditions.h"
#include "output.h"
#include "insn-attr.h"
#include "flags.h"
#include "tree.h"
#include "expr.h"
#include "except.h"
#include "function.h"
#include "recog.h"
#include "toplev.h"
#include "tm_p.h"
#include "target.h"
#include "target-def.h"
static void i960_output_function_prologue PARAMS ((FILE *, HOST_WIDE_INT));
static void i960_output_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT));
static void i960_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT,
HOST_WIDE_INT, tree));
rtx i960_compare_op0, i960_compare_op1;
int i960_maxbitalignment;
int i960_last_maxbitalignment;
enum insn_types i960_last_insn_type;
static int i960_leaf_ret_reg;
static int tail_call_ok;
char epilogue_string[1000];
static int ret_label = 0;
#define VARARGS_STDARG_FUNCTION(FNDECL) \
(TYPE_ARG_TYPES (TREE_TYPE (FNDECL)) != 0 \
&& (TREE_VALUE (tree_last (TYPE_ARG_TYPES (TREE_TYPE (FNDECL))))) \
!= void_type_node)
#undef TARGET_ASM_ALIGNED_SI_OP
#define TARGET_ASM_ALIGNED_SI_OP "\t.word\t"
#undef TARGET_ASM_FUNCTION_PROLOGUE
#define TARGET_ASM_FUNCTION_PROLOGUE i960_output_function_prologue
#undef TARGET_ASM_FUNCTION_EPILOGUE
#define TARGET_ASM_FUNCTION_EPILOGUE i960_output_function_epilogue
#undef TARGET_ASM_OUTPUT_MI_THUNK
#define TARGET_ASM_OUTPUT_MI_THUNK i960_output_mi_thunk
#undef TARGET_CAN_ASM_OUTPUT_MI_THUNK
#define TARGET_CAN_ASM_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
struct gcc_target targetm = TARGET_INITIALIZER;
void
i960_initialize ()
{
if (TARGET_K_SERIES && TARGET_C_SERIES)
{
warning ("conflicting architectures defined - using C series");
target_flags &= ~TARGET_FLAG_K_SERIES;
}
if (TARGET_K_SERIES && TARGET_MC)
{
warning ("conflicting architectures defined - using K series");
target_flags &= ~TARGET_FLAG_MC;
}
if (TARGET_C_SERIES && TARGET_MC)
{
warning ("conflicting architectures defined - using C series");
target_flags &= ~TARGET_FLAG_MC;
}
if (TARGET_IC_COMPAT3_0)
{
flag_short_enums = 1;
flag_signed_char = 1;
target_flags |= TARGET_FLAG_CLEAN_LINKAGE;
if (TARGET_IC_COMPAT2_0)
{
warning ("iC2.0 and iC3.0 are incompatible - using iC3.0");
target_flags &= ~TARGET_FLAG_IC_COMPAT2_0;
}
}
if (TARGET_IC_COMPAT2_0)
{
flag_signed_char = 1;
target_flags |= TARGET_FLAG_CLEAN_LINKAGE;
}
if (TARGET_IC_COMPAT2_0)
{
i960_maxbitalignment = 8;
i960_last_maxbitalignment = 128;
}
else
{
i960_maxbitalignment = 128;
i960_last_maxbitalignment = 8;
}
real_format_for_mode[TFmode - QFmode] = &ieee_extended_intel_128_format;
}
int
fpmove_src_operand (op, mode)
rtx op;
enum machine_mode mode;
{
return (GET_CODE (op) == CONST_DOUBLE || general_operand (op, mode));
}
#if 0
int
reg_or_zero_operand (op, mode)
rtx op;
enum machine_mode mode;
{
return register_operand (op, mode) || op == const0_rtx;
}
#endif
int
arith_operand (op, mode)
rtx op;
enum machine_mode mode;
{
return (register_operand (op, mode) || literal (op, mode));
}
int
logic_operand (op, mode)
rtx op;
enum machine_mode mode;
{
return (register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT
&& INTVAL(op) >= -32 && INTVAL(op) < 32));
}
int
fp_arith_operand (op, mode)
rtx op;
enum machine_mode mode;
{
return (register_operand (op, mode) || fp_literal (op, mode));
}
int
signed_arith_operand (op, mode)
rtx op;
enum machine_mode mode;
{
return (register_operand (op, mode) || signed_literal (op, mode));
}
int
literal (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return ((GET_CODE (op) == CONST_INT) && INTVAL(op) >= 0 && INTVAL(op) < 32);
}
int
fp_literal_one (op, mode)
rtx op;
enum machine_mode mode;
{
return (TARGET_NUMERICS && mode == GET_MODE (op) && op == CONST1_RTX (mode));
}
int
fp_literal_zero (op, mode)
rtx op;
enum machine_mode mode;
{
return (TARGET_NUMERICS && mode == GET_MODE (op) && op == CONST0_RTX (mode));
}
int
fp_literal(op, mode)
rtx op;
enum machine_mode mode;
{
return fp_literal_zero (op, mode) || fp_literal_one (op, mode);
}
int
signed_literal(op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return ((GET_CODE (op) == CONST_INT) && INTVAL(op) > -32 && INTVAL(op) < 32);
}
int
symbolic_memory_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) == SUBREG)
op = SUBREG_REG (op);
if (GET_CODE (op) != MEM)
return 0;
op = XEXP (op, 0);
return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST
|| GET_CODE (op) == HIGH || GET_CODE (op) == LABEL_REF);
}
int
eq_or_neq (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (GET_CODE (op) == EQ || GET_CODE (op) == NE);
}
int
arith32_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (register_operand (op, mode))
return 1;
return (CONSTANT_P (op));
}
int
power2_operand (op,mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) != CONST_INT)
return 0;
return exact_log2 (INTVAL (op)) >= 0;
}
int
cmplpower2_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) != CONST_INT)
return 0;
return exact_log2 (~ INTVAL (op)) >= 0;
}
int
bitpos (val)
unsigned int val;
{
register int i;
for (i = 0; val != 0; i++, val >>= 1)
{
if (val & 1)
{
if (val != 1)
return -1;
return i;
}
}
return -1;
}
int
is_mask (val)
unsigned int val;
{
register int start, end = 0, i;
start = -1;
for (i = 0; val != 0; val >>= 1, i++)
{
if (val & 1)
{
if (start < 0)
start = i;
end = i;
continue;
}
if (start < 0)
continue;
if (val)
return 0;
}
return end - start + 1;
}
int
bitstr (val, s, e)
unsigned int val;
int *s, *e;
{
register int start, end, i;
start = -1;
end = -1;
for (i = 0; val != 0; val >>= 1, i++)
{
if (val & 1)
{
if (start < 0)
start = i;
end = i;
continue;
}
if (start < 0)
continue;
if (val)
{
start = -1;
end = -1;
break;
}
}
*s = start;
*e = end;
return ((start < 0) ? 0 : end - start + 1);
}
enum machine_mode
select_cc_mode (op, x)
RTX_CODE op;
rtx x ATTRIBUTE_UNUSED;
{
if (op == GTU || op == LTU || op == GEU || op == LEU)
return CC_UNSmode;
return CCmode;
}
rtx
gen_compare_reg (code, x, y)
enum rtx_code code;
rtx x, y;
{
rtx cc_reg;
enum machine_mode ccmode = SELECT_CC_MODE (code, x, y);
enum machine_mode mode
= GET_MODE (x) == VOIDmode ? GET_MODE (y) : GET_MODE (x);
if (mode == SImode)
{
if (! arith_operand (x, mode))
x = force_reg (SImode, x);
if (! arith_operand (y, mode))
y = force_reg (SImode, y);
}
cc_reg = gen_rtx_REG (ccmode, 36);
emit_insn (gen_rtx_SET (VOIDmode, cc_reg,
gen_rtx_COMPARE (ccmode, x, y)));
return cc_reg;
}
int
i960_address_cost (x)
rtx x;
{
#if 0
if (GET_CODE (x) == REG)
return 1;
#endif
if (GET_CODE (x) == CONST_INT
&& INTVAL (x) >= 0
&& INTVAL (x) < 4096)
return 0;
if (GET_CODE (x) == PLUS)
{
rtx base = XEXP (x, 0);
rtx offset = XEXP (x, 1);
if (GET_CODE (base) == SUBREG)
base = SUBREG_REG (base);
if (GET_CODE (offset) == SUBREG)
offset = SUBREG_REG (offset);
if (GET_CODE (base) == REG)
{
if (GET_CODE (offset) == REG)
return 2;
if (GET_CODE (offset) == CONST_INT)
{
if ((unsigned)INTVAL (offset) < 2047)
return 2;
return 4;
}
if (CONSTANT_P (offset))
return 4;
}
if (GET_CODE (base) == PLUS || GET_CODE (base) == MULT)
return 6;
return 12;
}
if (GET_CODE (x) == MULT)
return 6;
return 4;
}
int
emit_move_sequence (operands, mode)
rtx *operands;
enum machine_mode mode;
{
if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) != REG
&& (operands[1] != const0_rtx || current_function_args_size
|| current_function_stdarg
|| rtx_equal_function_value_matters))
operands[1] = force_reg (mode, operands[1]);
if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
&& (GET_CODE (operands[0]) == MEM
|| (GET_CODE (operands[0]) == REG
&& REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER))
&& GET_CODE (operands[1]) == REG
&& REGNO (operands[1]) < FIRST_PSEUDO_REGISTER
&& ! HARD_REGNO_MODE_OK (REGNO (operands[1]), mode))
{
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2,
gen_rtx_SET (VOIDmode, operands[0], operands[1]),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (Pmode)))));
return 1;
}
return 0;
}
const char *
i960_output_move_double (dst, src)
rtx dst, src;
{
rtx operands[5];
if (GET_CODE (dst) == REG
&& GET_CODE (src) == REG)
{
if ((REGNO (src) & 1)
|| (REGNO (dst) & 1))
{
if (REGNO (src) + 1 == REGNO (dst))
return "mov %D1,%D0\n\tmov %1,%0";
else
return "mov %1,%0\n\tmov %D1,%D0";
}
else
return "movl %1,%0";
}
else if (GET_CODE (dst) == REG
&& GET_CODE (src) == CONST_INT
&& CONST_OK_FOR_LETTER_P (INTVAL (src), 'I'))
{
if (REGNO (dst) & 1)
return "mov %1,%0\n\tmov 0,%D0";
else
return "movl %1,%0";
}
else if (GET_CODE (dst) == REG
&& GET_CODE (src) == MEM)
{
if (REGNO (dst) & 1)
{
operands[0] = dst;
operands[1] = src;
operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 1);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
operands[4] = adjust_address (operands[3], word_mode,
UNITS_PER_WORD);
output_asm_insn
("lda %1,%2\n\tld %3,%0\n\tld %4,%D0", operands);
return "";
}
else
return "ldl %1,%0";
}
else if (GET_CODE (dst) == MEM
&& GET_CODE (src) == REG)
{
if (REGNO (src) & 1)
{
operands[0] = dst;
operands[1] = adjust_address (dst, word_mode, UNITS_PER_WORD);
if (! memory_address_p (word_mode, XEXP (operands[1], 0)))
abort ();
operands[2] = src;
output_asm_insn ("st %2,%0\n\tst %D2,%1", operands);
return "";
}
return "stl %1,%0";
}
else
abort ();
}
const char *
i960_output_move_double_zero (dst)
rtx dst;
{
rtx operands[2];
operands[0] = dst;
{
operands[1] = adjust_address (dst, word_mode, 4);
output_asm_insn ("st g14,%0\n\tst g14,%1", operands);
}
return "";
}
const char *
i960_output_move_quad (dst, src)
rtx dst, src;
{
rtx operands[7];
if (GET_CODE (dst) == REG
&& GET_CODE (src) == REG)
{
if ((REGNO (src) & 3)
|| (REGNO (dst) & 3))
{
if (REGNO (dst) <= REGNO (src) + 3
&& REGNO (dst) >= REGNO (src))
return "mov %F1,%F0\n\tmov %E1,%E0\n\tmov %D1,%D0\n\tmov %1,%0";
else
return "mov %1,%0\n\tmov %D1,%D0\n\tmov %E1,%E0\n\tmov %F1,%F0";
}
else
return "movq %1,%0";
}
else if (GET_CODE (dst) == REG
&& GET_CODE (src) == CONST_INT
&& CONST_OK_FOR_LETTER_P (INTVAL (src), 'I'))
{
if (REGNO (dst) & 3)
return "mov %1,%0\n\tmov 0,%D0\n\tmov 0,%E0\n\tmov 0,%F0";
else
return "movq %1,%0";
}
else if (GET_CODE (dst) == REG
&& GET_CODE (src) == MEM)
{
if (REGNO (dst) & 3)
{
operands[0] = dst;
operands[1] = src;
operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 3);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
operands[4]
= adjust_address (operands[3], word_mode, UNITS_PER_WORD);
operands[5]
= adjust_address (operands[4], word_mode, UNITS_PER_WORD);
operands[6]
= adjust_address (operands[5], word_mode, UNITS_PER_WORD);
output_asm_insn ("lda %1,%2\n\tld %3,%0\n\tld %4,%D0\n\tld %5,%E0\n\tld %6,%F0", operands);
return "";
}
else
return "ldq %1,%0";
}
else if (GET_CODE (dst) == MEM
&& GET_CODE (src) == REG)
{
if (REGNO (src) & 3)
{
operands[0] = dst;
operands[1] = adjust_address (dst, word_mode, UNITS_PER_WORD);
operands[2] = adjust_address (dst, word_mode, 2 * UNITS_PER_WORD);
operands[3] = adjust_address (dst, word_mode, 3 * UNITS_PER_WORD);
if (! memory_address_p (word_mode, XEXP (operands[3], 0)))
abort ();
operands[4] = src;
output_asm_insn ("st %4,%0\n\tst %D4,%1\n\tst %E4,%2\n\tst %F4,%3", operands);
return "";
}
return "stq %1,%0";
}
else
abort ();
}
const char *
i960_output_move_quad_zero (dst)
rtx dst;
{
rtx operands[4];
operands[0] = dst;
{
operands[1] = adjust_address (dst, word_mode, 4);
operands[2] = adjust_address (dst, word_mode, 8);
operands[3] = adjust_address (dst, word_mode, 12);
output_asm_insn ("st g14,%0\n\tst g14,%1\n\tst g14,%2\n\tst g14,%3", operands);
}
return "";
}
const char *
i960_output_ldconst (dst, src)
register rtx dst, src;
{
register int rsrc1;
register unsigned rsrc2;
enum machine_mode mode = GET_MODE (dst);
rtx operands[4];
operands[0] = operands[2] = dst;
operands[1] = operands[3] = src;
if (GET_CODE (src) != CONST_INT && GET_CODE (src) != CONST_DOUBLE)
{
output_asm_insn ("ldconst %1,%0", operands);
return "";
}
else if (mode == TFmode)
{
REAL_VALUE_TYPE d;
long value_long[3];
int i;
if (fp_literal_zero (src, TFmode))
return "movt 0,%0";
REAL_VALUE_FROM_CONST_DOUBLE (d, src);
REAL_VALUE_TO_TARGET_LONG_DOUBLE (d, value_long);
output_asm_insn ("# ldconst %1,%0",operands);
for (i = 0; i < 3; i++)
{
operands[0] = gen_rtx_REG (SImode, REGNO (dst) + i);
operands[1] = GEN_INT (value_long[i]);
output_asm_insn (i960_output_ldconst (operands[0], operands[1]),
operands);
}
return "";
}
else if (mode == DFmode)
{
rtx first, second;
if (fp_literal_zero (src, DFmode))
return "movl 0,%0";
split_double (src, &first, &second);
output_asm_insn ("# ldconst %1,%0",operands);
operands[0] = gen_rtx_REG (SImode, REGNO (dst));
operands[1] = first;
output_asm_insn (i960_output_ldconst (operands[0], operands[1]),
operands);
operands[0] = gen_rtx_REG (SImode, REGNO (dst) + 1);
operands[1] = second;
output_asm_insn (i960_output_ldconst (operands[0], operands[1]),
operands);
return "";
}
else if (mode == SFmode)
{
REAL_VALUE_TYPE d;
long value;
REAL_VALUE_FROM_CONST_DOUBLE (d, src);
REAL_VALUE_TO_TARGET_SINGLE (d, value);
output_asm_insn ("# ldconst %1,%0",operands);
operands[0] = gen_rtx_REG (SImode, REGNO (dst));
operands[1] = GEN_INT (value);
output_asm_insn (i960_output_ldconst (operands[0], operands[1]),
operands);
return "";
}
else if (mode == TImode)
{
abort ();
rsrc1 = INTVAL (src);
if (rsrc1 >= 0 && rsrc1 < 32)
return "movq %1,%0";
else
output_asm_insn ("movq\t0,%0\t# ldconstq %1,%0",operands);
}
else if (mode == DImode)
{
rtx upperhalf, lowerhalf, xoperands[2];
if (GET_CODE (src) == CONST_DOUBLE || GET_CODE (src) == CONST_INT)
split_double (src, &lowerhalf, &upperhalf);
else
abort ();
rsrc1 = INTVAL (lowerhalf);
if (upperhalf == const0_rtx && rsrc1 >= 0 && rsrc1 < 32)
return "movl %1,%0";
xoperands[0] = gen_rtx_REG (SImode, REGNO (dst) + 1);
xoperands[1] = upperhalf;
output_asm_insn (i960_output_ldconst (xoperands[0], xoperands[1]),
xoperands);
}
else
{
rsrc1 = INTVAL (src);
if (mode == QImode)
{
if (rsrc1 > 0xff)
rsrc1 &= 0xff;
}
else if (mode == HImode)
{
if (rsrc1 > 0xffff)
rsrc1 &= 0xffff;
}
}
if (rsrc1 >= 0)
{
if (rsrc1 < 32)
{
if (i960_last_insn_type == I_TYPE_REG && TARGET_C_SERIES)
return "lda %1,%0";
return "mov %1,%0";
}
if (rsrc1 < 63)
{
if (i960_last_insn_type == I_TYPE_REG && TARGET_C_SERIES)
return "lda %1,%0";
operands[1] = GEN_INT (rsrc1 - 31);
output_asm_insn ("addo\t31,%1,%0\t# ldconst %3,%0", operands);
return "";
}
}
else if (rsrc1 < 0)
{
if (rsrc1 >= -31)
{
operands[1] = GEN_INT (- rsrc1);
output_asm_insn ("subo\t%1,0,%0\t# ldconst %3,%0", operands);
return "";
}
if (rsrc1 == -32)
{
operands[1] = GEN_INT (~rsrc1);
output_asm_insn ("not\t%1,%0 # ldconst %3,%0", operands);
return "";
}
}
if (bitpos (rsrc1) >= 0)
{
operands[1] = GEN_INT (bitpos (rsrc1));
output_asm_insn ("setbit\t%1,0,%0\t# ldconst %3,%0", operands);
return "";
}
if (is_mask (rsrc1))
{
int s, e;
if (bitstr (rsrc1, &s, &e) < 6)
{
rsrc2 = ((unsigned int) rsrc1) >> s;
operands[1] = GEN_INT (rsrc2);
operands[2] = GEN_INT (s);
output_asm_insn ("shlo\t%2,%1,%0\t# ldconst %3,%0", operands);
return "";
}
}
output_asm_insn ("ldconst %1,%0", operands);
return "";
}
int
i960_bypass (insn, op1, op2, cmpbr_flag)
register rtx insn, op1, op2;
int cmpbr_flag;
{
register rtx prev_insn, prev_dest;
if (TARGET_C_SERIES)
return 0;
if (! REG_P (op1))
return 0;
if (cmpbr_flag && ! REG_P (op2))
return 0;
prev_insn = prev_real_insn (insn);
if (prev_insn && GET_CODE (prev_insn) == INSN
&& GET_CODE (PATTERN (prev_insn)) == SET)
{
prev_dest = SET_DEST (PATTERN (prev_insn));
if ((GET_CODE (prev_dest) == REG && REGNO (prev_dest) == REGNO (op1))
|| (GET_CODE (prev_dest) == SUBREG
&& GET_CODE (SUBREG_REG (prev_dest)) == REG
&& REGNO (SUBREG_REG (prev_dest)) == REGNO (op1)))
return 1;
}
return 0;
}
void
i960_function_name_declare (file, name, fndecl)
FILE *file;
const char *name;
tree fndecl;
{
register int i, j;
int leaf_proc_ok;
rtx insn;
ret_label++;
if (TARGET_TAILCALL)
tail_call_ok = 1;
else
tail_call_ok = 0;
if (TARGET_LEAFPROC)
leaf_proc_ok = 1;
else
leaf_proc_ok = 0;
if (current_function_args_size != 0 || VARARGS_STDARG_FUNCTION (fndecl))
{
tail_call_ok = 0;
leaf_proc_ok = 0;
}
if (aggregate_value_p (DECL_RESULT (fndecl)))
{
tail_call_ok = 0;
leaf_proc_ok = 0;
}
if (get_frame_size () != 0)
leaf_proc_ok = 0;
if (tail_call_ok)
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
if (GET_CODE (insn) == INSN
&& reg_mentioned_p (frame_pointer_rtx, insn))
{
tail_call_ok = 0;
break;
}
if (leaf_proc_ok)
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
if (GET_CODE (insn) == CALL_INSN)
{
leaf_proc_ok = 0;
break;
}
if (leaf_proc_ok)
for (i = 0, j = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (regs_ever_live[i]
&& ((! call_used_regs[i]) || (i > 7 && i < 12)))
{
if (i < 16 && i > 7 && i != 13)
leaf_proc_ok = 0;
else if (i < 32)
leaf_proc_ok = 0;
}
i960_leaf_ret_reg = -1;
if (optimize && leaf_proc_ok)
{
for (i960_leaf_ret_reg = -1, i = 0; i < 8; i++)
if (regs_ever_live[i] == 0)
{
i960_leaf_ret_reg = i;
regs_ever_live[i] = 1;
break;
}
}
fprintf (file, "\t# Function '%s'\n", (name[0] == '*' ? &name[1] : name));
fprintf (file, "\t# Registers used: ");
for (i = 0, j = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
if (regs_ever_live[i])
{
fprintf (file, "%s%s ", reg_names[i], call_used_regs[i] ? "" : "*");
if (i > 15 && j == 0)
{
fprintf (file,"\n\t#\t\t ");
j++;
}
}
}
fprintf (file, "\n");
if (i960_leaf_ret_reg >= 0)
{
if (TREE_PUBLIC (fndecl))
fprintf (file,"\t.globl\t%s.lf\n", (name[0] == '*' ? &name[1] : name));
fprintf (file, "\t.leafproc\t");
assemble_name (file, name);
fprintf (file, ",%s.lf\n", (name[0] == '*' ? &name[1] : name));
ASM_OUTPUT_LABEL (file, name);
fprintf (file, "\tlda Li960R%d,g14\n", ret_label);
fprintf (file, "%s.lf:\n", (name[0] == '*' ? &name[1] : name));
fprintf (file, "\tmov g14,g%d\n", i960_leaf_ret_reg);
if (TARGET_C_SERIES)
{
fprintf (file, "\tlda 0,g14\n");
i960_last_insn_type = I_TYPE_MEM;
}
else
{
fprintf (file, "\tmov 0,g14\n");
i960_last_insn_type = I_TYPE_REG;
}
}
else
{
ASM_OUTPUT_LABEL (file, name);
i960_last_insn_type = I_TYPE_CTRL;
}
}
int
compute_frame_size (size)
int size;
{
int actual_fsize;
int outgoing_args_size = current_function_outgoing_args_size;
actual_fsize = (size + 15) & -16;
actual_fsize += (outgoing_args_size + 15) & -16;
return actual_fsize;
}
struct reg_group
{
char start_reg;
char length;
};
static int i960_form_reg_groups PARAMS ((int, int, int *, int, struct reg_group *));
static int i960_reg_group_compare PARAMS ((const void *, const void *));
static int i960_split_reg_group PARAMS ((struct reg_group *, int, int));
static void i960_arg_size_and_align PARAMS ((enum machine_mode, tree, int *, int *));
static int
i960_form_reg_groups (start_reg, finish_reg, regs, state, reg_groups)
int start_reg;
int finish_reg;
int *regs;
int state;
struct reg_group *reg_groups;
{
int i;
int nw = 0;
for (i = start_reg; i < finish_reg; )
{
if (regs [i] != state)
{
i++;
continue;
}
else if (i % 2 != 0 || regs [i + 1] != state)
reg_groups [nw].length = 1;
else if (i % 4 != 0 || regs [i + 2] != state)
reg_groups [nw].length = 2;
else if (regs [i + 3] != state)
reg_groups [nw].length = 3;
else
reg_groups [nw].length = 4;
reg_groups [nw].start_reg = i;
i += reg_groups [nw].length;
nw++;
}
return nw;
}
static int
i960_reg_group_compare (group1, group2)
const void *group1;
const void *group2;
{
const struct reg_group *w1 = group1;
const struct reg_group *w2 = group2;
if (w1->length > w2->length)
return -1;
else if (w1->length < w2->length)
return 1;
else
return 0;
}
static int
i960_split_reg_group (reg_groups, nw, subgroup_length)
struct reg_group *reg_groups;
int nw;
int subgroup_length;
{
if (subgroup_length < reg_groups->length - subgroup_length)
subgroup_length = reg_groups->length - subgroup_length;
reg_groups[nw].length = reg_groups->length - subgroup_length;
reg_groups[nw].start_reg = reg_groups->start_reg + subgroup_length;
nw++;
reg_groups->length = subgroup_length;
qsort (reg_groups, nw, sizeof (struct reg_group), i960_reg_group_compare);
return nw;
}
static void
i960_output_function_prologue (file, size)
FILE *file;
HOST_WIDE_INT size;
{
register int i, j, nr;
int n_saved_regs = 0;
int n_remaining_saved_regs;
HOST_WIDE_INT lvar_size;
HOST_WIDE_INT actual_fsize, offset;
int gnw, lnw;
struct reg_group *g, *l;
char tmpstr[1000];
int regs[FIRST_PSEUDO_REGISTER];
struct reg_group global_reg_groups [16];
struct reg_group local_reg_groups [16];
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (regs_ever_live[i]
&& ((! call_used_regs[i]) || (i > 7 && i < 12))
&& ! (i == STATIC_CHAIN_REGNUM && current_function_needs_context))
{
regs[i] = -1;
if (i < 16)
n_saved_regs++;
}
else
regs[i] = 0;
n_remaining_saved_regs = n_saved_regs;
epilogue_string[0] = '\0';
if (current_function_profile)
{
for (j = 7; j >= 0 && ! regs_ever_live[j]; j--)
;
for (i = 20; i <= j + 20; i++)
regs[i] = -1;
}
gnw = i960_form_reg_groups (0, 16, regs, -1, global_reg_groups);
lnw = i960_form_reg_groups (19, 32, regs, 0, local_reg_groups);
qsort (global_reg_groups, gnw, sizeof (struct reg_group),
i960_reg_group_compare);
qsort (local_reg_groups, lnw, sizeof (struct reg_group),
i960_reg_group_compare);
for (g = global_reg_groups, l = local_reg_groups; lnw != 0 && gnw != 0;)
{
if (g->length == l->length)
{
fprintf (file, "\tmov%s %s,%s\n",
((g->length == 4) ? "q" :
(g->length == 3) ? "t" :
(g->length == 2) ? "l" : ""),
reg_names[(unsigned char) g->start_reg],
reg_names[(unsigned char) l->start_reg]);
sprintf (tmpstr, "\tmov%s %s,%s\n",
((g->length == 4) ? "q" :
(g->length == 3) ? "t" :
(g->length == 2) ? "l" : ""),
reg_names[(unsigned char) l->start_reg],
reg_names[(unsigned char) g->start_reg]);
strcat (epilogue_string, tmpstr);
n_remaining_saved_regs -= g->length;
for (i = 0; i < g->length; i++)
{
regs [i + g->start_reg] = 1;
regs [i + l->start_reg] = -1;
regs_ever_live [i + l->start_reg] = 1;
}
g++;
l++;
gnw--;
lnw--;
}
else if (g->length > l->length)
gnw = i960_split_reg_group (g, gnw, l->length);
else
lnw = i960_split_reg_group (l, lnw, g->length);
}
actual_fsize = compute_frame_size (size) + 4 * n_remaining_saved_regs;
#if 0
actual_fsize = (actual_fsize + 15) & ~0xF;
#endif
if (current_function_limit_stack)
{
rtx min_stack = stack_limit_rtx;
if (actual_fsize != 0)
min_stack = plus_constant (stack_limit_rtx, -actual_fsize);
if (legitimate_address_p (Pmode, min_stack, 1)
&& !arith_operand (min_stack, Pmode))
{
rtx tmp = gen_rtx_MEM (Pmode, min_stack);
fputs ("\tlda\t", file);
i960_print_operand (file, tmp, 0);
fputs (",r4\n", file);
min_stack = gen_rtx_REG (Pmode, 20);
}
if (arith_operand (min_stack, Pmode))
{
fputs ("\tcmpo\tsp,", file);
i960_print_operand (file, min_stack, 0);
fputs ("\n\tfaultge.f\n", file);
}
else
warning ("stack limit expression is not supported");
}
if (actual_fsize > 0)
{
if (actual_fsize < 32)
fprintf (file, "\taddo %d,sp,sp\n", actual_fsize);
else
fprintf (file, "\tlda\t%d(sp),sp\n", actual_fsize);
}
lvar_size = actual_fsize - compute_frame_size (0) - n_remaining_saved_regs * 4;
offset = STARTING_FRAME_OFFSET + lvar_size;
for (i = 0, j = n_remaining_saved_regs; j > 0 && i < 16; i++)
{
if (regs[i] != -1)
continue;
nr = 1;
if (i <= 14 && i % 2 == 0 && regs[i+1] == -1 && offset % 2 == 0)
nr = 2;
if (nr == 2 && i <= 12 && i % 4 == 0 && regs[i+2] == -1
&& offset % 4 == 0)
nr = 3;
if (nr == 3 && regs[i+3] == -1)
nr = 4;
fprintf (file,"\tst%s %s,%d(fp)\n",
((nr == 4) ? "q" :
(nr == 3) ? "t" :
(nr == 2) ? "l" : ""),
reg_names[i], offset);
sprintf (tmpstr,"\tld%s %d(fp),%s\n",
((nr == 4) ? "q" :
(nr == 3) ? "t" :
(nr == 2) ? "l" : ""),
offset, reg_names[i]);
strcat (epilogue_string, tmpstr);
i += nr-1;
j -= nr;
offset += nr * 4;
}
if (actual_fsize == 0)
return;
fprintf (file, "\t#Prologue stats:\n");
fprintf (file, "\t# Total Frame Size: %d bytes\n", actual_fsize);
if (lvar_size)
fprintf (file, "\t# Local Variable Size: %d bytes\n", lvar_size);
if (n_saved_regs)
fprintf (file, "\t# Register Save Size: %d regs, %d bytes\n",
n_saved_regs, n_saved_regs * 4);
fprintf (file, "\t#End Prologue#\n");
}
void
output_function_profiler (file, labelno)
FILE *file;
int labelno;
{
int last_parm_reg;
int i, j, increment;
int varargs_stdarg_function
= VARARGS_STDARG_FUNCTION (current_function_decl);
for (last_parm_reg = 7;
last_parm_reg >= 0 && ! regs_ever_live[last_parm_reg];
last_parm_reg--)
;
for (i = 0, j = 4; i <= last_parm_reg; i += increment, j += increment)
{
if (i % 4 == 0 && (last_parm_reg - i) >= 3)
increment = 4;
else if (i % 4 == 0 && (last_parm_reg - i) >= 2)
increment = 3;
else if (i % 2 == 0 && (last_parm_reg - i) >= 1)
increment = 2;
else
increment = 1;
fprintf (file, "\tmov%s g%d,r%d\n",
(increment == 4 ? "q" : increment == 3 ? "t"
: increment == 2 ? "l": ""), i, j);
}
if (current_function_args_size != 0 || varargs_stdarg_function)
fprintf (file, "\tmov g14,r3\n\tmov 0,g14\n");
fprintf (file, "\tlda\tLP%d,g0\n\tcallx\tmcount\n", labelno);
if (current_function_args_size != 0 || varargs_stdarg_function)
fprintf (file, "\tmov r3,g14\n");
for (i = 0, j = 4; i <= last_parm_reg; i += increment, j += increment)
{
if (i % 4 == 0 && (last_parm_reg - i) >= 3)
increment = 4;
else if (i % 4 == 0 && (last_parm_reg - i) >= 2)
increment = 3;
else if (i % 2 == 0 && (last_parm_reg - i) >= 1)
increment = 2;
else
increment = 1;
fprintf (file, "\tmov%s r%d,g%d\n",
(increment == 4 ? "q" : increment == 3 ? "t"
: increment == 2 ? "l": ""), j, i);
}
}
static void
i960_output_function_epilogue (file, size)
FILE *file;
HOST_WIDE_INT size ATTRIBUTE_UNUSED;
{
if (i960_leaf_ret_reg >= 0)
{
fprintf (file, "Li960R%d: ret\n", ret_label);
return;
}
if (*epilogue_string == 0)
{
register rtx tmp;
tmp = get_last_insn ();
while (tmp)
{
if (GET_CODE (tmp) == BARRIER)
return;
if (GET_CODE (tmp) == CODE_LABEL)
break;
if (GET_CODE (tmp) == JUMP_INSN)
{
if (GET_CODE (PATTERN (tmp)) == RETURN)
return;
break;
}
if (GET_CODE (tmp) == NOTE)
{
tmp = PREV_INSN (tmp);
continue;
}
break;
}
fprintf (file, "Li960R%d: ret\n", ret_label);
return;
}
fprintf (file, "Li960R%d:\n", ret_label);
fprintf (file, "\t#EPILOGUE#\n");
if (epilogue_string[0] != '\0')
fprintf (file, "%s", epilogue_string);
if (VARARGS_STDARG_FUNCTION (current_function_decl))
fprintf (file, "\tmov 0,g14\n");
fprintf (file, "\tret\n");
fprintf (file, "\t#End Epilogue#\n");
}
const char *
i960_output_call_insn (target, argsize_rtx, arg_pointer, insn)
register rtx target, argsize_rtx, arg_pointer, insn;
{
int argsize = INTVAL (argsize_rtx);
rtx nexti = next_real_insn (insn);
rtx operands[2];
int varargs_stdarg_function
= VARARGS_STDARG_FUNCTION (current_function_decl);
operands[0] = target;
operands[1] = arg_pointer;
if (current_function_args_size != 0 || varargs_stdarg_function)
output_asm_insn ("mov g14,r3", operands);
if (argsize > 48)
output_asm_insn ("lda %a1,g14", operands);
else if (current_function_args_size != 0 || varargs_stdarg_function)
output_asm_insn ("mov 0,g14", operands);
if (optimize && (*epilogue_string == 0) && argsize == 0 && tail_call_ok
&& (nexti == 0 || GET_CODE (PATTERN (nexti)) == RETURN))
{
if (nexti && no_labels_between_p (insn, nexti))
delete_insn (nexti);
output_asm_insn ("bx %0", operands);
return "# notreached";
}
output_asm_insn ("callx %0", operands);
if (current_function_args_size != 0 || varargs_stdarg_function)
output_asm_insn ("mov r3,g14", operands);
else if (argsize > 48)
output_asm_insn ("mov 0,g14", operands);
return "";
}
const char *
i960_output_ret_insn (insn)
register rtx insn;
{
static char lbuf[20];
if (*epilogue_string != 0)
{
if (! TARGET_CODE_ALIGN && next_real_insn (insn) == 0)
return "";
sprintf (lbuf, "b Li960R%d", ret_label);
return lbuf;
}
if (VARARGS_STDARG_FUNCTION (current_function_decl))
output_asm_insn ("mov 0,g14", 0);
if (i960_leaf_ret_reg >= 0)
{
sprintf (lbuf, "bx (%s)", reg_names[i960_leaf_ret_reg]);
return lbuf;
}
return "ret";
}
void
i960_print_operand (file, x, code)
FILE *file;
rtx x;
int code;
{
enum rtx_code rtxcode = x ? GET_CODE (x) : NIL;
if (rtxcode == REG)
{
switch (code)
{
case 'D':
fprintf (file, "%s", reg_names[REGNO (x)+1]);
break;
case 'E':
fprintf (file, "%s", reg_names[REGNO (x)+2]);
break;
case 'F':
fprintf (file, "%s", reg_names[REGNO (x)+3]);
break;
case 0:
fprintf (file, "%s", reg_names[REGNO (x)]);
break;
default:
abort ();
}
return;
}
else if (rtxcode == MEM)
{
output_address (XEXP (x, 0));
return;
}
else if (rtxcode == CONST_INT)
{
HOST_WIDE_INT val = INTVAL (x);
if (code == 'C')
val = ~val;
if (val > 9999 || val < -999)
fprintf (file, "0x%x", val);
else
fprintf (file, "%d", val);
return;
}
else if (rtxcode == CONST_DOUBLE)
{
char dstr[30];
if (x == CONST0_RTX (GET_MODE (x)))
{
fprintf (file, "0f0.0");
return;
}
else if (x == CONST1_RTX (GET_MODE (x)))
{
fprintf (file, "0f1.0");
return;
}
real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (x), sizeof (dstr), 0, 1);
fprintf (file, "0f%s", dstr);
return;
}
switch(code)
{
case 'B':
if (TARGET_ASM_COMPAT)
fputs ("j", file);
else
fputs ("b", file);
break;
case 'S':
if ((rtxcode == EQ) || (rtxcode == NE) || (rtxcode == GTU)
|| (rtxcode == LTU) || (rtxcode == GEU) || (rtxcode == LEU))
fputs ("o", file);
else if ((rtxcode == GT) || (rtxcode == LT)
|| (rtxcode == GE) || (rtxcode == LE))
fputs ("i", file);
else
abort();
break;
case 'I':
rtxcode = reverse_condition (rtxcode);
goto normal;
case 'X':
rtxcode = reverse_condition (rtxcode);
case 'R':
rtxcode = swap_condition (rtxcode);
case 'C':
normal:
if (rtxcode == EQ) { fputs ("e", file); return; }
else if (rtxcode == NE) { fputs ("ne", file); return; }
else if (rtxcode == GT) { fputs ("g", file); return; }
else if (rtxcode == GTU) { fputs ("g", file); return; }
else if (rtxcode == LT) { fputs ("l", file); return; }
else if (rtxcode == LTU) { fputs ("l", file); return; }
else if (rtxcode == GE) { fputs ("ge", file); return; }
else if (rtxcode == GEU) { fputs ("ge", file); return; }
else if (rtxcode == LE) { fputs ("le", file); return; }
else if (rtxcode == LEU) { fputs ("le", file); return; }
else abort ();
break;
case '+':
if (TARGET_BRANCH_PREDICT)
{
x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
if (x)
{
int pred_val = INTVAL (XEXP (x, 0));
fputs ((pred_val < REG_BR_PROB_BASE / 2 ? ".f" : ".t"), file);
}
}
break;
case 0:
output_addr_const (file, x);
break;
default:
abort ();
}
return;
}
void
i960_print_operand_addr (file, addr)
FILE *file;
register rtx addr;
{
rtx breg, ireg;
rtx scale, offset;
ireg = 0;
breg = 0;
offset = 0;
scale = const1_rtx;
if (GET_CODE (addr) == REG)
breg = addr;
else if (CONSTANT_P (addr))
offset = addr;
else if (GET_CODE (addr) == PLUS)
{
rtx op0, op1;
op0 = XEXP (addr, 0);
op1 = XEXP (addr, 1);
if (GET_CODE (op0) == REG)
{
breg = op0;
if (GET_CODE (op1) == REG)
ireg = op1;
else if (CONSTANT_P (op1))
offset = op1;
else
abort ();
}
else if (GET_CODE (op0) == PLUS)
{
if (GET_CODE (XEXP (op0, 0)) == MULT)
{
ireg = XEXP (XEXP (op0, 0), 0);
scale = XEXP (XEXP (op0, 0), 1);
if (GET_CODE (XEXP (op0, 1)) == REG)
{
breg = XEXP (op0, 1);
offset = op1;
}
else
abort ();
}
else if (GET_CODE (XEXP (op0, 0)) == REG)
{
breg = XEXP (op0, 0);
if (GET_CODE (XEXP (op0, 1)) == REG)
{
ireg = XEXP (op0, 1);
offset = op1;
}
else
abort ();
}
else
abort ();
}
else if (GET_CODE (op0) == MULT)
{
ireg = XEXP (op0, 0);
scale = XEXP (op0, 1);
if (GET_CODE (op1) == REG)
breg = op1;
else if (CONSTANT_P (op1))
offset = op1;
else
abort ();
}
else
abort ();
}
else if (GET_CODE (addr) == MULT)
{
ireg = XEXP (addr, 0);
scale = XEXP (addr, 1);
}
else
abort ();
if (offset)
output_addr_const (file, offset);
if (breg)
fprintf (file, "(%s)", reg_names[REGNO (breg)]);
if (ireg)
fprintf (file, "[%s*%d]", reg_names[REGNO (ireg)], INTVAL (scale));
}
#define RTX_OK_FOR_BASE_P(X, STRICT) \
((GET_CODE (X) == REG \
&& (STRICT ? REG_OK_FOR_BASE_P_STRICT (X) : REG_OK_FOR_BASE_P (X))) \
|| (GET_CODE (X) == SUBREG \
&& GET_CODE (SUBREG_REG (X)) == REG \
&& (STRICT ? REG_OK_FOR_BASE_P_STRICT (SUBREG_REG (X)) \
: REG_OK_FOR_BASE_P (SUBREG_REG (X)))))
#define RTX_OK_FOR_INDEX_P(X, STRICT) \
((GET_CODE (X) == REG \
&& (STRICT ? REG_OK_FOR_INDEX_P_STRICT (X) : REG_OK_FOR_INDEX_P (X)))\
|| (GET_CODE (X) == SUBREG \
&& GET_CODE (SUBREG_REG (X)) == REG \
&& (STRICT ? REG_OK_FOR_INDEX_P_STRICT (SUBREG_REG (X)) \
: REG_OK_FOR_INDEX_P (SUBREG_REG (X)))))
int
legitimate_address_p (mode, addr, strict)
enum machine_mode mode ATTRIBUTE_UNUSED;
register rtx addr;
int strict;
{
if (RTX_OK_FOR_BASE_P (addr, strict))
return 1;
else if (CONSTANT_P (addr))
return 1;
else if (GET_CODE (addr) == PLUS)
{
rtx op0, op1;
if (! TARGET_COMPLEX_ADDR && ! reload_completed)
return 0;
op0 = XEXP (addr, 0);
op1 = XEXP (addr, 1);
if (RTX_OK_FOR_BASE_P (op0, strict))
{
if (RTX_OK_FOR_INDEX_P (op1, strict))
return 1;
else if (CONSTANT_P (op1))
return 1;
else
return 0;
}
else if (GET_CODE (op0) == PLUS)
{
if (GET_CODE (XEXP (op0, 0)) == MULT)
{
if (! (RTX_OK_FOR_INDEX_P (XEXP (XEXP (op0, 0), 0), strict)
&& SCALE_TERM_P (XEXP (XEXP (op0, 0), 1))))
return 0;
if (RTX_OK_FOR_BASE_P (XEXP (op0, 1), strict)
&& CONSTANT_P (op1))
return 1;
else
return 0;
}
else if (RTX_OK_FOR_BASE_P (XEXP (op0, 0), strict))
{
if (RTX_OK_FOR_INDEX_P (XEXP (op0, 1), strict)
&& CONSTANT_P (op1))
return 1;
else
return 0;
}
else
return 0;
}
else if (GET_CODE (op0) == MULT)
{
if (! (RTX_OK_FOR_INDEX_P (XEXP (op0, 0), strict)
&& SCALE_TERM_P (XEXP (op0, 1))))
return 0;
if (RTX_OK_FOR_BASE_P (op1, strict))
return 1;
else if (CONSTANT_P (op1))
return 1;
else
return 0;
}
else
return 0;
}
else if (GET_CODE (addr) == MULT)
{
if (! TARGET_COMPLEX_ADDR && ! reload_completed)
return 0;
return (RTX_OK_FOR_INDEX_P (XEXP (addr, 0), strict)
&& SCALE_TERM_P (XEXP (addr, 1)));
}
else
return 0;
}
rtx
legitimize_address (x, oldx, mode)
register rtx x;
register rtx oldx ATTRIBUTE_UNUSED;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (x) == SYMBOL_REF)
{
abort ();
x = copy_to_reg (x);
}
if (! TARGET_COMPLEX_ADDR && ! reload_completed)
return x;
if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == MULT
&& GET_CODE (XEXP (x, 1)) == PLUS)
x = gen_rtx_PLUS (Pmode,
gen_rtx_PLUS (Pmode, XEXP (x, 0), XEXP (XEXP (x, 1), 0)),
XEXP (XEXP (x, 1), 1));
else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == PLUS
&& CONSTANT_P (XEXP (x, 1)))
{
rtx constant, other;
if (GET_CODE (XEXP (x, 1)) == CONST_INT)
{
constant = XEXP (x, 1);
other = XEXP (XEXP (XEXP (x, 0), 1), 1);
}
else if (GET_CODE (XEXP (XEXP (XEXP (x, 0), 1), 1)) == CONST_INT)
{
constant = XEXP (XEXP (XEXP (x, 0), 1), 1);
other = XEXP (x, 1);
}
else
constant = 0, other = 0;
if (constant)
x = gen_rtx_PLUS (Pmode,
gen_rtx_PLUS (Pmode, XEXP (XEXP (x, 0), 0),
XEXP (XEXP (XEXP (x, 0), 1), 0)),
plus_constant (other, INTVAL (constant)));
}
return x;
}
#if 0
int
i960_alignment (size, align)
int size;
int align;
{
int i;
if (! TARGET_STRICT_ALIGN)
if (TARGET_IC_COMPAT2_0 || align >= 4)
{
i = i960_object_bytes_bitalign (size) / BITS_PER_UNIT;
if (i > align)
align = i;
}
return align;
}
#endif
int
hard_regno_mode_ok (regno, mode)
int regno;
enum machine_mode mode;
{
if (regno < 32)
{
switch (mode)
{
case CCmode: case CC_UNSmode: case CC_CHKmode:
return 0;
case DImode: case DFmode:
return (regno & 1) == 0;
case TImode: case TFmode:
return (regno & 3) == 0;
default:
return 1;
}
}
else if (regno >= 32 && regno < 36)
{
switch (mode)
{
case SFmode: case DFmode: case TFmode:
case SCmode: case DCmode:
return 1;
default:
return 0;
}
}
else if (regno == 36)
{
switch (mode)
{
case CCmode: case CC_UNSmode: case CC_CHKmode:
return 1;
default:
return 0;
}
}
else if (regno == 37)
return 0;
abort ();
}
int
i960_expr_alignment (x, size)
rtx x;
int size;
{
int align = 1;
if (x == 0)
return 1;
switch (GET_CODE(x))
{
case CONST_INT:
align = INTVAL(x);
if ((align & 0xf) == 0)
align = 16;
else if ((align & 0x7) == 0)
align = 8;
else if ((align & 0x3) == 0)
align = 4;
else if ((align & 0x1) == 0)
align = 2;
else
align = 1;
break;
case PLUS:
align = MIN (i960_expr_alignment (XEXP (x, 0), size),
i960_expr_alignment (XEXP (x, 1), size));
break;
case SYMBOL_REF:
align = i960_object_bytes_bitalign (size) / BITS_PER_UNIT;
break;
case REG:
if (REGNO (x) == FRAME_POINTER_REGNUM)
align = 16;
break;
case ASHIFT:
align = i960_expr_alignment (XEXP (x, 0), size);
if (GET_CODE (XEXP (x, 1)) == CONST_INT)
{
align = align << INTVAL (XEXP (x, 1));
align = MIN (align, 16);
}
break;
case MULT:
align = (i960_expr_alignment (XEXP (x, 0), size) *
i960_expr_alignment (XEXP (x, 1), size));
align = MIN (align, 16);
break;
default:
break;
}
return align;
}
int
i960_improve_align (base, offset, size)
rtx base;
rtx offset;
int size;
{
int i, j;
i = MIN (i960_expr_alignment (base, 4),
i960_expr_alignment (offset, 4));
i = MAX (i, 4);
if (! TARGET_STRICT_ALIGN)
if ((j = (i960_object_bytes_bitalign (size) / BITS_PER_UNIT)) > i)
i = j;
return (i >= size);
}
int
i960_si_ti (base, offset)
rtx base;
rtx offset;
{
return i960_improve_align (base, offset, 16);
}
int
i960_si_di (base, offset)
rtx base;
rtx offset;
{
return i960_improve_align (base, offset, 8);
}
static void
i960_arg_size_and_align (mode, type, size_out, align_out)
enum machine_mode mode;
tree type;
int *size_out;
int *align_out;
{
int size, align;
if (mode == BLKmode)
size = (int_size_in_bytes (type) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
else if (mode == VOIDmode)
{
if (type == 0 || TYPE_MODE (type) != VOIDmode)
abort ();
size = 1;
}
else
size = (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
if (type == 0)
align = size;
else if (TYPE_ALIGN (type) >= BITS_PER_WORD)
align = TYPE_ALIGN (type) / BITS_PER_WORD;
else
align = 1;
*size_out = size;
*align_out = align;
}
void
i960_function_arg_advance (cum, mode, type, named)
CUMULATIVE_ARGS *cum;
enum machine_mode mode;
tree type;
int named ATTRIBUTE_UNUSED;
{
int size, align;
i960_arg_size_and_align (mode, type, &size, &align);
if (size > 4 || cum->ca_nstackparms != 0
|| (size + ROUND_PARM (cum->ca_nregparms, align)) > NPARM_REGS
|| MUST_PASS_IN_STACK (mode, type))
{
cum->ca_nregparms = NPARM_REGS;
cum->ca_nstackparms = ROUND_PARM (cum->ca_nstackparms, align) + size;
}
else
cum->ca_nregparms = ROUND_PARM (cum->ca_nregparms, align) + size;
}
rtx
i960_function_arg (cum, mode, type, named)
CUMULATIVE_ARGS *cum;
enum machine_mode mode;
tree type;
int named ATTRIBUTE_UNUSED;
{
rtx ret;
int size, align;
if (mode == VOIDmode)
return 0;
i960_arg_size_and_align (mode, type, &size, &align);
if (size > 4 || cum->ca_nstackparms != 0
|| (size + ROUND_PARM (cum->ca_nregparms, align)) > NPARM_REGS
|| MUST_PASS_IN_STACK (mode, type))
{
cum->ca_nstackparms = ROUND_PARM (cum->ca_nstackparms, align);
ret = 0;
}
else
{
cum->ca_nregparms = ROUND_PARM (cum->ca_nregparms, align);
ret = gen_rtx_REG (mode, cum->ca_nregparms);
}
return ret;
}
int
i960_object_bytes_bitalign (n)
int n;
{
if (n > 8) n = 128;
else if (n > 4) n = 64;
else if (n > 2) n = 32;
else if (n > 1) n = 16;
else n = 8;
return n;
}
int
i960_round_align (align, type)
int align;
tree type;
{
int new_align;
tree tsize;
if (TARGET_OLD_ALIGN || TYPE_PACKED (type))
return align;
if (TREE_CODE (type) != RECORD_TYPE)
return align;
tsize = TYPE_SIZE (type);
if (! tsize || TREE_CODE (tsize) != INTEGER_CST)
return align;
new_align = i960_object_bytes_bitalign (TREE_INT_CST_LOW (tsize)
/ BITS_PER_UNIT);
if (new_align > i960_maxbitalignment)
new_align = i960_maxbitalignment;
if (align < new_align)
align = new_align;
return align;
}
void
i960_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
CUMULATIVE_ARGS *cum;
enum machine_mode mode ATTRIBUTE_UNUSED;
tree type ATTRIBUTE_UNUSED;
int *pretend_size ATTRIBUTE_UNUSED;
int no_rtl;
{
int first_reg = cum->ca_nregparms;
if (cum->ca_nstackparms == 0 && first_reg < NPARM_REGS && !no_rtl)
{
rtx label = gen_label_rtx ();
rtx regblock, fake_arg_pointer_rtx;
fake_arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
emit_insn (gen_cmpsi (fake_arg_pointer_rtx, const0_rtx));
emit_jump_insn (gen_bne (label));
emit_insn (gen_rtx_SET (VOIDmode, fake_arg_pointer_rtx,
stack_pointer_rtx));
emit_insn (gen_rtx_SET (VOIDmode, stack_pointer_rtx,
memory_address (SImode,
plus_constant (stack_pointer_rtx,
48))));
emit_label (label);
regblock = gen_rtx_MEM (BLKmode,
plus_constant (arg_pointer_rtx, first_reg * 4));
set_mem_alias_set (regblock, get_varargs_alias_set ());
set_mem_align (regblock, BITS_PER_WORD);
move_block_from_reg (first_reg, regblock,
NPARM_REGS - first_reg,
(NPARM_REGS - first_reg) * UNITS_PER_WORD);
}
}
tree
i960_build_va_list ()
{
return build_array_type (unsigned_type_node,
build_index_type (size_one_node));
}
void
i960_va_start (valist, nextarg)
tree valist;
rtx nextarg ATTRIBUTE_UNUSED;
{
tree s, t, base, num;
rtx fake_arg_pointer_rtx;
base = build1 (INDIRECT_REF, unsigned_type_node, valist);
num = build1 (INDIRECT_REF, unsigned_type_node,
build (PLUS_EXPR, unsigned_type_node, valist,
TYPE_SIZE_UNIT (TREE_TYPE (valist))));
fake_arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
s = make_tree (unsigned_type_node, fake_arg_pointer_rtx);
t = build (MODIFY_EXPR, unsigned_type_node, base, s);
TREE_SIDE_EFFECTS (t) = 1;
expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
s = build_int_2 ((current_function_args_info.ca_nregparms
+ current_function_args_info.ca_nstackparms) * 4, 0);
t = build (MODIFY_EXPR, unsigned_type_node, num, s);
TREE_SIDE_EFFECTS (t) = 1;
expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
}
rtx
i960_va_arg (valist, type)
tree valist, type;
{
HOST_WIDE_INT siz, ali;
tree base, num, pad, next, this, t1, t2, int48;
rtx addr_rtx;
base = build1 (INDIRECT_REF, unsigned_type_node, valist);
num = build1 (INDIRECT_REF, unsigned_type_node,
build (PLUS_EXPR, unsigned_type_node, valist,
TYPE_SIZE_UNIT (TREE_TYPE (valist))));
siz = (int_size_in_bytes (type) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD;
ali = TYPE_ALIGN (type);
if (ali < BITS_PER_WORD)
ali = BITS_PER_WORD;
ali /= BITS_PER_UNIT;
pad = fold (build (PLUS_EXPR, unsigned_type_node, num,
build_int_2 (ali - 1, 0)));
pad = fold (build (BIT_AND_EXPR, unsigned_type_node, pad,
build_int_2 (-ali, -1)));
pad = save_expr (pad);
next = fold (build (PLUS_EXPR, unsigned_type_node, pad,
build_int_2 (siz, 0)));
next = save_expr (next);
int48 = build_int_2 (48, 0);
if (siz > 16)
t2 = integer_one_node;
else
t2 = fold (build (GT_EXPR, integer_type_node, next, int48));
t1 = fold (build (LE_EXPR, integer_type_node, num, int48));
t1 = fold (build (TRUTH_AND_EXPR, integer_type_node, t1, t2));
this = fold (build (COND_EXPR, unsigned_type_node, t1, int48, pad));
t1 = fold (build (PLUS_EXPR, unsigned_type_node, base, this));
t1 = build1 (NOP_EXPR, ptr_type_node, t1);
addr_rtx = expand_expr (t1, NULL_RTX, Pmode, EXPAND_NORMAL);
t1 = build (MODIFY_EXPR, unsigned_type_node, num, next);
TREE_SIDE_EFFECTS (t1) = 1;
expand_expr (t1, const0_rtx, VOIDmode, EXPAND_NORMAL);
return addr_rtx;
}
int
i960_final_reg_parm_stack_space (const_size, var_size)
int const_size;
tree var_size;
{
if (var_size || const_size > 48)
return 48;
else
return 0;
}
int
i960_reg_parm_stack_space (fndecl)
tree fndecl;
{
if (fndecl == 0)
return 0;
if (fndecl != current_function_decl)
return 48;
if (current_function_args_size != 0 || VARARGS_STDARG_FUNCTION (fndecl))
return 48;
else
return 0;
}
enum reg_class
secondary_reload_class (class, mode, in)
enum reg_class class;
enum machine_mode mode;
rtx in;
{
int regno = -1;
if (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
regno = true_regnum (in);
if (class == LOCAL_OR_GLOBAL_REGS || class == LOCAL_REGS
|| class == GLOBAL_REGS || (regno >= 0 && regno < 32))
return NO_REGS;
if (class == FP_REGS
&& ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
|| in == CONST0_RTX (mode) || in == CONST1_RTX (mode)))
return NO_REGS;
return LOCAL_OR_GLOBAL_REGS;
}
void
i960_scan_opcode (p)
const char *p;
{
switch (*p)
{
case 'a':
case 'd':
case 'e':
case 'm':
case 'n':
case 'o':
case 'r':
case 'u':
case 'x':
i960_last_insn_type = I_TYPE_REG;
break;
case 'b':
if (p[1] == 'x' || p[3] == 'x')
i960_last_insn_type = I_TYPE_MEM;
i960_last_insn_type = I_TYPE_CTRL;
break;
case 'f':
case 't':
i960_last_insn_type = I_TYPE_CTRL;
break;
case 'c':
if (p[1] == 'a')
{
if (p[4] == 'x')
i960_last_insn_type = I_TYPE_MEM;
else
i960_last_insn_type = I_TYPE_CTRL;
}
else if (p[1] == 'm')
{
if (p[3] == 'd')
i960_last_insn_type = I_TYPE_REG;
else if (p[4] == 'b' || p[4] == 'j')
i960_last_insn_type = I_TYPE_CTRL;
else
i960_last_insn_type = I_TYPE_REG;
}
else
i960_last_insn_type = I_TYPE_REG;
break;
case 'l':
i960_last_insn_type = I_TYPE_MEM;
break;
case 's':
if (p[1] == 't')
i960_last_insn_type = I_TYPE_MEM;
else
i960_last_insn_type = I_TYPE_REG;
break;
}
}
static void
i960_output_mi_thunk (file, thunk, delta, vcall_offset, function)
FILE *file;
tree thunk ATTRIBUTE_UNUSED;
HOST_WIDE_INT delta;
HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED;
tree function;
{
int d = delta;
if (d < 0 && d > -32)
fprintf (file, "\tsubo %d,g0,g0\n", -d);
else if (d > 0 && d < 32)
fprintf (file, "\taddo %d,g0,g0\n", d);
else
{
fprintf (file, "\tldconst %d,r5\n", d);
fprintf (file, "\taddo r5,g0,g0\n");
}
fprintf (file, "\tbx ");
assemble_name (file, XSTR (XEXP (DECL_RTL (function), 0), 0));
fprintf (file, "\n");
}