#include "config.h"
#include "system.h"
#include "rtl.h"
#include "tree.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "real.h"
#include "insn-config.h"
#include "conditions.h"
#include "insn-flags.h"
#include "output.h"
#include "insn-attr.h"
#include "flags.h"
#include "recog.h"
#include "reload.h"
#include "expr.h"
#include "obstack.h"
#include "except.h"
#include "function.h"
#include "optabs.h"
#include "toplev.h"
#include "basic-block.h"
#include "tm_p.h"
#include "ggc.h"
#include <ctype.h>
#include "target.h"
#include "target-def.h"
#ifndef FRV_INLINE
#define FRV_INLINE inline
#endif
typedef struct frv_tmp_reg_struct
{
HARD_REG_SET regs;
int next_reg[N_REG_CLASSES];
}
frv_tmp_reg_t;
#define REGSTATE_DEAD 0x00
#define REGSTATE_CC_MASK 0x07
#define REGSTATE_LIVE 0x08
#define REGSTATE_MODIFIED 0x10
#define REGSTATE_IF_TRUE 0x20
#define REGSTATE_IF_FALSE 0x40
#define REGSTATE_UNUSED 0x80
#define REGSTATE_MASK 0xff
#define REGSTATE_IF_EITHER (REGSTATE_IF_TRUE | REGSTATE_IF_FALSE)
#define REGSTATE_CONDJUMP 0x100
enum frv_stack_op
{
FRV_LOAD,
FRV_STORE
};
typedef struct
{
enum frv_stack_op op;
rtx base;
int base_offset;
} frv_frame_accessor_t;
rtx frv_compare_op0;
rtx frv_compare_op1;
typedef struct
{
rtx added_insns_list;
frv_tmp_reg_t tmp_reg;
HARD_REG_SET nested_cc_ok_rewrite;
rtx scratch_regs[FIRST_PSEUDO_REGISTER];
int cur_scratch_regs;
int num_nested_cond_exec;
bitmap scratch_insns_bitmap;
rtx cr_reg;
rtx nested_cc_reg;
rtx extra_int_cr;
rtx extra_fp_cr;
rtx last_nested_if_cr;
}
frv_ifcvt_t;
static frv_ifcvt_t frv_ifcvt;
enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
enum reg_class reg_class_from_letter[256];
static frv_stack_t *frv_stack_cache = (frv_stack_t *)0;
const char *frv_branch_cost_string;
int frv_branch_cost_int = DEFAULT_BRANCH_COST;
const char *frv_cpu_string;
frv_cpu_t frv_cpu_type = CPU_TYPE;
const char *frv_condexec_insns_str;
int frv_condexec_insns = DEFAULT_CONDEXEC_INSNS;
const char *frv_condexec_temps_str;
int frv_condexec_temps = DEFAULT_CONDEXEC_TEMPS;
const char *frv_sched_lookahead_str;
int frv_sched_lookahead = 4;
static int frv_default_flags_for_cpu PARAMS ((void));
static int frv_string_begins_with PARAMS ((tree, const char *));
static FRV_INLINE int symbol_ref_small_data_p PARAMS ((rtx));
static FRV_INLINE int const_small_data_p PARAMS ((rtx));
static FRV_INLINE int plus_small_data_p PARAMS ((rtx, rtx));
static void frv_print_operand_memory_reference_reg
PARAMS ((FILE *, rtx));
static void frv_print_operand_memory_reference PARAMS ((FILE *, rtx, int));
static int frv_print_operand_jump_hint PARAMS ((rtx));
static FRV_INLINE int frv_regno_ok_for_base_p PARAMS ((int, int));
static rtx single_set_pattern PARAMS ((rtx));
static int frv_function_contains_far_jump PARAMS ((void));
static rtx frv_alloc_temp_reg PARAMS ((frv_tmp_reg_t *,
enum reg_class,
enum machine_mode,
int, int));
static rtx frv_frame_offset_rtx PARAMS ((int));
static rtx frv_frame_mem PARAMS ((enum machine_mode,
rtx, int));
static rtx frv_dwarf_store PARAMS ((rtx, int));
static void frv_frame_insn PARAMS ((rtx, rtx));
static void frv_frame_access PARAMS ((frv_frame_accessor_t*,
rtx, int));
static void frv_frame_access_multi PARAMS ((frv_frame_accessor_t*,
frv_stack_t *, int));
static void frv_frame_access_standard_regs PARAMS ((enum frv_stack_op,
frv_stack_t *));
static struct machine_function *frv_init_machine_status PARAMS ((void));
static int frv_legitimate_memory_operand PARAMS ((rtx,
enum machine_mode,
int));
static rtx frv_int_to_acc PARAMS ((enum insn_code,
int, rtx));
static enum machine_mode frv_matching_accg_mode PARAMS ((enum machine_mode));
static rtx frv_read_argument PARAMS ((tree *));
static int frv_check_constant_argument PARAMS ((enum insn_code,
int, rtx));
static rtx frv_legitimize_target PARAMS ((enum insn_code, rtx));
static rtx frv_legitimize_argument PARAMS ((enum insn_code,
int, rtx));
static rtx frv_expand_set_builtin PARAMS ((enum insn_code,
tree, rtx));
static rtx frv_expand_unop_builtin PARAMS ((enum insn_code,
tree, rtx));
static rtx frv_expand_binop_builtin PARAMS ((enum insn_code,
tree, rtx));
static rtx frv_expand_cut_builtin PARAMS ((enum insn_code,
tree, rtx));
static rtx frv_expand_binopimm_builtin PARAMS ((enum insn_code,
tree, rtx));
static rtx frv_expand_voidbinop_builtin PARAMS ((enum insn_code,
tree));
static rtx frv_expand_voidtriop_builtin PARAMS ((enum insn_code,
tree));
static rtx frv_expand_voidaccop_builtin PARAMS ((enum insn_code,
tree));
static rtx frv_expand_mclracc_builtin PARAMS ((tree));
static rtx frv_expand_mrdacc_builtin PARAMS ((enum insn_code,
tree));
static rtx frv_expand_mwtacc_builtin PARAMS ((enum insn_code,
tree));
static rtx frv_expand_noargs_builtin PARAMS ((enum insn_code));
static rtx frv_emit_comparison PARAMS ((enum rtx_code, rtx,
rtx));
static int frv_clear_registers_used PARAMS ((rtx *, void *));
static void frv_ifcvt_add_insn PARAMS ((rtx, rtx, int));
static rtx frv_ifcvt_rewrite_mem PARAMS ((rtx,
enum machine_mode,
rtx));
static rtx frv_ifcvt_load_value PARAMS ((rtx, rtx));
static void frv_registers_update PARAMS ((rtx, unsigned char [],
int [], int *, int));
static int frv_registers_used_p PARAMS ((rtx, unsigned char [],
int));
static int frv_registers_set_p PARAMS ((rtx, unsigned char [],
int));
static void frv_pack_insns PARAMS ((void));
static void frv_function_prologue PARAMS ((FILE *, HOST_WIDE_INT));
static void frv_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT));
static bool frv_assemble_integer PARAMS ((rtx, unsigned, int));
static const char * frv_strip_name_encoding PARAMS ((const char *));
static void frv_encode_section_info PARAMS ((tree, int));
static void frv_init_builtins PARAMS ((void));
static rtx frv_expand_builtin PARAMS ((tree, rtx, rtx, enum machine_mode, int));
static bool frv_in_small_data_p PARAMS ((tree));
static void frv_asm_output_mi_thunk
PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree));
#undef TARGET_ASM_FUNCTION_PROLOGUE
#define TARGET_ASM_FUNCTION_PROLOGUE frv_function_prologue
#undef TARGET_ASM_FUNCTION_EPILOGUE
#define TARGET_ASM_FUNCTION_EPILOGUE frv_function_epilogue
#undef TARGET_ASM_INTEGER
#define TARGET_ASM_INTEGER frv_assemble_integer
#undef TARGET_STRIP_NAME_ENCODING
#define TARGET_STRIP_NAME_ENCODING frv_strip_name_encoding
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO frv_encode_section_info
#undef TARGET_INIT_BUILTINS
#define TARGET_INIT_BUILTINS frv_init_builtins
#undef TARGET_EXPAND_BUILTIN
#define TARGET_EXPAND_BUILTIN frv_expand_builtin
#undef TARGET_IN_SMALL_DATA_P
#define TARGET_IN_SMALL_DATA_P frv_in_small_data_p
#undef TARGET_ASM_OUTPUT_MI_THUNK
#define TARGET_ASM_OUTPUT_MI_THUNK frv_asm_output_mi_thunk
#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
struct gcc_target targetm = TARGET_INITIALIZER;
static FRV_INLINE int
symbol_ref_small_data_p (x)
rtx x;
{
return SDATA_NAME_P (XSTR (x, 0));
}
static FRV_INLINE int
const_small_data_p (x)
rtx x;
{
rtx x0, x1;
if (GET_CODE (XEXP (x, 0)) != PLUS)
return FALSE;
x0 = XEXP (XEXP (x, 0), 0);
if (GET_CODE (x0) != SYMBOL_REF || !SDATA_NAME_P (XSTR (x0, 0)))
return FALSE;
x1 = XEXP (XEXP (x, 0), 1);
if (GET_CODE (x1) != CONST_INT
|| !IN_RANGE_P (INTVAL (x1), -2048, 2047))
return FALSE;
return TRUE;
}
static FRV_INLINE int
plus_small_data_p (op0, op1)
rtx op0;
rtx op1;
{
if (GET_MODE (op0) == SImode
&& GET_CODE (op0) == REG
&& REGNO (op0) == SDA_BASE_REG)
{
if (GET_CODE (op1) == SYMBOL_REF)
return symbol_ref_small_data_p (op1);
if (GET_CODE (op1) == CONST)
return const_small_data_p (op1);
}
return FALSE;
}
static int
frv_default_flags_for_cpu ()
{
switch (frv_cpu_type)
{
case FRV_CPU_GENERIC:
return MASK_DEFAULT_FRV;
case FRV_CPU_FR500:
case FRV_CPU_TOMCAT:
return MASK_DEFAULT_FR500;
case FRV_CPU_FR400:
return MASK_DEFAULT_FR400;
case FRV_CPU_FR300:
case FRV_CPU_SIMPLE:
return MASK_DEFAULT_SIMPLE;
}
abort ();
}
void
frv_override_options ()
{
int regno, i;
if (frv_cpu_string)
{
if (strcmp (frv_cpu_string, "simple") == 0)
frv_cpu_type = FRV_CPU_SIMPLE;
else if (strcmp (frv_cpu_string, "tomcat") == 0)
frv_cpu_type = FRV_CPU_TOMCAT;
else if (strncmp (frv_cpu_string, "fr", sizeof ("fr")-1) != 0)
error ("Unknown cpu: -mcpu=%s", frv_cpu_string);
else
{
const char *p = frv_cpu_string + sizeof ("fr") - 1;
if (strcmp (p, "500") == 0)
frv_cpu_type = FRV_CPU_FR500;
else if (strcmp (p, "400") == 0)
frv_cpu_type = FRV_CPU_FR400;
else if (strcmp (p, "300") == 0)
frv_cpu_type = FRV_CPU_FR300;
else if (strcmp (p, "v") == 0)
frv_cpu_type = FRV_CPU_GENERIC;
else
error ("Unknown cpu: -mcpu=%s", frv_cpu_string);
}
}
target_flags |= (frv_default_flags_for_cpu () & ~target_flags_explicit);
if (TARGET_LIBPIC)
{
if (!flag_pic)
flag_pic = 2;
if (! g_switch_set)
{
g_switch_set = 1;
g_switch_value = 0;
}
}
if (write_symbols == DWARF_DEBUG && flag_pic)
error ("-fpic and -gdwarf are incompatible (-fpic and -g/-gdwarf-2 are fine)");
if (frv_branch_cost_string)
frv_branch_cost_int = atoi (frv_branch_cost_string);
if (frv_condexec_insns_str)
frv_condexec_insns = atoi (frv_condexec_insns_str);
if (frv_condexec_temps_str)
frv_condexec_temps = atoi (frv_condexec_temps_str);
if (frv_sched_lookahead_str)
frv_sched_lookahead = atoi (frv_sched_lookahead_str);
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
{
enum reg_class class;
if (GPR_P (regno))
{
int gpr_reg = regno - GPR_FIRST;
if ((gpr_reg & 3) == 0)
class = QUAD_REGS;
else if ((gpr_reg & 1) == 0)
class = EVEN_REGS;
else
class = GPR_REGS;
}
else if (FPR_P (regno))
{
int fpr_reg = regno - GPR_FIRST;
if ((fpr_reg & 3) == 0)
class = QUAD_FPR_REGS;
else if ((fpr_reg & 1) == 0)
class = FEVEN_REGS;
else
class = FPR_REGS;
}
else if (regno == LR_REGNO)
class = LR_REG;
else if (regno == LCR_REGNO)
class = LCR_REG;
else if (ICC_P (regno))
class = ICC_REGS;
else if (FCC_P (regno))
class = FCC_REGS;
else if (ICR_P (regno))
class = ICR_REGS;
else if (FCR_P (regno))
class = FCR_REGS;
else if (ACC_P (regno))
{
int r = regno - ACC_FIRST;
if ((r & 3) == 0)
class = QUAD_ACC_REGS;
else if ((r & 1) == 0)
class = EVEN_ACC_REGS;
else
class = ACC_REGS;
}
else if (ACCG_P (regno))
class = ACCG_REGS;
else
class = NO_REGS;
regno_reg_class[regno] = class;
}
if (!g_switch_set)
g_switch_value = SDATA_DEFAULT_SIZE;
for (i = 0; i < 256; i++)
reg_class_from_letter[i] = NO_REGS;
reg_class_from_letter['a'] = ACC_REGS;
reg_class_from_letter['b'] = EVEN_ACC_REGS;
reg_class_from_letter['c'] = CC_REGS;
reg_class_from_letter['d'] = GPR_REGS;
reg_class_from_letter['e'] = EVEN_REGS;
reg_class_from_letter['f'] = FPR_REGS;
reg_class_from_letter['h'] = FEVEN_REGS;
reg_class_from_letter['l'] = LR_REG;
reg_class_from_letter['q'] = QUAD_REGS;
reg_class_from_letter['t'] = ICC_REGS;
reg_class_from_letter['u'] = FCC_REGS;
reg_class_from_letter['v'] = ICR_REGS;
reg_class_from_letter['w'] = FCR_REGS;
reg_class_from_letter['x'] = QUAD_FPR_REGS;
reg_class_from_letter['y'] = LCR_REG;
reg_class_from_letter['z'] = SPR_REGS;
reg_class_from_letter['A'] = QUAD_ACC_REGS;
reg_class_from_letter['B'] = ACCG_REGS;
reg_class_from_letter['C'] = CR_REGS;
if (flag_pic)
targetm.asm_out.unaligned_op.si = 0;
init_machine_status = frv_init_machine_status;
}
void
frv_optimization_options (level, size)
int level;
int size ATTRIBUTE_UNUSED;
{
if (level >= 2)
{
#ifdef DISABLE_SCHED2
flag_schedule_insns_after_reload = 0;
#endif
#ifdef ENABLE_RCSP
flag_rcsp = 1;
#endif
}
}
static int
frv_string_begins_with (name, prefix)
tree name;
const char *prefix;
{
int prefix_len = strlen (prefix);
return (TREE_STRING_LENGTH (name) > prefix_len
&& strncmp (TREE_STRING_POINTER (name), prefix, prefix_len) == 0);
}
static void
frv_encode_section_info (decl, first)
tree decl;
int first;
{
if (! first)
return;
if (TREE_CODE (decl) == VAR_DECL)
{
int size = int_size_in_bytes (TREE_TYPE (decl));
tree section_name = DECL_SECTION_NAME (decl);
int is_small = 0;
if (!DECL_ARTIFICIAL (decl) && size > 0 && size <= g_switch_value)
is_small = 1;
if (section_name)
{
if (TREE_CODE (section_name) == STRING_CST)
{
if (frv_string_begins_with (section_name, ".sdata"))
is_small = 1;
if (frv_string_begins_with (section_name, ".sbss"))
is_small = 1;
}
else
abort ();
}
if (is_small)
{
rtx sym_ref = XEXP (DECL_RTL (decl), 0);
char * str = xmalloc (2 + strlen (XSTR (sym_ref, 0)));
str[0] = SDATA_FLAG_CHAR;
strcpy (&str[1], XSTR (sym_ref, 0));
XSTR (sym_ref, 0) = str;
}
}
}
void
frv_conditional_register_usage ()
{
int i;
for (i = GPR_FIRST + NUM_GPRS; i <= GPR_LAST; i++)
fixed_regs[i] = call_used_regs[i] = 1;
for (i = FPR_FIRST + NUM_FPRS; i <= FPR_LAST; i++)
fixed_regs[i] = call_used_regs[i] = 1;
for (i = ACC_FIRST + NUM_ACCS; i <= ACC_LAST; i++)
fixed_regs[i] = call_used_regs[i] = 1;
for (i = ACCG_FIRST + NUM_ACCS; i <= ACCG_LAST; i++)
fixed_regs[i] = call_used_regs[i] = 1;
fixed_regs[ICC_TEMP] = call_used_regs[ICC_TEMP] = 1;
fixed_regs[ICR_TEMP] = call_used_regs[ICR_TEMP] = 1;
if (TARGET_FIXED_CC)
{
fixed_regs[ICC_FIRST] = call_used_regs[ICC_FIRST] = 1;
fixed_regs[FCC_FIRST] = call_used_regs[FCC_FIRST] = 1;
fixed_regs[ICR_FIRST] = call_used_regs[ICR_FIRST] = 1;
fixed_regs[FCR_FIRST] = call_used_regs[FCR_FIRST] = 1;
}
#if 0
if (g_switch_value == 0 && !flag_pic)
fixed_regs[SDA_BASE_REG] = call_used_regs[SDA_BASE_REG] = 0;
if (!flag_pic)
fixed_regs[PIC_REGNO] = call_used_regs[PIC_REGNO] = 0;
#endif
}
frv_stack_t *
frv_stack_info ()
{
static frv_stack_t info, zero_info;
frv_stack_t *info_ptr = &info;
tree fndecl = current_function_decl;
int varargs_p = 0;
tree cur_arg;
tree next_arg;
int range;
int alignment;
int offset;
if (frv_stack_cache)
return frv_stack_cache;
info = zero_info;
info_ptr->regs[STACK_REGS_GPR].name = "gpr";
info_ptr->regs[STACK_REGS_GPR].first = LAST_ARG_REGNUM + 1;
info_ptr->regs[STACK_REGS_GPR].last = GPR_LAST;
info_ptr->regs[STACK_REGS_GPR].dword_p = TRUE;
info_ptr->regs[STACK_REGS_FPR].name = "fpr";
info_ptr->regs[STACK_REGS_FPR].first = FPR_FIRST;
info_ptr->regs[STACK_REGS_FPR].last = FPR_LAST;
info_ptr->regs[STACK_REGS_FPR].dword_p = TRUE;
info_ptr->regs[STACK_REGS_LR].name = "lr";
info_ptr->regs[STACK_REGS_LR].first = LR_REGNO;
info_ptr->regs[STACK_REGS_LR].last = LR_REGNO;
info_ptr->regs[STACK_REGS_LR].special_p = 1;
info_ptr->regs[STACK_REGS_CC].name = "cc";
info_ptr->regs[STACK_REGS_CC].first = CC_FIRST;
info_ptr->regs[STACK_REGS_CC].last = CC_LAST;
info_ptr->regs[STACK_REGS_CC].field_p = TRUE;
info_ptr->regs[STACK_REGS_LCR].name = "lcr";
info_ptr->regs[STACK_REGS_LCR].first = LCR_REGNO;
info_ptr->regs[STACK_REGS_LCR].last = LCR_REGNO;
info_ptr->regs[STACK_REGS_STDARG].name = "stdarg";
info_ptr->regs[STACK_REGS_STDARG].first = FIRST_ARG_REGNUM;
info_ptr->regs[STACK_REGS_STDARG].last = LAST_ARG_REGNUM;
info_ptr->regs[STACK_REGS_STDARG].dword_p = 1;
info_ptr->regs[STACK_REGS_STDARG].special_p = 1;
info_ptr->regs[STACK_REGS_STRUCT].name = "struct";
info_ptr->regs[STACK_REGS_STRUCT].first = STRUCT_VALUE_REGNUM;
info_ptr->regs[STACK_REGS_STRUCT].last = STRUCT_VALUE_REGNUM;
info_ptr->regs[STACK_REGS_STRUCT].special_p = 1;
info_ptr->regs[STACK_REGS_FP].name = "fp";
info_ptr->regs[STACK_REGS_FP].first = FRAME_POINTER_REGNUM;
info_ptr->regs[STACK_REGS_FP].last = FRAME_POINTER_REGNUM;
info_ptr->regs[STACK_REGS_FP].special_p = 1;
if (cfun->stdarg)
varargs_p = 1;
else
{
for (cur_arg = DECL_ARGUMENTS (fndecl); cur_arg != (tree)0; cur_arg = next_arg)
{
next_arg = TREE_CHAIN (cur_arg);
if (next_arg == (tree)0)
{
if (DECL_NAME (cur_arg)
&& !strcmp (IDENTIFIER_POINTER (DECL_NAME (cur_arg)), "__builtin_va_alist"))
varargs_p = 1;
break;
}
}
}
for (range = 0; range < STACK_REGS_MAX; range++)
{
frv_stack_regs_t *reg_ptr = &(info_ptr->regs[range]);
int first = reg_ptr->first;
int last = reg_ptr->last;
int size_1word = 0;
int size_2words = 0;
int regno;
switch (range)
{
default:
for (regno = first; regno <= last; regno++)
{
if ((regs_ever_live[regno] && !call_used_regs[regno])
|| (current_function_calls_eh_return
&& (regno >= FIRST_EH_REGNUM && regno <= LAST_EH_REGNUM))
|| (flag_pic && cfun->uses_pic_offset_table && regno == PIC_REGNO))
{
info_ptr->save_p[regno] = REG_SAVE_1WORD;
size_1word += UNITS_PER_WORD;
}
}
break;
case STACK_REGS_FP:
break;
case STACK_REGS_LR:
if (regs_ever_live[LR_REGNO]
|| profile_flag
|| frame_pointer_needed
|| (flag_pic && cfun->uses_pic_offset_table))
{
info_ptr->save_p[LR_REGNO] = REG_SAVE_1WORD;
size_1word += UNITS_PER_WORD;
}
break;
case STACK_REGS_STDARG:
if (varargs_p)
{
last -= (ADDR_ALIGN (cfun->pretend_args_size, UNITS_PER_WORD)
/ UNITS_PER_WORD);
for (regno = first; regno <= last; regno++)
{
info_ptr->save_p[regno] = REG_SAVE_1WORD;
size_1word += UNITS_PER_WORD;
}
info_ptr->stdarg_size = size_1word;
}
break;
case STACK_REGS_STRUCT:
if (cfun->returns_struct)
{
info_ptr->save_p[STRUCT_VALUE_REGNUM] = REG_SAVE_1WORD;
size_1word += UNITS_PER_WORD;
}
break;
}
if (size_1word)
{
if (reg_ptr->field_p)
size_1word = UNITS_PER_WORD;
else if (reg_ptr->dword_p && TARGET_DWORD)
{
for (regno = first; regno < last; regno += 2)
{
if (info_ptr->save_p[regno] && info_ptr->save_p[regno+1])
{
size_2words += 2 * UNITS_PER_WORD;
size_1word -= 2 * UNITS_PER_WORD;
info_ptr->save_p[regno] = REG_SAVE_2WORDS;
info_ptr->save_p[regno+1] = REG_SAVE_NO_SAVE;
}
}
}
reg_ptr->size_1word = size_1word;
reg_ptr->size_2words = size_2words;
if (! reg_ptr->special_p)
{
info_ptr->regs_size_1word += size_1word;
info_ptr->regs_size_2words += size_2words;
}
}
}
alignment = (TARGET_DWORD? 2 * UNITS_PER_WORD : UNITS_PER_WORD);
info_ptr->parameter_size = ADDR_ALIGN (cfun->outgoing_args_size, alignment);
info_ptr->regs_size = ADDR_ALIGN (info_ptr->regs_size_2words
+ info_ptr->regs_size_1word,
alignment);
info_ptr->vars_size = ADDR_ALIGN (get_frame_size (), alignment);
info_ptr->pretend_size = cfun->pretend_args_size;
info_ptr->total_size
= (ADDR_ALIGN (info_ptr->parameter_size
+ info_ptr->regs_size
+ info_ptr->vars_size,
2 * UNITS_PER_WORD)
+ ADDR_ALIGN (info_ptr->pretend_size
+ info_ptr->stdarg_size,
2 * UNITS_PER_WORD));
if (info_ptr->total_size > 0
|| info_ptr->regs[STACK_REGS_LR].size_1word > 0
|| info_ptr->regs[STACK_REGS_STRUCT].size_1word > 0)
{
offset = info_ptr->parameter_size;
info_ptr->header_size = 4 * UNITS_PER_WORD;
info_ptr->total_size += 4 * UNITS_PER_WORD;
for (range = 0; range < STACK_REGS_MAX; range++)
{
frv_stack_regs_t *reg_ptr = &(info_ptr->regs[range]);
if (! reg_ptr->special_p)
{
int first = reg_ptr->first;
int last = reg_ptr->last;
int regno;
for (regno = first; regno <= last; regno++)
if (info_ptr->save_p[regno] == REG_SAVE_2WORDS
&& regno != FRAME_POINTER_REGNUM
&& (regno < FIRST_ARG_REGNUM
|| regno > LAST_ARG_REGNUM))
{
info_ptr->reg_offset[regno] = offset;
offset += 2 * UNITS_PER_WORD;
}
}
}
for (range = 0; range < STACK_REGS_MAX; range++)
{
frv_stack_regs_t *reg_ptr = &(info_ptr->regs[range]);
if (! reg_ptr->special_p)
{
int first = reg_ptr->first;
int last = reg_ptr->last;
int regno;
for (regno = first; regno <= last; regno++)
if (info_ptr->save_p[regno] == REG_SAVE_1WORD
&& regno != FRAME_POINTER_REGNUM
&& (regno < FIRST_ARG_REGNUM
|| regno > LAST_ARG_REGNUM))
{
info_ptr->reg_offset[regno] = offset;
offset += UNITS_PER_WORD;
}
}
}
offset = ADDR_ALIGN (offset, alignment);
if (info_ptr->vars_size)
{
info_ptr->vars_offset = offset;
offset += info_ptr->vars_size;
}
offset = ADDR_ALIGN (offset, 2 * UNITS_PER_WORD);
info_ptr->save_p[FRAME_POINTER_REGNUM] = REG_SAVE_1WORD;
info_ptr->reg_offset[FRAME_POINTER_REGNUM] = offset;
info_ptr->regs[STACK_REGS_FP].size_1word = UNITS_PER_WORD;
info_ptr->save_p[LR_REGNO] = REG_SAVE_1WORD;
info_ptr->reg_offset[LR_REGNO] = offset + 2*UNITS_PER_WORD;
info_ptr->regs[STACK_REGS_LR].size_1word = UNITS_PER_WORD;
if (cfun->returns_struct)
{
info_ptr->save_p[STRUCT_VALUE_REGNUM] = REG_SAVE_1WORD;
info_ptr->reg_offset[STRUCT_VALUE_REGNUM] = offset + UNITS_PER_WORD;
info_ptr->regs[STACK_REGS_STRUCT].size_1word = UNITS_PER_WORD;
}
if (info_ptr->stdarg_size)
{
int first = info_ptr->regs[STACK_REGS_STDARG].first;
int last = info_ptr->regs[STACK_REGS_STDARG].last;
int regno;
offset += 4 * UNITS_PER_WORD;
for (regno = first; regno <= last; regno++)
{
if (info_ptr->save_p[regno] == REG_SAVE_2WORDS)
{
info_ptr->reg_offset[regno] = offset;
offset += 2 * UNITS_PER_WORD;
}
else if (info_ptr->save_p[regno] == REG_SAVE_1WORD)
{
info_ptr->reg_offset[regno] = offset;
offset += UNITS_PER_WORD;
}
}
}
}
if (reload_completed)
frv_stack_cache = info_ptr;
return info_ptr;
}
void
frv_debug_stack (info)
frv_stack_t *info;
{
int range;
if (!info)
info = frv_stack_info ();
fprintf (stderr, "\nStack information for function %s:\n",
((current_function_decl && DECL_NAME (current_function_decl))
? IDENTIFIER_POINTER (DECL_NAME (current_function_decl))
: "<unknown>"));
fprintf (stderr, "\ttotal_size\t= %6d\n", info->total_size);
fprintf (stderr, "\tvars_size\t= %6d\n", info->vars_size);
fprintf (stderr, "\tparam_size\t= %6d\n", info->parameter_size);
fprintf (stderr, "\tregs_size\t= %6d, 1w = %3d, 2w = %3d\n",
info->regs_size, info->regs_size_1word, info->regs_size_2words);
fprintf (stderr, "\theader_size\t= %6d\n", info->header_size);
fprintf (stderr, "\tpretend_size\t= %6d\n", info->pretend_size);
fprintf (stderr, "\tvars_offset\t= %6d\n", info->vars_offset);
fprintf (stderr, "\tregs_offset\t= %6d\n", info->regs_offset);
for (range = 0; range < STACK_REGS_MAX; range++)
{
frv_stack_regs_t *regs = &(info->regs[range]);
if ((regs->size_1word + regs->size_2words) > 0)
{
int first = regs->first;
int last = regs->last;
int regno;
fprintf (stderr, "\t%s\tsize\t= %6d, 1w = %3d, 2w = %3d, save =",
regs->name, regs->size_1word + regs->size_2words,
regs->size_1word, regs->size_2words);
for (regno = first; regno <= last; regno++)
{
if (info->save_p[regno] == REG_SAVE_1WORD)
fprintf (stderr, " %s (%d)", reg_names[regno],
info->reg_offset[regno]);
else if (info->save_p[regno] == REG_SAVE_2WORDS)
fprintf (stderr, " %s-%s (%d)", reg_names[regno],
reg_names[regno+1], info->reg_offset[regno]);
}
fputc ('\n', stderr);
}
}
fflush (stderr);
}
static int frv_insn_packing_flag;
static int
frv_function_contains_far_jump ()
{
rtx insn = get_insns ();
while (insn != NULL
&& !(GET_CODE (insn) == JUMP_INSN
&& GET_CODE (PATTERN (insn)) != ADDR_VEC
&& GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC
&& get_attr_far_jump (insn) == FAR_JUMP_YES))
insn = NEXT_INSN (insn);
return (insn != NULL);
}
static void
frv_function_prologue (file, size)
FILE *file;
HOST_WIDE_INT size ATTRIBUTE_UNUSED;
{
if (frv_stack_info ()->total_size == 0 && frv_function_contains_far_jump ())
{
rtx insn;
if (regs_ever_live[GPR_FIRST + 3])
abort ();
fprintf (file, "\tmovsg lr,gr3\n");
for (insn = get_insns(); insn != NULL; insn = NEXT_INSN (insn))
if (GET_CODE (insn) == JUMP_INSN)
{
rtx pattern = PATTERN (insn);
if (GET_CODE (pattern) == PARALLEL
&& XVECLEN (pattern, 0) >= 2
&& GET_CODE (XVECEXP (pattern, 0, 0)) == RETURN
&& GET_CODE (XVECEXP (pattern, 0, 1)) == USE)
{
rtx address = XEXP (XVECEXP (pattern, 0, 1), 0);
if (GET_CODE (address) == REG && REGNO (address) == LR_REGNO)
REGNO (address) = GPR_FIRST + 3;
}
}
}
frv_pack_insns ();
frv_insn_packing_flag = TRUE;
}
static rtx
frv_alloc_temp_reg (info, class, mode, mark_as_used, no_abort)
frv_tmp_reg_t *info;
enum reg_class class;
enum machine_mode mode;
int mark_as_used;
int no_abort;
{
int regno = info->next_reg[ (int)class ];
int orig_regno = regno;
HARD_REG_SET *reg_in_class = ®_class_contents[ (int)class ];
int i, nr;
for (;;)
{
if (TEST_HARD_REG_BIT (*reg_in_class, regno)
&& TEST_HARD_REG_BIT (info->regs, regno))
break;
if (++regno >= FIRST_PSEUDO_REGISTER)
regno = 0;
if (regno == orig_regno)
{
if (no_abort)
return NULL_RTX;
else
abort ();
}
}
nr = HARD_REGNO_NREGS (regno, mode);
info->next_reg[ (int)class ] = regno + nr;
if (mark_as_used)
for (i = 0; i < nr; i++)
CLEAR_HARD_REG_BIT (info->regs, regno+i);
return gen_rtx_REG (mode, regno);
}
static rtx
frv_frame_offset_rtx (offset)
int offset;
{
rtx offset_rtx = GEN_INT (offset);
if (IN_RANGE_P (offset, -2048, 2047))
return offset_rtx;
else
{
rtx reg_rtx = gen_rtx_REG (SImode, OFFSET_REGNO);
if (IN_RANGE_P (offset, -32768, 32767))
emit_insn (gen_movsi (reg_rtx, offset_rtx));
else
{
emit_insn (gen_movsi_high (reg_rtx, offset_rtx));
emit_insn (gen_movsi_lo_sum (reg_rtx, offset_rtx));
}
return reg_rtx;
}
}
static rtx
frv_frame_mem (mode, base, offset)
enum machine_mode mode;
rtx base;
int offset;
{
return gen_rtx_MEM (mode, gen_rtx_PLUS (Pmode,
base,
frv_frame_offset_rtx (offset)));
}
static rtx
frv_dwarf_store (reg, offset)
rtx reg;
int offset;
{
rtx set = gen_rtx_SET (VOIDmode,
gen_rtx_MEM (GET_MODE (reg),
plus_constant (stack_pointer_rtx,
offset)),
reg);
RTX_FRAME_RELATED_P (set) = 1;
return set;
}
static void
frv_frame_insn (pattern, dwarf_pattern)
rtx pattern;
rtx dwarf_pattern;
{
rtx insn = emit_insn (pattern);
RTX_FRAME_RELATED_P (insn) = 1;
REG_NOTES (insn) = alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR,
dwarf_pattern,
REG_NOTES (insn));
}
static void
frv_frame_access (accessor, reg, stack_offset)
frv_frame_accessor_t *accessor;
rtx reg;
int stack_offset;
{
enum machine_mode mode = GET_MODE (reg);
rtx mem = frv_frame_mem (mode,
accessor->base,
stack_offset - accessor->base_offset);
if (accessor->op == FRV_LOAD)
{
if (SPR_P (REGNO (reg)))
{
rtx temp = gen_rtx_REG (mode, TEMP_REGNO);
emit_insn (gen_rtx_SET (VOIDmode, temp, mem));
emit_insn (gen_rtx_SET (VOIDmode, reg, temp));
}
else
emit_insn (gen_rtx_SET (VOIDmode, reg, mem));
emit_insn (gen_rtx_USE (VOIDmode, reg));
}
else
{
if (SPR_P (REGNO (reg)))
{
rtx temp = gen_rtx_REG (mode, TEMP_REGNO);
emit_insn (gen_rtx_SET (VOIDmode, temp, reg));
frv_frame_insn (gen_rtx_SET (Pmode, mem, temp),
frv_dwarf_store (reg, stack_offset));
}
else if (GET_MODE (reg) == DImode)
{
rtx reg1 = gen_rtx_REG (SImode, REGNO (reg));
rtx reg2 = gen_rtx_REG (SImode, REGNO (reg) + 1);
rtx set1 = frv_dwarf_store (reg1, stack_offset);
rtx set2 = frv_dwarf_store (reg2, stack_offset + 4);
frv_frame_insn (gen_rtx_SET (Pmode, mem, reg),
gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, set1, set2)));
}
else
frv_frame_insn (gen_rtx_SET (Pmode, mem, reg),
frv_dwarf_store (reg, stack_offset));
}
}
static void
frv_frame_access_multi (accessor, info, reg_set)
frv_frame_accessor_t *accessor;
frv_stack_t *info;
int reg_set;
{
frv_stack_regs_t *regs_info;
int regno;
regs_info = &info->regs[reg_set];
for (regno = regs_info->first; regno <= regs_info->last; regno++)
if (info->save_p[regno])
frv_frame_access (accessor,
info->save_p[regno] == REG_SAVE_2WORDS
? gen_rtx_REG (DImode, regno)
: gen_rtx_REG (SImode, regno),
info->reg_offset[regno]);
}
static void
frv_frame_access_standard_regs (op, info)
enum frv_stack_op op;
frv_stack_t *info;
{
frv_frame_accessor_t accessor;
accessor.op = op;
accessor.base = stack_pointer_rtx;
accessor.base_offset = 0;
frv_frame_access_multi (&accessor, info, STACK_REGS_GPR);
frv_frame_access_multi (&accessor, info, STACK_REGS_FPR);
frv_frame_access_multi (&accessor, info, STACK_REGS_LCR);
}
void
frv_expand_prologue ()
{
frv_stack_t *info = frv_stack_info ();
rtx sp = stack_pointer_rtx;
rtx fp = frame_pointer_rtx;
frv_frame_accessor_t accessor;
if (TARGET_DEBUG_STACK)
frv_debug_stack (info);
if (info->total_size == 0)
return;
accessor.op = FRV_STORE;
if (frame_pointer_needed && info->total_size > 2048)
{
rtx insn;
accessor.base = gen_rtx_REG (Pmode, OLD_SP_REGNO);
accessor.base_offset = info->total_size;
insn = emit_insn (gen_movsi (accessor.base, sp));
}
else
{
accessor.base = stack_pointer_rtx;
accessor.base_offset = 0;
}
{
rtx asm_offset = frv_frame_offset_rtx (-info->total_size);
rtx dwarf_offset = GEN_INT (-info->total_size);
frv_frame_insn (gen_stack_adjust (sp, sp, asm_offset),
gen_rtx_SET (Pmode,
sp,
gen_rtx_PLUS (Pmode, sp, dwarf_offset)));
}
if (frame_pointer_needed)
{
int fp_offset = info->reg_offset[FRAME_POINTER_REGNUM];
rtx asm_src = plus_constant (accessor.base,
fp_offset - accessor.base_offset);
rtx dwarf_src = plus_constant (sp, fp_offset);
frv_frame_access (&accessor, fp, fp_offset);
frv_frame_insn (gen_rtx_SET (VOIDmode, fp, asm_src),
gen_rtx_SET (VOIDmode, fp, dwarf_src));
accessor.base = fp;
accessor.base_offset = fp_offset;
}
frv_frame_access_multi (&accessor, info, STACK_REGS_STRUCT);
frv_frame_access_multi (&accessor, info, STACK_REGS_LR);
frv_frame_access_multi (&accessor, info, STACK_REGS_STDARG);
frv_frame_access_standard_regs (FRV_STORE, info);
if (info->stdarg_size > 0)
emit_insn (gen_blockage ());
if (flag_pic && cfun->uses_pic_offset_table)
emit_insn (gen_pic_prologue (gen_rtx_REG (Pmode, PIC_REGNO),
gen_rtx_REG (Pmode, LR_REGNO),
gen_rtx_REG (SImode, OFFSET_REGNO)));
}
static void
frv_function_epilogue (file, size)
FILE *file ATTRIBUTE_UNUSED;
HOST_WIDE_INT size ATTRIBUTE_UNUSED;
{
frv_stack_cache = (frv_stack_t *)0;
memset ((PTR) &frv_ifcvt.tmp_reg, 0, sizeof (frv_ifcvt.tmp_reg));
BITMAP_XFREE (frv_ifcvt.scratch_insns_bitmap);
}
void
frv_expand_epilogue (sibcall_p)
int sibcall_p;
{
frv_stack_t *info = frv_stack_info ();
rtx fp = frame_pointer_rtx;
rtx sp = stack_pointer_rtx;
rtx return_addr;
int fp_offset;
fp_offset = info->reg_offset[FRAME_POINTER_REGNUM];
if (! current_function_sp_is_unchanging)
emit_insn (gen_addsi3 (sp, fp, frv_frame_offset_rtx (-fp_offset)));
frv_frame_access_standard_regs (FRV_LOAD, info);
if (sibcall_p)
return_addr = 0;
else if (info->save_p[LR_REGNO])
{
int lr_offset;
rtx mem;
lr_offset = info->reg_offset[LR_REGNO];
if (frame_pointer_needed)
mem = frv_frame_mem (Pmode, fp, lr_offset - fp_offset);
else
mem = frv_frame_mem (Pmode, sp, lr_offset);
return_addr = gen_rtx_REG (Pmode, TEMP_REGNO);
emit_insn (gen_rtx_SET (VOIDmode, return_addr, mem));
}
else
return_addr = gen_rtx_REG (Pmode, LR_REGNO);
if (frame_pointer_needed)
{
emit_insn (gen_rtx_SET (VOIDmode, fp, gen_rtx_MEM (Pmode, fp)));
emit_insn (gen_rtx_USE (VOIDmode, fp));
}
if (info->total_size != 0)
{
rtx offset = frv_frame_offset_rtx (info->total_size);
emit_insn (gen_stack_adjust (sp, sp, offset));
}
if (current_function_calls_eh_return)
emit_insn (gen_stack_adjust (sp, sp, EH_RETURN_STACKADJ_RTX));
if (return_addr)
emit_jump_insn (gen_epilogue_return (return_addr));
}
static void
frv_asm_output_mi_thunk (file, thunk_fndecl, delta, vcall_offset, function)
FILE *file;
tree thunk_fndecl ATTRIBUTE_UNUSED;
HOST_WIDE_INT delta;
HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED;
tree function;
{
const char *name_func = XSTR (XEXP (DECL_RTL (function), 0), 0);
const char *name_arg0 = reg_names[FIRST_ARG_REGNUM];
const char *name_jmp = reg_names[JUMP_REGNO];
const char *parallel = ((PACKING_FLAG_USED_P ()) ? ".p" : "");
if (IN_RANGE_P (delta, -2048, 2047))
fprintf (file, "\taddi %s,#%d,%s\n", name_arg0, (int) delta, name_arg0);
else
{
const char *name_add = reg_names[TEMP_REGNO];
fprintf (file, "\tsethi%s #hi(", parallel);
fprintf (file, HOST_WIDE_INT_PRINT_DEC, delta);
fprintf (file, "),%s\n", name_add);
fprintf (file, "\tsetlo #lo(");
fprintf (file, HOST_WIDE_INT_PRINT_DEC, delta);
fprintf (file, "),%s\n", name_add);
fprintf (file, "\tadd %s,%s,%s\n", name_add, name_arg0, name_arg0);
}
if (!flag_pic)
{
fprintf (file, "\tsethi%s #hi(", parallel);
assemble_name (file, name_func);
fprintf (file, "),%s\n", name_jmp);
fprintf (file, "\tsetlo #lo(");
assemble_name (file, name_func);
fprintf (file, "),%s\n", name_jmp);
}
else
{
const char *name_lr = reg_names[LR_REGNO];
const char *name_gppic = name_jmp;
const char *name_tmp = reg_names[TEMP_REGNO];
fprintf (file, "\tmovsg %s,%s\n", name_lr, name_tmp);
fprintf (file, "\tcall 1f\n");
fprintf (file, "1:\tmovsg %s,%s\n", name_lr, name_gppic);
fprintf (file, "\tmovgs %s,%s\n", name_tmp, name_lr);
fprintf (file, "\tsethi%s #gprelhi(1b),%s\n", parallel, name_tmp);
fprintf (file, "\tsetlo #gprello(1b),%s\n", name_tmp);
fprintf (file, "\tsub %s,%s,%s\n", name_gppic, name_tmp, name_gppic);
fprintf (file, "\tsethi%s #gprelhi(", parallel);
assemble_name (file, name_func);
fprintf (file, "),%s\n", name_tmp);
fprintf (file, "\tsetlo #gprello(");
assemble_name (file, name_func);
fprintf (file, "),%s\n", name_tmp);
fprintf (file, "\tadd %s,%s,%s\n", name_gppic, name_tmp, name_jmp);
}
fprintf (file, "\tjmpl @(%s,%s)\n", name_jmp, reg_names[GPR_FIRST+0]);
}
int
frv_frame_pointer_required ()
{
if (! current_function_is_leaf)
return TRUE;
if (get_frame_size () != 0)
return TRUE;
if (cfun->stdarg)
return TRUE;
if (!current_function_sp_is_unchanging)
return TRUE;
if (flag_pic && cfun->uses_pic_offset_table)
return TRUE;
if (profile_flag)
return TRUE;
if (cfun->machine->frame_needed)
return TRUE;
return FALSE;
}
int
frv_initial_elimination_offset (from, to)
int from;
int to;
{
frv_stack_t *info = frv_stack_info ();
int ret = 0;
if (to == STACK_POINTER_REGNUM && from == ARG_POINTER_REGNUM)
ret = info->total_size - info->pretend_size;
else if (to == STACK_POINTER_REGNUM && from == FRAME_POINTER_REGNUM)
ret = - info->reg_offset[FRAME_POINTER_REGNUM];
else if (to == FRAME_POINTER_REGNUM && from == ARG_POINTER_REGNUM)
ret = (info->total_size
- info->reg_offset[FRAME_POINTER_REGNUM]
- info->pretend_size);
else
abort ();
if (TARGET_DEBUG_STACK)
fprintf (stderr, "Eliminate %s to %s by adding %d\n",
reg_names [from], reg_names[to], ret);
return ret;
}
void
frv_setup_incoming_varargs (cum, mode, type, pretend_size, second_time)
CUMULATIVE_ARGS *cum;
enum machine_mode mode;
tree type ATTRIBUTE_UNUSED;
int *pretend_size;
int second_time;
{
if (TARGET_DEBUG_ARG)
fprintf (stderr,
"setup_vararg: words = %2d, mode = %4s, pretend_size = %d, second_time = %d\n",
*cum, GET_MODE_NAME (mode), *pretend_size, second_time);
}
rtx
frv_expand_builtin_saveregs ()
{
int offset = UNITS_PER_WORD * FRV_NUM_ARG_REGS;
if (TARGET_DEBUG_ARG)
fprintf (stderr, "expand_builtin_saveregs: offset from ap = %d\n",
offset);
return gen_rtx (PLUS, Pmode, virtual_incoming_args_rtx, GEN_INT (- offset));
}
void
frv_expand_builtin_va_start (valist, nextarg)
tree valist;
rtx nextarg;
{
tree t;
int num = cfun->args_info - FIRST_ARG_REGNUM - FRV_NUM_ARG_REGS;
nextarg = gen_rtx_PLUS (Pmode, virtual_incoming_args_rtx,
GEN_INT (UNITS_PER_WORD * num));
if (TARGET_DEBUG_ARG)
{
fprintf (stderr, "va_start: args_info = %d, num = %d\n",
cfun->args_info, num);
debug_rtx (nextarg);
}
t = build (MODIFY_EXPR, TREE_TYPE (valist), valist,
make_tree (ptr_type_node, nextarg));
TREE_SIDE_EFFECTS (t) = 1;
expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
}
rtx
frv_expand_builtin_va_arg(valist, type)
tree valist;
tree type;
{
rtx addr;
rtx mem;
rtx reg;
if (TARGET_DEBUG_ARG)
{
fprintf (stderr, "va_arg:\n");
debug_tree (type);
}
if (! AGGREGATE_TYPE_P (type))
return std_expand_builtin_va_arg (valist, type);
addr = std_expand_builtin_va_arg (valist, ptr_type_node);
mem = gen_rtx_MEM (Pmode, addr);
reg = gen_reg_rtx (Pmode);
set_mem_alias_set (mem, get_varargs_alias_set ());
emit_move_insn (reg, mem);
return reg;
}
#ifndef MAX_MOVE_REG
#define MAX_MOVE_REG 4
#endif
#ifndef TOTAL_MOVE_REG
#define TOTAL_MOVE_REG 8
#endif
int
frv_expand_block_move (operands)
rtx operands[];
{
rtx orig_dest = operands[0];
rtx orig_src = operands[1];
rtx bytes_rtx = operands[2];
rtx align_rtx = operands[3];
int constp = (GET_CODE (bytes_rtx) == CONST_INT);
int align;
int bytes;
int offset;
int num_reg;
int i;
rtx src_reg;
rtx dest_reg;
rtx src_addr;
rtx dest_addr;
rtx src_mem;
rtx dest_mem;
rtx tmp_reg;
rtx stores[MAX_MOVE_REG];
int move_bytes;
enum machine_mode mode;
if (! constp)
return FALSE;
if (GET_CODE (align_rtx) != CONST_INT)
abort ();
align = INTVAL (align_rtx);
bytes = INTVAL (bytes_rtx);
if (bytes <= 0)
return TRUE;
if (bytes > TOTAL_MOVE_REG*align)
return FALSE;
dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
src_reg = copy_addr_to_reg (XEXP (orig_src, 0));
num_reg = offset = 0;
for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes))
{
if (offset == 0)
{
src_addr = src_reg;
dest_addr = dest_reg;
}
else
{
src_addr = plus_constant (src_reg, offset);
dest_addr = plus_constant (dest_reg, offset);
}
if (bytes >= 4 && align >= 4)
mode = SImode;
else if (bytes >= 2 && align >= 2)
mode = HImode;
else
mode = QImode;
move_bytes = GET_MODE_SIZE (mode);
tmp_reg = gen_reg_rtx (mode);
src_mem = change_address (orig_src, mode, src_addr);
dest_mem = change_address (orig_dest, mode, dest_addr);
emit_insn (gen_rtx_SET (VOIDmode, tmp_reg, src_mem));
stores[num_reg++] = gen_rtx_SET (VOIDmode, dest_mem, tmp_reg);
if (num_reg >= MAX_MOVE_REG)
{
for (i = 0; i < num_reg; i++)
emit_insn (stores[i]);
num_reg = 0;
}
}
for (i = 0; i < num_reg; i++)
emit_insn (stores[i]);
return TRUE;
}
int
frv_expand_block_clear (operands)
rtx operands[];
{
rtx orig_dest = operands[0];
rtx bytes_rtx = operands[1];
rtx align_rtx = operands[2];
int constp = (GET_CODE (bytes_rtx) == CONST_INT);
int align;
int bytes;
int offset;
int num_reg;
rtx dest_reg;
rtx dest_addr;
rtx dest_mem;
int clear_bytes;
enum machine_mode mode;
if (! constp)
return FALSE;
if (GET_CODE (align_rtx) != CONST_INT)
abort ();
align = INTVAL (align_rtx);
bytes = INTVAL (bytes_rtx);
if (bytes <= 0)
return TRUE;
if (bytes > TOTAL_MOVE_REG*align)
return FALSE;
dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
num_reg = offset = 0;
for ( ; bytes > 0; (bytes -= clear_bytes), (offset += clear_bytes))
{
dest_addr = ((offset == 0)
? dest_reg
: plus_constant (dest_reg, offset));
if (bytes >= 4 && align >= 4)
mode = SImode;
else if (bytes >= 2 && align >= 2)
mode = HImode;
else
mode = QImode;
clear_bytes = GET_MODE_SIZE (mode);
dest_mem = change_address (orig_dest, mode, dest_addr);
emit_insn (gen_rtx_SET (VOIDmode, dest_mem, const0_rtx));
}
return TRUE;
}
static rtx *frv_insn_operands;
const char *
frv_asm_output_opcode (f, ptr)
FILE *f;
const char *ptr;
{
int c;
if (! PACKING_FLAG_USED_P())
return ptr;
for (; *ptr && *ptr != ' ' && *ptr != '\t';)
{
c = *ptr++;
if (c == '%' && ((*ptr >= 'a' && *ptr <= 'z')
|| (*ptr >= 'A' && *ptr <= 'Z')))
{
int letter = *ptr++;
c = atoi (ptr);
frv_print_operand (f, frv_insn_operands [c], letter);
while ((c = *ptr) >= '0' && c <= '9')
ptr++;
}
else
fputc (c, f);
}
if (!frv_insn_packing_flag)
fprintf (f, ".p");
return ptr;
}
void
frv_final_prescan_insn (insn, opvec, noperands)
rtx insn;
rtx *opvec;
int noperands ATTRIBUTE_UNUSED;
{
if (! PACKING_FLAG_USED_P())
return;
if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
return;
frv_insn_operands = opvec;
for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
{
if (NOTE_P (insn))
continue;
else if (!INSN_P (insn))
break;
else if (GET_MODE (insn) == TImode || INSN_CODE (insn) != -1)
break;
}
frv_insn_packing_flag = ! (insn && INSN_P (insn)
&& GET_MODE (insn) != TImode);
}
rtx
frv_dynamic_chain_address (frame)
rtx frame;
{
cfun->machine->frame_needed = 1;
return frame;
}
rtx
frv_return_addr_rtx (count, frame)
int count ATTRIBUTE_UNUSED;
rtx frame;
{
cfun->machine->frame_needed = 1;
return gen_rtx_MEM (Pmode, plus_constant (frame, 8));
}
rtx
frv_index_memory (memref, mode, index)
rtx memref;
enum machine_mode mode;
int index;
{
rtx base = XEXP (memref, 0);
if (GET_CODE (base) == PRE_MODIFY)
base = XEXP (base, 0);
return change_address (memref, mode,
plus_constant (base, index * GET_MODE_SIZE (mode)));
}
void
frv_print_operand_address (stream, x)
FILE * stream;
rtx x;
{
if (GET_CODE (x) == MEM)
x = XEXP (x, 0);
switch (GET_CODE (x))
{
case REG:
fputs (reg_names [ REGNO (x)], stream);
return;
case CONST_INT:
fprintf (stream, "%ld", (long) INTVAL (x));
return;
case SYMBOL_REF:
assemble_name (stream, XSTR (x, 0));
return;
case LABEL_REF:
case CONST:
output_addr_const (stream, x);
return;
default:
break;
}
fatal_insn ("Bad insn to frv_print_operand_address:", x);
}
static void
frv_print_operand_memory_reference_reg (stream, x)
FILE *stream;
rtx x;
{
int regno = true_regnum (x);
if (GPR_P (regno))
fputs (reg_names[regno], stream);
else
fatal_insn ("Bad register to frv_print_operand_memory_reference_reg:", x);
}
static void
frv_print_operand_memory_reference (stream, x, addr_offset)
FILE *stream;
rtx x;
int addr_offset;
{
rtx x0 = NULL_RTX;
rtx x1 = NULL_RTX;
switch (GET_CODE (x))
{
case SUBREG:
case REG:
x0 = x;
break;
case PRE_MODIFY:
x0 = XEXP (x, 0);
x1 = XEXP (XEXP (x, 1), 1);
break;
case CONST_INT:
x1 = x;
break;
case PLUS:
x0 = XEXP (x, 0);
x1 = XEXP (x, 1);
if (GET_CODE (x0) == CONST_INT)
{
x0 = XEXP (x, 1);
x1 = XEXP (x, 0);
}
break;
default:
fatal_insn ("Bad insn to frv_print_operand_memory_reference:", x);
break;
}
if (addr_offset)
{
if (!x1)
x1 = const0_rtx;
else if (GET_CODE (x1) != CONST_INT)
fatal_insn ("Bad insn to frv_print_operand_memory_reference:", x);
}
fputs ("@(", stream);
if (!x0)
fputs (reg_names[GPR_R0], stream);
else if (GET_CODE (x0) == REG || GET_CODE (x0) == SUBREG)
frv_print_operand_memory_reference_reg (stream, x0);
else
fatal_insn ("Bad insn to frv_print_operand_memory_reference:", x);
fputs (",", stream);
if (!x1)
fputs (reg_names [GPR_R0], stream);
else
{
switch (GET_CODE (x1))
{
case SUBREG:
case REG:
frv_print_operand_memory_reference_reg (stream, x1);
break;
case CONST_INT:
fprintf (stream, "%ld", (long) (INTVAL (x1) + addr_offset));
break;
case SYMBOL_REF:
if (x0 && GET_CODE (x0) == REG && REGNO (x0) == SDA_BASE_REG
&& symbol_ref_small_data_p (x1))
{
fputs ("#gprel12(", stream);
assemble_name (stream, XSTR (x1, 0));
fputs (")", stream);
}
else
fatal_insn ("Bad insn to frv_print_operand_memory_reference:", x);
break;
case CONST:
if (x0 && GET_CODE (x0) == REG && REGNO (x0) == SDA_BASE_REG
&& const_small_data_p (x1))
{
fputs ("#gprel12(", stream);
assemble_name (stream, XSTR (XEXP (XEXP (x1, 0), 0), 0));
fprintf (stream, "+%d)", INTVAL (XEXP (XEXP (x1, 0), 1)));
}
else
fatal_insn ("Bad insn to frv_print_operand_memory_reference:", x);
break;
default:
fatal_insn ("Bad insn to frv_print_operand_memory_reference:", x);
}
}
fputs (")", stream);
}
#define FRV_JUMP_LIKELY 2
#define FRV_JUMP_NOT_LIKELY 0
static int
frv_print_operand_jump_hint (insn)
rtx insn;
{
rtx note;
rtx labelref;
int ret;
HOST_WIDE_INT prob = -1;
enum { UNKNOWN, BACKWARD, FORWARD } jump_type = UNKNOWN;
if (GET_CODE (insn) != JUMP_INSN)
abort ();
if (! any_condjump_p (insn))
ret = FRV_JUMP_LIKELY;
else
{
labelref = condjump_label (insn);
if (labelref)
{
rtx label = XEXP (labelref, 0);
jump_type = (insn_current_address > INSN_ADDRESSES (INSN_UID (label))
? BACKWARD
: FORWARD);
}
note = find_reg_note (insn, REG_BR_PROB, 0);
if (!note)
ret = ((jump_type == BACKWARD) ? FRV_JUMP_LIKELY : FRV_JUMP_NOT_LIKELY);
else
{
prob = INTVAL (XEXP (note, 0));
ret = ((prob >= (REG_BR_PROB_BASE / 2))
? FRV_JUMP_LIKELY
: FRV_JUMP_NOT_LIKELY);
}
}
#if 0
if (TARGET_DEBUG)
{
char *direction;
switch (jump_type)
{
default:
case UNKNOWN: direction = "unknown jump direction"; break;
case BACKWARD: direction = "jump backward"; break;
case FORWARD: direction = "jump forward"; break;
}
fprintf (stderr,
"%s: uid %ld, %s, probability = %ld, max prob. = %ld, hint = %d\n",
IDENTIFIER_POINTER (DECL_NAME (current_function_decl)),
(long)INSN_UID (insn), direction, (long)prob,
(long)REG_BR_PROB_BASE, ret);
}
#endif
return ret;
}
void
frv_print_operand (file, x, code)
FILE * file;
rtx x;
int code;
{
HOST_WIDE_INT value;
int offset;
if (code != 0 && !isalpha (code))
value = 0;
else if (GET_CODE (x) == CONST_INT)
value = INTVAL (x);
else if (GET_CODE (x) == CONST_DOUBLE)
{
if (GET_MODE (x) == SFmode)
{
REAL_VALUE_TYPE rv;
long l;
REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
REAL_VALUE_TO_TARGET_SINGLE (rv, l);
value = l;
}
else if (GET_MODE (x) == VOIDmode)
value = CONST_DOUBLE_LOW (x);
else
fatal_insn ("Bad insn in frv_print_operand, bad const_double", x);
}
else
value = 0;
switch (code)
{
case '.':
fputs (reg_names[GPR_R0], file);
break;
case '#':
fprintf (file, "%d", frv_print_operand_jump_hint (current_output_insn));
break;
case SDATA_FLAG_CHAR:
fputs (reg_names[SDA_BASE_REG], file);
break;
case '~':
fputs (reg_names[PIC_REGNO], file);
break;
case '*':
fputs (reg_names[ICR_TEMP], file);
break;
case '&':
fputs (reg_names[ICC_TEMP], file);
break;
case 'C':
switch (GET_CODE (x))
{
default:
fatal_insn ("Bad insn to frv_print_operand, 'C' modifier:", x);
case EQ: fputs ("ne", file); break;
case NE: fputs ("eq", file); break;
case LT: fputs ("ge", file); break;
case LE: fputs ("gt", file); break;
case GT: fputs ("le", file); break;
case GE: fputs ("lt", file); break;
case LTU: fputs ("nc", file); break;
case LEU: fputs ("hi", file); break;
case GTU: fputs ("ls", file); break;
case GEU: fputs ("c", file); break;
}
break;
case 'c':
switch (GET_CODE (x))
{
default:
fatal_insn ("Bad insn to frv_print_operand, 'c' modifier:", x);
case EQ: fputs ("eq", file); break;
case NE: fputs ("ne", file); break;
case LT: fputs ("lt", file); break;
case LE: fputs ("le", file); break;
case GT: fputs ("gt", file); break;
case GE: fputs ("ge", file); break;
case LTU: fputs ("c", file); break;
case LEU: fputs ("ls", file); break;
case GTU: fputs ("hi", file); break;
case GEU: fputs ("nc", file); break;
}
break;
case 'e':
if (GET_CODE (x) == NE)
fputs ("1", file);
else if (GET_CODE (x) == EQ)
fputs ("0", file);
else
fatal_insn ("Bad insn to frv_print_operand, 'e' modifier:", x);
break;
case 'F':
switch (GET_CODE (x))
{
default:
fatal_insn ("Bad insn to frv_print_operand, 'F' modifier:", x);
case EQ: fputs ("ne", file); break;
case NE: fputs ("eq", file); break;
case LT: fputs ("uge", file); break;
case LE: fputs ("ug", file); break;
case GT: fputs ("ule", file); break;
case GE: fputs ("ul", file); break;
}
break;
case 'f':
switch (GET_CODE (x))
{
default:
fatal_insn ("Bad insn to frv_print_operand, 'f' modifier:", x);
case EQ: fputs ("eq", file); break;
case NE: fputs ("ne", file); break;
case LT: fputs ("lt", file); break;
case LE: fputs ("le", file); break;
case GT: fputs ("gt", file); break;
case GE: fputs ("ge", file); break;
}
break;
case 'I':
if (GET_CODE (x) == MEM)
x = ((GET_CODE (XEXP (x, 0)) == PLUS)
? XEXP (XEXP (x, 0), 1)
: XEXP (x, 0));
switch (GET_CODE (x))
{
default:
break;
case CONST_INT:
case SYMBOL_REF:
case CONST:
fputs ("i", file);
break;
}
break;
case 'i':
if (GET_CODE (x) == CONST_INT)
fputs ("i", file);
else
{
if (GET_CODE (x) == CONST_INT
|| (GET_CODE (x) == PLUS
&& (GET_CODE (XEXP (x, 1)) == CONST_INT
|| GET_CODE (XEXP (x, 0)) == CONST_INT)))
fputs ("i", file);
}
break;
case 'L':
if (GET_CODE (x) == REG)
fputs (reg_names[ REGNO (x)+1 ], file);
else
fatal_insn ("Bad insn to frv_print_operand, 'L' modifier:", x);
break;
case 'M':
case 'N':
offset = (code == 'M') ? 0 : UNITS_PER_WORD;
switch (GET_CODE (x))
{
default:
fatal_insn ("Bad insn to frv_print_operand, 'M/N' modifier:", x);
case MEM:
frv_print_operand_memory_reference (file, XEXP (x, 0), offset);
break;
case REG:
case SUBREG:
case CONST_INT:
case PLUS:
case SYMBOL_REF:
frv_print_operand_memory_reference (file, x, offset);
break;
}
break;
case 'O':
switch (GET_CODE (x))
{
default:
fatal_insn ("Bad insn to frv_print_operand, 'O' modifier:", x);
case PLUS: fputs ("add", file); break;
case MINUS: fputs ("sub", file); break;
case AND: fputs ("and", file); break;
case IOR: fputs ("or", file); break;
case XOR: fputs ("xor", file); break;
case ASHIFT: fputs ("sll", file); break;
case ASHIFTRT: fputs ("sra", file); break;
case LSHIFTRT: fputs ("srl", file); break;
}
break;
case 'P':
if (GET_CODE (x) != CONST_INT)
fatal_insn ("Bad insn to frv_print_operand, P modifier:", x);
fprintf (file, ".LCF%ld", (long)INTVAL (x));
break;
case 'U':
if (GET_CODE (x) == MEM && GET_CODE (XEXP (x, 0)) == PRE_MODIFY)
fputs ("u", file);
break;
case 'z':
if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0)
fputs (reg_names[GPR_R0], file);
else if (GET_CODE (x) == REG)
fputs (reg_names [REGNO (x)], file);
else
fatal_insn ("Bad insn in frv_print_operand, z case", x);
break;
case 'x':
if (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
{
fprintf (file, "%s0x%.4lx", IMMEDIATE_PREFIX, (long) value);
break;
}
case '\0':
if (GET_CODE (x) == REG)
fputs (reg_names [REGNO (x)], file);
else if (GET_CODE (x) == CONST_INT
|| GET_CODE (x) == CONST_DOUBLE)
fprintf (file, "%s%ld", IMMEDIATE_PREFIX, (long) value);
else if (GET_CODE (x) == MEM)
frv_print_operand_address (file, XEXP (x, 0));
else if (CONSTANT_ADDRESS_P (x))
frv_print_operand_address (file, x);
else
fatal_insn ("Bad insn in frv_print_operand, 0 case", x);
break;
default:
fatal_insn ("frv_print_operand: unknown code", x);
break;
}
return;
}
void
frv_init_cumulative_args (cum, fntype, libname, indirect, incoming)
CUMULATIVE_ARGS *cum;
tree fntype;
rtx libname;
int indirect;
int incoming;
{
*cum = FIRST_ARG_REGNUM;
if (TARGET_DEBUG_ARG)
{
fprintf (stderr, "\ninit_cumulative_args:");
if (indirect)
fputs (" indirect", stderr);
if (incoming)
fputs (" incoming", stderr);
if (fntype)
{
tree ret_type = TREE_TYPE (fntype);
fprintf (stderr, " return=%s,",
tree_code_name[ (int)TREE_CODE (ret_type) ]);
}
if (libname && GET_CODE (libname) == SYMBOL_REF)
fprintf (stderr, " libname=%s", XSTR (libname, 0));
if (cfun->returns_struct)
fprintf (stderr, " return-struct");
putc ('\n', stderr);
}
}
int
frv_function_arg_boundary (mode, type)
enum machine_mode mode ATTRIBUTE_UNUSED;
tree type ATTRIBUTE_UNUSED;
{
return BITS_PER_WORD;
}
rtx
frv_function_arg (cum, mode, type, named, incoming)
CUMULATIVE_ARGS *cum;
enum machine_mode mode;
tree type ATTRIBUTE_UNUSED;
int named;
int incoming ATTRIBUTE_UNUSED;
{
enum machine_mode xmode = (mode == BLKmode) ? SImode : mode;
int arg_num = *cum;
rtx ret;
const char *debstr;
if (xmode == VOIDmode)
{
ret = const0_rtx;
debstr = "<0>";
}
else if (arg_num <= LAST_ARG_REGNUM)
{
ret = gen_rtx (REG, xmode, arg_num);
debstr = reg_names[arg_num];
}
else
{
ret = NULL_RTX;
debstr = "memory";
}
if (TARGET_DEBUG_ARG)
fprintf (stderr,
"function_arg: words = %2d, mode = %4s, named = %d, size = %3d, arg = %s\n",
arg_num, GET_MODE_NAME (mode), named, GET_MODE_SIZE (mode), debstr);
return ret;
}
void
frv_function_arg_advance (cum, mode, type, named)
CUMULATIVE_ARGS *cum;
enum machine_mode mode;
tree type ATTRIBUTE_UNUSED;
int named;
{
enum machine_mode xmode = (mode == BLKmode) ? SImode : mode;
int bytes = GET_MODE_SIZE (xmode);
int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
int arg_num = *cum;
*cum = arg_num + words;
if (TARGET_DEBUG_ARG)
fprintf (stderr,
"function_adv: words = %2d, mode = %4s, named = %d, size = %3d\n",
arg_num, GET_MODE_NAME (mode), named, words * UNITS_PER_WORD);
}
int
frv_function_arg_partial_nregs (cum, mode, type, named)
CUMULATIVE_ARGS *cum;
enum machine_mode mode;
tree type ATTRIBUTE_UNUSED;
int named ATTRIBUTE_UNUSED;
{
enum machine_mode xmode = (mode == BLKmode) ? SImode : mode;
int bytes = GET_MODE_SIZE (xmode);
int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
int arg_num = *cum;
int ret;
ret = ((arg_num <= LAST_ARG_REGNUM && arg_num + words > LAST_ARG_REGNUM+1)
? LAST_ARG_REGNUM - arg_num + 1
: 0);
if (TARGET_DEBUG_ARG && ret)
fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
return ret;
}
int
frv_function_arg_pass_by_reference (cum, mode, type, named)
CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED;
enum machine_mode mode;
tree type;
int named ATTRIBUTE_UNUSED;
{
return MUST_PASS_IN_STACK (mode, type);
}
int
frv_function_arg_callee_copies (cum, mode, type, named)
CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED;
enum machine_mode mode ATTRIBUTE_UNUSED;
tree type ATTRIBUTE_UNUSED;
int named ATTRIBUTE_UNUSED;
{
return 0;
}
int
frv_function_arg_keep_as_reference (cum, mode, type, named)
CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED;
enum machine_mode mode ATTRIBUTE_UNUSED;
tree type ATTRIBUTE_UNUSED;
int named ATTRIBUTE_UNUSED;
{
return 0;
}
static FRV_INLINE int
frv_regno_ok_for_base_p (regno, strict_p)
int regno;
int strict_p;
{
if (GPR_P (regno))
return TRUE;
if (strict_p)
return (reg_renumber[regno] >= 0 && GPR_P (reg_renumber[regno]));
if (regno == ARG_POINTER_REGNUM)
return TRUE;
return (regno >= FIRST_PSEUDO_REGISTER);
}
int
frv_legitimate_address_p (mode, x, strict_p, condexec_p)
enum machine_mode mode;
rtx x;
int strict_p;
int condexec_p;
{
rtx x0, x1;
int ret = 0;
HOST_WIDE_INT value;
unsigned regno0;
switch (GET_CODE (x))
{
default:
break;
case SUBREG:
x = SUBREG_REG (x);
if (GET_CODE (x) != REG)
break;
case REG:
ret = frv_regno_ok_for_base_p (REGNO (x), strict_p);
break;
case PRE_MODIFY:
x0 = XEXP (x, 0);
x1 = XEXP (x, 1);
if (GET_CODE (x0) != REG
|| ! frv_regno_ok_for_base_p (REGNO (x0), strict_p)
|| GET_CODE (x1) != PLUS
|| ! rtx_equal_p (x0, XEXP (x1, 0))
|| GET_CODE (XEXP (x1, 1)) != REG
|| ! frv_regno_ok_for_base_p (REGNO (XEXP (x1, 1)), strict_p))
break;
ret = 1;
break;
case CONST_INT:
if (condexec_p)
ret = FALSE;
else
{
ret = IN_RANGE_P (INTVAL (x), -2048, 2047);
if (ret && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
ret = IN_RANGE_P (INTVAL (x) + GET_MODE_SIZE (mode) - 1,
-2048, 2047);
}
break;
case PLUS:
x0 = XEXP (x, 0);
x1 = XEXP (x, 1);
if (GET_CODE (x0) == SUBREG)
x0 = SUBREG_REG (x0);
if (GET_CODE (x0) != REG)
break;
regno0 = REGNO (x0);
if (!frv_regno_ok_for_base_p (regno0, strict_p))
break;
switch (GET_CODE (x1))
{
default:
break;
case SUBREG:
x1 = SUBREG_REG (x1);
if (GET_CODE (x1) != REG)
break;
case REG:
if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
ret = FALSE;
else
ret = frv_regno_ok_for_base_p (REGNO (x1), strict_p);
break;
case CONST_INT:
if (condexec_p)
ret = FALSE;
else
{
value = INTVAL (x1);
ret = IN_RANGE_P (value, -2048, 2047);
if (ret && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
ret = IN_RANGE_P (value + GET_MODE_SIZE (mode) - 1, -2048, 2047);
}
break;
case SYMBOL_REF:
if (!condexec_p
&& regno0 == SDA_BASE_REG
&& symbol_ref_small_data_p (x1))
ret = TRUE;
break;
case CONST:
if (!condexec_p && regno0 == SDA_BASE_REG && const_small_data_p (x1))
ret = TRUE;
break;
}
break;
}
if (TARGET_DEBUG_ADDR)
{
fprintf (stderr, "\n========== GO_IF_LEGITIMATE_ADDRESS, mode = %s, result = %d, addresses are %sstrict%s\n",
GET_MODE_NAME (mode), ret, (strict_p) ? "" : "not ",
(condexec_p) ? ", inside conditional code" : "");
debug_rtx (x);
}
return ret;
}
rtx
frv_legitimize_address (x, oldx, mode)
rtx x;
rtx oldx ATTRIBUTE_UNUSED;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
rtx ret = NULL_RTX;
if (optimize
&& ((GET_CODE (x) == SYMBOL_REF && symbol_ref_small_data_p (x))
|| (GET_CODE (x) == CONST && const_small_data_p (x))))
{
ret = gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, SDA_BASE_REG), x);
if (flag_pic)
cfun->uses_pic_offset_table = TRUE;
}
if (TARGET_DEBUG_ADDR && ret != NULL_RTX)
{
fprintf (stderr, "\n========== LEGITIMIZE_ADDRESS, mode = %s, modified address\n",
GET_MODE_NAME (mode));
debug_rtx (ret);
}
return ret;
}
static int
frv_legitimate_memory_operand (op, mode, condexec_p)
rtx op;
enum machine_mode mode;
int condexec_p;
{
return ((GET_MODE (op) == mode || mode == VOIDmode)
&& GET_CODE (op) == MEM
&& frv_legitimate_address_p (mode, XEXP (op, 0),
reload_completed, condexec_p));
}
int frv_load_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (reload_in_progress)
{
rtx tmp = op;
if (GET_CODE (tmp) == SUBREG)
tmp = SUBREG_REG (tmp);
if (GET_CODE (tmp) == REG
&& REGNO (tmp) >= FIRST_PSEUDO_REGISTER)
op = reg_equiv_memory_loc[REGNO (tmp)];
}
return op && memory_operand (op, mode);
}
int gpr_or_fpr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (GPR_P (regno) || FPR_P (regno) || regno >= FIRST_PSEUDO_REGISTER)
return TRUE;
return FALSE;
}
int gpr_or_int12_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_CODE (op) == CONST_INT)
return IN_RANGE_P (INTVAL (op), -2048, 2047);
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
return GPR_OR_PSEUDO_P (REGNO (op));
}
int gpr_fpr_or_int12_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_CODE (op) == CONST_INT)
return IN_RANGE_P (INTVAL (op), -2048, 2047);
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (GPR_P (regno) || FPR_P (regno) || regno >= FIRST_PSEUDO_REGISTER)
return TRUE;
return FALSE;
}
int fpr_or_int6_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_CODE (op) == CONST_INT)
return IN_RANGE_P (INTVAL (op), -32, 31);
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
return FPR_OR_PSEUDO_P (REGNO (op));
}
int gpr_or_int10_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_CODE (op) == CONST_INT)
return IN_RANGE_P (INTVAL (op), -512, 511);
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
return GPR_OR_PSEUDO_P (REGNO (op));
}
int gpr_or_int_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_CODE (op) == CONST_INT)
return TRUE;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
return GPR_OR_PSEUDO_P (REGNO (op));
}
int int12_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) != CONST_INT)
return FALSE;
return IN_RANGE_P (INTVAL (op), -2048, 2047);
}
int int6_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) != CONST_INT)
return FALSE;
return IN_RANGE_P (INTVAL (op), -32, 31);
}
int int5_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), -16, 15);
}
int uint5_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), 0, 31);
}
int uint4_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), 0, 15);
}
int uint1_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return GET_CODE (op) == CONST_INT && IN_RANGE_P (INTVAL (op), 0, 1);
}
int int_2word_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
HOST_WIDE_INT value;
REAL_VALUE_TYPE rv;
long l;
switch (GET_CODE (op))
{
default:
break;
case LABEL_REF:
return (flag_pic == 0);
case CONST:
return (flag_pic == 0) && (! const_small_data_p (op));
case SYMBOL_REF:
return (flag_pic == 0) && (! symbol_ref_small_data_p (op));
case CONST_INT:
return ! IN_RANGE_P (INTVAL (op), -32768, 32767);
case CONST_DOUBLE:
if (GET_MODE (op) == SFmode)
{
REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
REAL_VALUE_TO_TARGET_SINGLE (rv, l);
value = l;
return ! IN_RANGE_P (value, -32768, 32767);
}
else if (GET_MODE (op) == VOIDmode)
{
value = CONST_DOUBLE_LOW (op);
return ! IN_RANGE_P (value, -32768, 32767);
}
break;
}
return FALSE;
}
int
pic_register_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (! flag_pic)
return FALSE;
if (GET_CODE (op) != REG)
return FALSE;
if (REGNO (op) != PIC_REGNO)
return FALSE;
return TRUE;
}
int pic_symbolic_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (! flag_pic)
return FALSE;
switch (GET_CODE (op))
{
default:
break;
case LABEL_REF:
return TRUE;
case SYMBOL_REF:
return ! symbol_ref_small_data_p (op);
case CONST:
return ! const_small_data_p (op);
}
return FALSE;
}
int
small_data_register_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) != REG)
return FALSE;
if (REGNO (op) != SDA_BASE_REG)
return FALSE;
return TRUE;
}
int small_data_symbolic_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
switch (GET_CODE (op))
{
default:
break;
case CONST:
return const_small_data_p (op);
case SYMBOL_REF:
return symbol_ref_small_data_p (op);
}
return FALSE;
}
int uint16_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) != CONST_INT)
return FALSE;
return IN_RANGE_P (INTVAL (op), 0, 0xffff);
}
int upper_int16_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) != CONST_INT)
return FALSE;
return ((INTVAL (op) & 0xffff) == 0);
}
int
integer_register_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
return GPR_OR_PSEUDO_P (REGNO (op));
}
int
gpr_no_subreg_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) != REG)
return FALSE;
return GPR_OR_PSEUDO_P (REGNO (op));
}
int
fpr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
return FPR_OR_PSEUDO_P (REGNO (op));
}
int
even_reg_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (regno >= FIRST_PSEUDO_REGISTER)
return TRUE;
if (GPR_P (regno))
return (((regno - GPR_FIRST) & 1) == 0);
if (FPR_P (regno))
return (((regno - FPR_FIRST) & 1) == 0);
return FALSE;
}
int
odd_reg_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (regno >= FIRST_PSEUDO_REGISTER)
return FALSE;
if (GPR_P (regno))
return (((regno - GPR_FIRST) & 1) != 0);
if (FPR_P (regno))
return (((regno - FPR_FIRST) & 1) != 0);
return FALSE;
}
int
even_gpr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (regno >= FIRST_PSEUDO_REGISTER)
return TRUE;
if (! GPR_P (regno))
return FALSE;
return (((regno - GPR_FIRST) & 1) == 0);
}
int
odd_gpr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (regno >= FIRST_PSEUDO_REGISTER)
return FALSE;
if (! GPR_P (regno))
return FALSE;
return (((regno - GPR_FIRST) & 1) != 0);
}
int
quad_fpr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (regno >= FIRST_PSEUDO_REGISTER)
return TRUE;
if (! FPR_P (regno))
return FALSE;
return (((regno - FPR_FIRST) & 3) == 0);
}
int
even_fpr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (regno >= FIRST_PSEUDO_REGISTER)
return TRUE;
if (! FPR_P (regno))
return FALSE;
return (((regno - FPR_FIRST) & 1) == 0);
}
int
odd_fpr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (regno >= FIRST_PSEUDO_REGISTER)
return FALSE;
if (! FPR_P (regno))
return FALSE;
return (((regno - FPR_FIRST) & 1) != 0);
}
int
dbl_memory_one_insn_operand (op, mode)
rtx op;
enum machine_mode mode;
{
rtx addr;
rtx addr_reg;
if (! TARGET_DWORD)
return FALSE;
if (GET_CODE (op) != MEM)
return FALSE;
if (mode != VOIDmode && GET_MODE_SIZE (mode) != 2*UNITS_PER_WORD)
return FALSE;
addr = XEXP (op, 0);
if (GET_CODE (addr) == REG)
addr_reg = addr;
else if (GET_CODE (addr) == PLUS)
{
rtx addr0 = XEXP (addr, 0);
rtx addr1 = XEXP (addr, 1);
if (GET_CODE (addr0) != REG)
return FALSE;
if (plus_small_data_p (addr0, addr1))
return TRUE;
if (GET_CODE (addr1) != CONST_INT)
return FALSE;
if ((INTVAL (addr1) & 7) != 0)
return FALSE;
addr_reg = addr0;
}
else
return FALSE;
if (addr_reg == frame_pointer_rtx || addr_reg == stack_pointer_rtx)
return TRUE;
return FALSE;
}
int
dbl_memory_two_insn_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_CODE (op) != MEM)
return FALSE;
if (mode != VOIDmode && GET_MODE_SIZE (mode) != 2*UNITS_PER_WORD)
return FALSE;
if (! TARGET_DWORD)
return TRUE;
return ! dbl_memory_one_insn_operand (op, mode);
}
int
move_destination_operand (op, mode)
rtx op;
enum machine_mode mode;
{
rtx subreg;
enum rtx_code code;
switch (GET_CODE (op))
{
default:
break;
case SUBREG:
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
subreg = SUBREG_REG (op);
code = GET_CODE (subreg);
if (code == MEM)
return frv_legitimate_address_p (mode, XEXP (subreg, 0),
reload_completed, FALSE);
return (code == REG);
case REG:
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
return TRUE;
case MEM:
if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
return TRUE;
return frv_legitimate_memory_operand (op, mode, FALSE);
}
return FALSE;
}
int
move_source_operand (op, mode)
rtx op;
enum machine_mode mode;
{
rtx subreg;
enum rtx_code code;
switch (GET_CODE (op))
{
default:
break;
case CONST_INT:
case CONST_DOUBLE:
case SYMBOL_REF:
case LABEL_REF:
case CONST:
return immediate_operand (op, mode);
case SUBREG:
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
subreg = SUBREG_REG (op);
code = GET_CODE (subreg);
if (code == MEM)
return frv_legitimate_address_p (mode, XEXP (subreg, 0),
reload_completed, FALSE);
return (code == REG);
case REG:
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
return TRUE;
case MEM:
if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
return TRUE;
return frv_legitimate_memory_operand (op, mode, FALSE);
}
return FALSE;
}
int
condexec_dest_operand (op, mode)
rtx op;
enum machine_mode mode;
{
rtx subreg;
enum rtx_code code;
switch (GET_CODE (op))
{
default:
break;
case SUBREG:
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
subreg = SUBREG_REG (op);
code = GET_CODE (subreg);
if (code == MEM)
return frv_legitimate_address_p (mode, XEXP (subreg, 0),
reload_completed, TRUE);
return (code == REG);
case REG:
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
return TRUE;
case MEM:
if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
return TRUE;
return frv_legitimate_memory_operand (op, mode, TRUE);
}
return FALSE;
}
int
condexec_source_operand (op, mode)
rtx op;
enum machine_mode mode;
{
rtx subreg;
enum rtx_code code;
switch (GET_CODE (op))
{
default:
break;
case CONST_INT:
case CONST_DOUBLE:
return ZERO_P (op);
case SUBREG:
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
subreg = SUBREG_REG (op);
code = GET_CODE (subreg);
if (code == MEM)
return frv_legitimate_address_p (mode, XEXP (subreg, 0),
reload_completed, TRUE);
return (code == REG);
case REG:
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
return TRUE;
case MEM:
if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
return TRUE;
return frv_legitimate_memory_operand (op, mode, TRUE);
}
return FALSE;
}
int
reg_or_0_operand (op, mode)
rtx op;
enum machine_mode mode;
{
switch (GET_CODE (op))
{
default:
break;
case REG:
case SUBREG:
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
return register_operand (op, mode);
case CONST_INT:
case CONST_DOUBLE:
return ZERO_P (op);
}
return FALSE;
}
int
lr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_CODE (op) != REG)
return FALSE;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (REGNO (op) != LR_REGNO && REGNO (op) < FIRST_PSEUDO_REGISTER)
return FALSE;
return TRUE;
}
int
gpr_or_memory_operand (op, mode)
rtx op;
enum machine_mode mode;
{
return (integer_register_operand (op, mode)
|| frv_legitimate_memory_operand (op, mode, FALSE));
}
int
fpr_or_memory_operand (op, mode)
rtx op;
enum machine_mode mode;
{
return (fpr_operand (op, mode)
|| frv_legitimate_memory_operand (op, mode, FALSE));
}
int
icc_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
return ICC_OR_PSEUDO_P (regno);
}
int
fcc_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
return FCC_OR_PSEUDO_P (regno);
}
int
cc_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (CC_OR_PSEUDO_P (regno))
return TRUE;
return FALSE;
}
int
icr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
return ICR_OR_PSEUDO_P (regno);
}
int
fcr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
return FCR_OR_PSEUDO_P (regno);
}
int
cr_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
if (CR_OR_PSEUDO_P (regno))
return TRUE;
return FALSE;
}
int
call_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_MODE (op) != mode && mode != VOIDmode && GET_CODE (op) != CONST_INT)
return FALSE;
if (GET_CODE (op) == SYMBOL_REF)
return TRUE;
return gpr_or_int12_operand (op, mode);
}
int
relational_operator (op, mode)
rtx op;
enum machine_mode mode;
{
rtx op0;
rtx op1;
int regno;
if (mode != VOIDmode && mode != GET_MODE (op))
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case EQ:
case NE:
case LE:
case LT:
case GE:
case GT:
case LEU:
case LTU:
case GEU:
case GTU:
break;
}
op1 = XEXP (op, 1);
if (op1 != const0_rtx)
return FALSE;
op0 = XEXP (op, 0);
if (GET_CODE (op0) != REG)
return FALSE;
regno = REGNO (op0);
switch (GET_MODE (op0))
{
default:
break;
case CCmode:
case CC_UNSmode:
return ICC_OR_PSEUDO_P (regno);
case CC_FPmode:
return FCC_OR_PSEUDO_P (regno);
case CC_CCRmode:
return CR_OR_PSEUDO_P (regno);
}
return FALSE;
}
int
signed_relational_operator (op, mode)
rtx op;
enum machine_mode mode;
{
rtx op0;
rtx op1;
int regno;
if (mode != VOIDmode && mode != GET_MODE (op))
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case EQ:
case NE:
case LE:
case LT:
case GE:
case GT:
break;
}
op1 = XEXP (op, 1);
if (op1 != const0_rtx)
return FALSE;
op0 = XEXP (op, 0);
if (GET_CODE (op0) != REG)
return FALSE;
regno = REGNO (op0);
if (GET_MODE (op0) == CCmode && ICC_OR_PSEUDO_P (regno))
return TRUE;
if (GET_MODE (op0) == CC_CCRmode && CR_OR_PSEUDO_P (regno))
return TRUE;
return FALSE;
}
int
unsigned_relational_operator (op, mode)
rtx op;
enum machine_mode mode;
{
rtx op0;
rtx op1;
int regno;
if (mode != VOIDmode && mode != GET_MODE (op))
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case LEU:
case LTU:
case GEU:
case GTU:
break;
}
op1 = XEXP (op, 1);
if (op1 != const0_rtx)
return FALSE;
op0 = XEXP (op, 0);
if (GET_CODE (op0) != REG)
return FALSE;
regno = REGNO (op0);
if (GET_MODE (op0) == CC_UNSmode && ICC_OR_PSEUDO_P (regno))
return TRUE;
if (GET_MODE (op0) == CC_CCRmode && CR_OR_PSEUDO_P (regno))
return TRUE;
return FALSE;
}
int
float_relational_operator (op, mode)
rtx op;
enum machine_mode mode;
{
rtx op0;
rtx op1;
int regno;
if (mode != VOIDmode && mode != GET_MODE (op))
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case EQ: case NE:
case LE: case LT:
case GE: case GT:
#if 0
case UEQ: case UNE:
case ULE: case ULT:
case UGE: case UGT:
case ORDERED:
case UNORDERED:
#endif
break;
}
op1 = XEXP (op, 1);
if (op1 != const0_rtx)
return FALSE;
op0 = XEXP (op, 0);
if (GET_CODE (op0) != REG)
return FALSE;
regno = REGNO (op0);
if (GET_MODE (op0) == CC_FPmode && FCC_OR_PSEUDO_P (regno))
return TRUE;
if (GET_MODE (op0) == CC_CCRmode && CR_OR_PSEUDO_P (regno))
return TRUE;
return FALSE;
}
int
ccr_eqne_operator (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
rtx op0;
rtx op1;
int regno;
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case EQ:
case NE:
break;
}
op1 = XEXP (op, 1);
if (op1 != const0_rtx)
return FALSE;
op0 = XEXP (op, 0);
if (GET_CODE (op0) != REG)
return FALSE;
regno = REGNO (op0);
if (op_mode == CC_CCRmode && CR_OR_PSEUDO_P (regno))
return TRUE;
return FALSE;
}
int
minmax_operator (op, mode)
rtx op;
enum machine_mode mode;
{
if (mode != VOIDmode && mode != GET_MODE (op))
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case SMIN:
case SMAX:
case UMIN:
case UMAX:
break;
}
if (! integer_register_operand (XEXP (op, 0), mode))
return FALSE;
if (! gpr_or_int10_operand (XEXP (op, 1), mode))
return FALSE;
return TRUE;
}
int
condexec_si_binary_operator (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case PLUS:
case MINUS:
case AND:
case IOR:
case XOR:
case ASHIFT:
case ASHIFTRT:
case LSHIFTRT:
return TRUE;
}
}
int
condexec_si_media_operator (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case AND:
case IOR:
case XOR:
return TRUE;
}
}
int
condexec_si_divide_operator (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case DIV:
case UDIV:
return TRUE;
}
}
int
condexec_si_unary_operator (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case NEG:
case NOT:
return TRUE;
}
}
int
condexec_sf_conv_operator (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case NEG:
case ABS:
return TRUE;
}
}
int
condexec_sf_add_operator (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case PLUS:
case MINUS:
return TRUE;
}
}
int
condexec_memory_operand (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
rtx addr;
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (op_mode)
{
default:
return FALSE;
case QImode:
case HImode:
case SImode:
case SFmode:
break;
}
if (GET_CODE (op) != MEM)
return FALSE;
addr = XEXP (op, 0);
if (GET_CODE (addr) == ADDRESSOF)
return TRUE;
return frv_legitimate_address_p (mode, addr, reload_completed, TRUE);
}
int
intop_compare_operator (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case AND:
case IOR:
case XOR:
case ASHIFTRT:
case LSHIFTRT:
break;
}
if (! integer_register_operand (XEXP (op, 0), SImode))
return FALSE;
if (! gpr_or_int10_operand (XEXP (op, 1), SImode))
return FALSE;
return TRUE;
}
int
condexec_intop_cmp_operator (op, mode)
rtx op;
enum machine_mode mode;
{
enum machine_mode op_mode = GET_MODE (op);
if (mode != VOIDmode && op_mode != mode)
return FALSE;
switch (GET_CODE (op))
{
default:
return FALSE;
case AND:
case IOR:
case XOR:
case ASHIFTRT:
case LSHIFTRT:
break;
}
if (! integer_register_operand (XEXP (op, 0), SImode))
return FALSE;
if (! integer_register_operand (XEXP (op, 1), SImode))
return FALSE;
return TRUE;
}
int
acc_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
return ACC_OR_PSEUDO_P (regno);
}
int
even_acc_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
return (ACC_OR_PSEUDO_P (regno) && ((regno - ACC_FIRST) & 1) == 0);
}
int
quad_acc_operand (op, mode)
rtx op;
enum machine_mode mode;
{
int regno;
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
regno = REGNO (op);
return (ACC_OR_PSEUDO_P (regno) && ((regno - ACC_FIRST) & 3) == 0);
}
int
accg_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_MODE (op) != mode && mode != VOIDmode)
return FALSE;
if (GET_CODE (op) == SUBREG)
{
if (GET_CODE (SUBREG_REG (op)) != REG)
return register_operand (op, mode);
op = SUBREG_REG (op);
}
if (GET_CODE (op) != REG)
return FALSE;
return ACCG_OR_PSEUDO_P (REGNO (op));
}
int
direct_return_p ()
{
frv_stack_t *info;
if (!reload_completed)
return FALSE;
info = frv_stack_info ();
return (info->total_size == 0);
}
int
frv_emit_movsi (dest, src)
rtx dest;
rtx src;
{
int base_regno = -1;
if (!reload_in_progress
&& !reload_completed
&& !register_operand (dest, SImode)
&& (!reg_or_0_operand (src, SImode)
|| (GET_CODE (src) == REG
&& IN_RANGE_P (REGNO (src),
FIRST_VIRTUAL_REGISTER,
LAST_VIRTUAL_REGISTER))))
{
emit_insn (gen_rtx_SET (VOIDmode, dest, copy_to_mode_reg (SImode, src)));
return TRUE;
}
switch (GET_CODE (src))
{
default:
break;
case LABEL_REF:
if (flag_pic)
base_regno = PIC_REGNO;
break;
case CONST:
if (const_small_data_p (src))
base_regno = SDA_BASE_REG;
else if (flag_pic)
base_regno = PIC_REGNO;
break;
case SYMBOL_REF:
if (symbol_ref_small_data_p (src))
base_regno = SDA_BASE_REG;
else if (flag_pic)
base_regno = PIC_REGNO;
break;
}
if (base_regno >= 0)
{
emit_insn (gen_rtx_SET (VOIDmode, dest,
gen_rtx_PLUS (Pmode,
gen_rtx_REG (Pmode, base_regno),
src)));
if (base_regno == PIC_REGNO)
cfun->uses_pic_offset_table = TRUE;
return TRUE;
}
return FALSE;
}
const char *
output_move_single (operands, insn)
rtx operands[];
rtx insn;
{
rtx dest = operands[0];
rtx src = operands[1];
if (GET_CODE (dest) == REG)
{
int dest_regno = REGNO (dest);
enum machine_mode mode = GET_MODE (dest);
if (GPR_P (dest_regno))
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
if (GPR_P (src_regno))
return "mov %1, %0";
else if (FPR_P (src_regno))
return "movfg %1, %0";
else if (SPR_P (src_regno))
return "movsg %1, %0";
}
else if (GET_CODE (src) == MEM)
{
switch (mode)
{
default:
break;
case QImode:
return "ldsb%I1%U1 %M1,%0";
case HImode:
return "ldsh%I1%U1 %M1,%0";
case SImode:
case SFmode:
return "ld%I1%U1 %M1, %0";
}
}
else if (GET_CODE (src) == CONST_INT
|| GET_CODE (src) == CONST_DOUBLE)
{
HOST_WIDE_INT value;
if (GET_CODE (src) == CONST_INT)
value = INTVAL (src);
else if (mode == SFmode)
{
REAL_VALUE_TYPE rv;
long l;
REAL_VALUE_FROM_CONST_DOUBLE (rv, src);
REAL_VALUE_TO_TARGET_SINGLE (rv, l);
value = l;
}
else
value = CONST_DOUBLE_LOW (src);
if (IN_RANGE_P (value, -32768, 32767))
return "setlos %1, %0";
return "#";
}
else if (GET_CODE (src) == SYMBOL_REF
|| GET_CODE (src) == LABEL_REF
|| GET_CODE (src) == CONST)
{
if (small_data_symbolic_operand (src, GET_MODE (src)))
return "addi %@, #gprel12(%1), %0";
return "#";
}
}
else if (FPR_P (dest_regno))
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
if (GPR_P (src_regno))
return "movgf %1, %0";
else if (FPR_P (src_regno))
{
if (TARGET_HARD_FLOAT)
return "fmovs %1, %0";
else
return "mor %1, %1, %0";
}
}
else if (GET_CODE (src) == MEM)
{
switch (mode)
{
default:
break;
case QImode:
return "ldbf%I1%U1 %M1,%0";
case HImode:
return "ldhf%I1%U1 %M1,%0";
case SImode:
case SFmode:
return "ldf%I1%U1 %M1, %0";
}
}
else if (ZERO_P (src))
return "movgf %., %0";
}
else if (SPR_P (dest_regno))
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
if (GPR_P (src_regno))
return "movgs %1, %0";
}
}
}
else if (GET_CODE (dest) == MEM)
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
enum machine_mode mode = GET_MODE (dest);
if (GPR_P (src_regno))
{
switch (mode)
{
default:
break;
case QImode:
return "stb%I0%U0 %1, %M0";
case HImode:
return "sth%I0%U0 %1, %M0";
case SImode:
case SFmode:
return "st%I0%U0 %1, %M0";
}
}
else if (FPR_P (src_regno))
{
switch (mode)
{
default:
break;
case QImode:
return "stbf%I0%U0 %1, %M0";
case HImode:
return "sthf%I0%U0 %1, %M0";
case SImode:
case SFmode:
return "stf%I0%U0 %1, %M0";
}
}
}
else if (ZERO_P (src))
{
switch (GET_MODE (dest))
{
default:
break;
case QImode:
return "stb%I0%U0 %., %M0";
case HImode:
return "sth%I0%U0 %., %M0";
case SImode:
case SFmode:
return "st%I0%U0 %., %M0";
}
}
}
fatal_insn ("Bad output_move_single operand", insn);
return "";
}
const char *
output_move_double (operands, insn)
rtx operands[];
rtx insn;
{
rtx dest = operands[0];
rtx src = operands[1];
enum machine_mode mode = GET_MODE (dest);
if (GET_CODE (dest) == REG)
{
int dest_regno = REGNO (dest);
if (GPR_P (dest_regno))
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
if (GPR_P (src_regno))
return "#";
else if (FPR_P (src_regno))
{
if (((dest_regno - GPR_FIRST) & 1) == 0
&& ((src_regno - FPR_FIRST) & 1) == 0)
return "movfgd %1, %0";
return "#";
}
}
else if (GET_CODE (src) == MEM)
{
if (dbl_memory_one_insn_operand (src, mode))
return "ldd%I1%U1 %M1, %0";
return "#";
}
else if (GET_CODE (src) == CONST_INT
|| GET_CODE (src) == CONST_DOUBLE)
return "#";
}
else if (FPR_P (dest_regno))
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
if (GPR_P (src_regno))
{
if (((dest_regno - FPR_FIRST) & 1) == 0
&& ((src_regno - GPR_FIRST) & 1) == 0)
return "movgfd %1, %0";
return "#";
}
else if (FPR_P (src_regno))
{
if (TARGET_DOUBLE
&& ((dest_regno - FPR_FIRST) & 1) == 0
&& ((src_regno - FPR_FIRST) & 1) == 0)
return "fmovd %1, %0";
return "#";
}
}
else if (GET_CODE (src) == MEM)
{
if (dbl_memory_one_insn_operand (src, mode))
return "lddf%I1%U1 %M1, %0";
return "#";
}
else if (ZERO_P (src))
return "#";
}
}
else if (GET_CODE (dest) == MEM)
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
if (GPR_P (src_regno))
{
if (((src_regno - GPR_FIRST) & 1) == 0
&& dbl_memory_one_insn_operand (dest, mode))
return "std%I0%U0 %1, %M0";
return "#";
}
if (FPR_P (src_regno))
{
if (((src_regno - FPR_FIRST) & 1) == 0
&& dbl_memory_one_insn_operand (dest, mode))
return "stdf%I0%U0 %1, %M0";
return "#";
}
}
else if (ZERO_P (src))
{
if (dbl_memory_one_insn_operand (dest, mode))
return "std%I0%U0 %., %M0";
return "#";
}
}
fatal_insn ("Bad output_move_double operand", insn);
return "";
}
const char *
output_condmove_single (operands, insn)
rtx operands[];
rtx insn;
{
rtx dest = operands[2];
rtx src = operands[3];
if (GET_CODE (dest) == REG)
{
int dest_regno = REGNO (dest);
enum machine_mode mode = GET_MODE (dest);
if (GPR_P (dest_regno))
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
if (GPR_P (src_regno))
return "cmov %z3, %2, %1, %e0";
else if (FPR_P (src_regno))
return "cmovfg %3, %2, %1, %e0";
}
else if (GET_CODE (src) == MEM)
{
switch (mode)
{
default:
break;
case QImode:
return "cldsb%I3%U3 %M3, %2, %1, %e0";
case HImode:
return "cldsh%I3%U3 %M3, %2, %1, %e0";
case SImode:
case SFmode:
return "cld%I3%U3 %M3, %2, %1, %e0";
}
}
else if (ZERO_P (src))
return "cmov %., %2, %1, %e0";
}
else if (FPR_P (dest_regno))
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
if (GPR_P (src_regno))
return "cmovgf %3, %2, %1, %e0";
else if (FPR_P (src_regno))
{
if (TARGET_HARD_FLOAT)
return "cfmovs %3,%2,%1,%e0";
else
return "cmor %3, %3, %2, %1, %e0";
}
}
else if (GET_CODE (src) == MEM)
{
if (mode == SImode || mode == SFmode)
return "cldf%I3%U3 %M3, %2, %1, %e0";
}
else if (ZERO_P (src))
return "cmovgf %., %2, %1, %e0";
}
}
else if (GET_CODE (dest) == MEM)
{
if (GET_CODE (src) == REG)
{
int src_regno = REGNO (src);
enum machine_mode mode = GET_MODE (dest);
if (GPR_P (src_regno))
{
switch (mode)
{
default:
break;
case QImode:
return "cstb%I2%U2 %3, %M2, %1, %e0";
case HImode:
return "csth%I2%U2 %3, %M2, %1, %e0";
case SImode:
case SFmode:
return "cst%I2%U2 %3, %M2, %1, %e0";
}
}
else if (FPR_P (src_regno) && (mode == SImode || mode == SFmode))
return "cstf%I2%U2 %3, %M2, %1, %e0";
}
else if (ZERO_P (src))
{
enum machine_mode mode = GET_MODE (dest);
switch (mode)
{
default:
break;
case QImode:
return "cstb%I2%U2 %., %M2, %1, %e0";
case HImode:
return "csth%I2%U2 %., %M2, %1, %e0";
case SImode:
case SFmode:
return "cst%I2%U2 %., %M2, %1, %e0";
}
}
}
fatal_insn ("Bad output_condmove_single operand", insn);
return "";
}
static rtx
frv_emit_comparison (test, op0, op1)
enum rtx_code test;
rtx op0;
rtx op1;
{
enum machine_mode cc_mode;
rtx cc_reg;
if (GET_MODE (op0) == CC_FPmode && GET_CODE (op1) != REG)
op1 = force_reg (GET_MODE (op0), op1);
cc_mode = SELECT_CC_MODE (test, op0, op1);
cc_reg = ((TARGET_ALLOC_CC)
? gen_reg_rtx (cc_mode)
: gen_rtx_REG (cc_mode,
(cc_mode == CC_FPmode) ? FCC_FIRST : ICC_FIRST));
emit_insn (gen_rtx_SET (VOIDmode, cc_reg,
gen_rtx_COMPARE (cc_mode, op0, op1)));
return cc_reg;
}
int
frv_emit_cond_branch (test, label)
enum rtx_code test;
rtx label;
{
rtx test_rtx;
rtx label_ref;
rtx if_else;
rtx cc_reg = frv_emit_comparison (test, frv_compare_op0, frv_compare_op1);
enum machine_mode cc_mode = GET_MODE (cc_reg);
label_ref = gen_rtx_LABEL_REF (VOIDmode, label);
test_rtx = gen_rtx (test, cc_mode, cc_reg, const0_rtx);
if_else = gen_rtx_IF_THEN_ELSE (cc_mode, test_rtx, label_ref, pc_rtx);
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, if_else));
return TRUE;
}
int
frv_emit_scc (test, target)
enum rtx_code test;
rtx target;
{
rtx set;
rtx test_rtx;
rtx clobber;
rtx cr_reg;
rtx cc_reg = frv_emit_comparison (test, frv_compare_op0, frv_compare_op1);
test_rtx = gen_rtx_fmt_ee (test, SImode, cc_reg, const0_rtx);
set = gen_rtx_SET (VOIDmode, target, test_rtx);
cr_reg = ((TARGET_ALLOC_CC)
? gen_reg_rtx (CC_CCRmode)
: gen_rtx_REG (CC_CCRmode,
((GET_MODE (cc_reg) == CC_FPmode)
? FCR_FIRST
: ICR_FIRST)));
clobber = gen_rtx_CLOBBER (VOIDmode, cr_reg);
emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber)));
return TRUE;
}
rtx
frv_split_scc (dest, test, cc_reg, cr_reg, value)
rtx dest;
rtx test;
rtx cc_reg;
rtx cr_reg;
HOST_WIDE_INT value;
{
rtx ret;
start_sequence ();
emit_insn (gen_rtx_SET (VOIDmode,
cr_reg,
gen_rtx_fmt_ee (GET_CODE (test),
GET_MODE (cr_reg),
cc_reg,
const0_rtx)));
emit_move_insn (dest, GEN_INT (value));
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_EQ (GET_MODE (cr_reg),
cr_reg,
const0_rtx),
gen_rtx_SET (VOIDmode, dest, const0_rtx)));
ret = get_insns ();
end_sequence ();
return ret;
}
int
frv_emit_cond_move (dest, test_rtx, src1, src2)
rtx dest;
rtx test_rtx;
rtx src1;
rtx src2;
{
rtx set;
rtx clobber_cc;
rtx test2;
rtx cr_reg;
rtx if_rtx;
enum rtx_code test = GET_CODE (test_rtx);
rtx cc_reg = frv_emit_comparison (test, frv_compare_op0, frv_compare_op1);
enum machine_mode cc_mode = GET_MODE (cc_reg);
if (GET_CODE (src1) == CONST_INT && GET_CODE (src2) == CONST_INT)
{
HOST_WIDE_INT value1 = INTVAL (src1);
HOST_WIDE_INT value2 = INTVAL (src2);
if (value1 == 0 || value2 == 0)
;
else if (IN_RANGE_P (value1, -2048, 2047)
&& IN_RANGE_P (value2 - value1, -2048, 2047))
;
else
{
src1 = force_reg (GET_MODE (dest), src1);
src2 = force_reg (GET_MODE (dest), src2);
}
}
else
{
if (GET_CODE (src1) == CONST_INT && INTVAL (src1) != 0)
src1 = force_reg (GET_MODE (dest), src1);
if (GET_CODE (src2) == CONST_INT && INTVAL (src2) != 0)
src2 = force_reg (GET_MODE (dest), src2);
}
test2 = gen_rtx_fmt_ee (test, cc_mode, cc_reg, const0_rtx);
if_rtx = gen_rtx_IF_THEN_ELSE (GET_MODE (dest), test2, src1, src2);
set = gen_rtx_SET (VOIDmode, dest, if_rtx);
cr_reg = ((TARGET_ALLOC_CC)
? gen_reg_rtx (CC_CCRmode)
: gen_rtx_REG (CC_CCRmode,
(cc_mode == CC_FPmode) ? FCR_FIRST : ICR_FIRST));
clobber_cc = gen_rtx_CLOBBER (VOIDmode, cr_reg);
emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber_cc)));
return TRUE;
}
rtx
frv_split_cond_move (operands)
rtx operands[];
{
rtx dest = operands[0];
rtx test = operands[1];
rtx cc_reg = operands[2];
rtx src1 = operands[3];
rtx src2 = operands[4];
rtx cr_reg = operands[5];
rtx ret;
enum machine_mode cr_mode = GET_MODE (cr_reg);
start_sequence ();
emit_insn (gen_rtx_SET (VOIDmode,
cr_reg,
gen_rtx_fmt_ee (GET_CODE (test),
GET_MODE (cr_reg),
cc_reg,
const0_rtx)));
if (GET_CODE (src1) == CONST_INT && GET_CODE (src2) == CONST_INT)
{
HOST_WIDE_INT value1 = INTVAL (src1);
HOST_WIDE_INT value2 = INTVAL (src2);
if (value1 == 0)
{
emit_move_insn (dest, src2);
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_NE (cr_mode, cr_reg,
const0_rtx),
gen_rtx_SET (VOIDmode, dest, src1)));
}
else if (value2 == 0)
{
emit_move_insn (dest, src1);
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_EQ (cr_mode, cr_reg,
const0_rtx),
gen_rtx_SET (VOIDmode, dest, src2)));
}
else if (IN_RANGE_P (value1, -2048, 2047)
&& IN_RANGE_P (value2 - value1, -2048, 2047))
{
rtx dest_si = ((GET_MODE (dest) == SImode)
? dest
: gen_rtx_SUBREG (SImode, dest, 0));
emit_move_insn (dest_si, GEN_INT (value2 - value1));
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_NE (cr_mode, cr_reg,
const0_rtx),
gen_rtx_SET (VOIDmode, dest_si,
const0_rtx)));
emit_insn (gen_addsi3 (dest_si, dest_si, src1));
}
else
abort ();
}
else
{
if (! rtx_equal_p (dest, src1))
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_NE (cr_mode, cr_reg, const0_rtx),
gen_rtx_SET (VOIDmode, dest, src1)));
if (! rtx_equal_p (dest, src2))
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_EQ (cr_mode, cr_reg, const0_rtx),
gen_rtx_SET (VOIDmode, dest, src2)));
}
ret = get_insns ();
end_sequence ();
return ret;
}
void
frv_split_double_load (dest, source)
rtx dest;
rtx source;
{
int regno = REGNO (dest);
rtx dest1 = gen_highpart (SImode, dest);
rtx dest2 = gen_lowpart (SImode, dest);
rtx address = XEXP (source, 0);
if (GET_CODE (address) == PRE_MODIFY
|| ! refers_to_regno_p (regno, regno + 1, address, NULL))
{
emit_move_insn (dest1, change_address (source, SImode, NULL));
emit_move_insn (dest2, frv_index_memory (source, SImode, 1));
}
else
{
emit_move_insn (dest2, frv_index_memory (source, SImode, 1));
emit_move_insn (dest1, change_address (source, SImode, NULL));
}
}
void
frv_split_double_store (dest, source)
rtx dest;
rtx source;
{
rtx dest1 = change_address (dest, SImode, NULL);
rtx dest2 = frv_index_memory (dest, SImode, 1);
if (ZERO_P (source))
{
emit_move_insn (dest1, CONST0_RTX (SImode));
emit_move_insn (dest2, CONST0_RTX (SImode));
}
else
{
emit_move_insn (dest1, gen_highpart (SImode, source));
emit_move_insn (dest2, gen_lowpart (SImode, source));
}
}
rtx
frv_split_minmax (operands)
rtx operands[];
{
rtx dest = operands[0];
rtx minmax = operands[1];
rtx src1 = operands[2];
rtx src2 = operands[3];
rtx cc_reg = operands[4];
rtx cr_reg = operands[5];
rtx ret;
enum rtx_code test_code;
enum machine_mode cr_mode = GET_MODE (cr_reg);
start_sequence ();
switch (GET_CODE (minmax))
{
default:
abort ();
case SMIN: test_code = LT; break;
case SMAX: test_code = GT; break;
case UMIN: test_code = LTU; break;
case UMAX: test_code = GTU; break;
}
emit_insn (gen_rtx_SET (VOIDmode,
cc_reg,
gen_rtx_COMPARE (GET_MODE (cc_reg),
src1, src2)));
emit_insn (gen_rtx_SET (VOIDmode,
cr_reg,
gen_rtx_fmt_ee (test_code,
GET_MODE (cr_reg),
cc_reg,
const0_rtx)));
if (GET_CODE (src2) == CONST_INT && INTVAL (src2) != 0)
{
if (rtx_equal_p (dest, src1))
abort ();
emit_move_insn (dest, src2);
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_NE (cr_mode, cr_reg, const0_rtx),
gen_rtx_SET (VOIDmode, dest, src1)));
}
else
{
if (! rtx_equal_p (dest, src1))
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_NE (cr_mode, cr_reg, const0_rtx),
gen_rtx_SET (VOIDmode, dest, src1)));
if (! rtx_equal_p (dest, src2))
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_EQ (cr_mode, cr_reg, const0_rtx),
gen_rtx_SET (VOIDmode, dest, src2)));
}
ret = get_insns ();
end_sequence ();
return ret;
}
rtx
frv_split_abs (operands)
rtx operands[];
{
rtx dest = operands[0];
rtx src = operands[1];
rtx cc_reg = operands[2];
rtx cr_reg = operands[3];
rtx ret;
start_sequence ();
emit_insn (gen_rtx_SET (VOIDmode,
cc_reg,
gen_rtx_COMPARE (CCmode, src, const0_rtx)));
emit_insn (gen_rtx_SET (VOIDmode,
cr_reg,
gen_rtx_fmt_ee (LT, CC_CCRmode, cc_reg, const0_rtx)));
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_NE (CC_CCRmode, cr_reg, const0_rtx),
gen_negsi2 (dest, src)));
if (! rtx_equal_p (dest, src))
emit_insn (gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_EQ (CC_CCRmode, cr_reg, const0_rtx),
gen_rtx_SET (VOIDmode, dest, src)));
ret = get_insns ();
end_sequence ();
return ret;
}
static int
frv_clear_registers_used (ptr, data)
rtx *ptr;
void *data;
{
if (GET_CODE (*ptr) == REG)
{
int regno = REGNO (*ptr);
HARD_REG_SET *p_regs = (HARD_REG_SET *)data;
if (regno < FIRST_PSEUDO_REGISTER)
{
int reg_max = regno + HARD_REGNO_NREGS (regno, GET_MODE (*ptr));
while (regno < reg_max)
{
CLEAR_HARD_REG_BIT (*p_regs, regno);
regno++;
}
}
}
return 0;
}
void
frv_ifcvt_init_extra_fields (ce_info)
ce_if_block_t *ce_info ATTRIBUTE_UNUSED;
{
frv_ifcvt.added_insns_list = NULL_RTX;
frv_ifcvt.cur_scratch_regs = 0;
frv_ifcvt.num_nested_cond_exec = 0;
frv_ifcvt.cr_reg = NULL_RTX;
frv_ifcvt.nested_cc_reg = NULL_RTX;
frv_ifcvt.extra_int_cr = NULL_RTX;
frv_ifcvt.extra_fp_cr = NULL_RTX;
frv_ifcvt.last_nested_if_cr = NULL_RTX;
}
static void
frv_ifcvt_add_insn (pattern, insn, before_p)
rtx pattern;
rtx insn;
int before_p;
{
rtx link = alloc_EXPR_LIST (VOIDmode, pattern, insn);
link->jump = before_p;
frv_ifcvt.added_insns_list = alloc_EXPR_LIST (VOIDmode, link,
frv_ifcvt.added_insns_list);
if (TARGET_DEBUG_COND_EXEC)
{
fprintf (stderr,
"\n:::::::::: frv_ifcvt_add_insn: add the following %s insn %d:\n",
(before_p) ? "before" : "after",
(int)INSN_UID (insn));
debug_rtx (pattern);
}
}
void
frv_ifcvt_modify_tests (ce_info, p_true, p_false)
ce_if_block_t *ce_info;
rtx *p_true;
rtx *p_false;
{
basic_block test_bb = ce_info->test_bb;
basic_block then_bb = ce_info->then_bb;
basic_block else_bb = ce_info->else_bb;
basic_block join_bb = ce_info->join_bb;
rtx true_expr = *p_true;
rtx cr;
rtx cc;
rtx nested_cc;
enum machine_mode mode = GET_MODE (true_expr);
int j;
basic_block *bb;
int num_bb;
frv_tmp_reg_t *tmp_reg = &frv_ifcvt.tmp_reg;
rtx check_insn;
rtx sub_cond_exec_reg;
enum rtx_code code;
enum rtx_code code_true;
enum rtx_code code_false;
enum reg_class cc_class;
enum reg_class cr_class;
int cc_first;
int cc_last;
if (!reload_completed || TARGET_NO_COND_EXEC
|| (TARGET_NO_NESTED_CE && ce_info->pass > 1))
goto fail;
memset ((PTR) &tmp_reg->regs, 0, sizeof (tmp_reg->regs));
COPY_HARD_REG_SET (tmp_reg->regs, call_used_reg_set);
AND_COMPL_HARD_REG_SET (tmp_reg->regs, fixed_reg_set);
SET_HARD_REG_BIT (tmp_reg->regs, ICC_TEMP);
SET_HARD_REG_BIT (tmp_reg->regs, ICR_TEMP);
if (ce_info->pass > 1)
{
CLEAR_HARD_REG_SET (frv_ifcvt.nested_cc_ok_rewrite);
for (j = CC_FIRST; j <= CC_LAST; j++)
if (TEST_HARD_REG_BIT (tmp_reg->regs, j))
{
if (REGNO_REG_SET_P (then_bb->global_live_at_start, j))
continue;
if (else_bb && REGNO_REG_SET_P (else_bb->global_live_at_start, j))
continue;
if (join_bb && REGNO_REG_SET_P (join_bb->global_live_at_start, j))
continue;
SET_HARD_REG_BIT (frv_ifcvt.nested_cc_ok_rewrite, j);
}
}
for (j = 0; j < frv_ifcvt.cur_scratch_regs; j++)
frv_ifcvt.scratch_regs[j] = NULL_RTX;
frv_ifcvt.added_insns_list = NULL_RTX;
frv_ifcvt.cur_scratch_regs = 0;
bb = (basic_block *) alloca ((2 + ce_info->num_multiple_test_blocks)
* sizeof (basic_block));
if (join_bb)
{
int regno;
EXECUTE_IF_SET_IN_REG_SET (join_bb->global_live_at_start, 0, regno,
{
if (regno < FIRST_PSEUDO_REGISTER)
CLEAR_HARD_REG_BIT (tmp_reg->regs, regno);
});
}
num_bb = 0;
if (ce_info->num_multiple_test_blocks)
{
basic_block multiple_test_bb = ce_info->last_test_bb;
while (multiple_test_bb != test_bb)
{
bb[num_bb++] = multiple_test_bb;
multiple_test_bb = multiple_test_bb->pred->src;
}
}
bb[num_bb++] = then_bb;
if (else_bb)
bb[num_bb++] = else_bb;
sub_cond_exec_reg = NULL_RTX;
frv_ifcvt.num_nested_cond_exec = 0;
for (j = 0; j < num_bb; j++)
{
rtx last_insn = bb[j]->end;
rtx insn = bb[j]->head;
int regno;
if (rtl_dump_file)
fprintf (rtl_dump_file, "Scanning %s block %d, start %d, end %d\n",
(bb[j] == else_bb) ? "else" : ((bb[j] == then_bb) ? "then" : "test"),
(int) bb[j]->index,
(int) INSN_UID (bb[j]->head),
(int) INSN_UID (bb[j]->end));
EXECUTE_IF_SET_IN_REG_SET (bb[j]->global_live_at_start, 0, regno,
{
if (regno < FIRST_PSEUDO_REGISTER)
CLEAR_HARD_REG_BIT (tmp_reg->regs, regno);
});
for (;;)
{
if (INSN_P (insn))
{
rtx pattern;
rtx set;
int skip_nested_if = FALSE;
for_each_rtx (&PATTERN (insn), frv_clear_registers_used,
(void *)&tmp_reg->regs);
pattern = PATTERN (insn);
if (GET_CODE (pattern) == COND_EXEC)
{
rtx reg = XEXP (COND_EXEC_TEST (pattern), 0);
if (reg != sub_cond_exec_reg)
{
sub_cond_exec_reg = reg;
frv_ifcvt.num_nested_cond_exec++;
}
}
set = single_set_pattern (pattern);
if (set)
{
rtx dest = SET_DEST (set);
rtx src = SET_SRC (set);
if (GET_CODE (dest) == REG)
{
int regno = REGNO (dest);
enum rtx_code src_code = GET_CODE (src);
if (CC_P (regno) && src_code == COMPARE)
skip_nested_if = TRUE;
else if (CR_P (regno)
&& (src_code == IF_THEN_ELSE
|| GET_RTX_CLASS (src_code) == '<'))
skip_nested_if = TRUE;
}
}
if (! skip_nested_if)
for_each_rtx (&PATTERN (insn), frv_clear_registers_used,
(void *)&frv_ifcvt.nested_cc_ok_rewrite);
}
if (insn == last_insn)
break;
insn = NEXT_INSN (insn);
}
}
if (ce_info->pass > 1)
{
for (j = CC_FIRST; j <= CC_LAST; j++)
if (TEST_HARD_REG_BIT (frv_ifcvt.nested_cc_ok_rewrite, j))
SET_HARD_REG_BIT (tmp_reg->regs, j);
else
CLEAR_HARD_REG_BIT (tmp_reg->regs, j);
}
if (rtl_dump_file)
{
int num_gprs = 0;
fprintf (rtl_dump_file, "Available GPRs: ");
for (j = GPR_FIRST; j <= GPR_LAST; j++)
if (TEST_HARD_REG_BIT (tmp_reg->regs, j))
{
fprintf (rtl_dump_file, " %d [%s]", j, reg_names[j]);
if (++num_gprs > GPR_TEMP_NUM+2)
break;
}
fprintf (rtl_dump_file, "%s\nAvailable CRs: ",
(num_gprs > GPR_TEMP_NUM+2) ? " ..." : "");
for (j = CR_FIRST; j <= CR_LAST; j++)
if (TEST_HARD_REG_BIT (tmp_reg->regs, j))
fprintf (rtl_dump_file, " %d [%s]", j, reg_names[j]);
fputs ("\n", rtl_dump_file);
if (ce_info->pass > 1)
{
fprintf (rtl_dump_file, "Modifiable CCs: ");
for (j = CC_FIRST; j <= CC_LAST; j++)
if (TEST_HARD_REG_BIT (tmp_reg->regs, j))
fprintf (rtl_dump_file, " %d [%s]", j, reg_names[j]);
fprintf (rtl_dump_file, "\n%d nested COND_EXEC statements\n",
frv_ifcvt.num_nested_cond_exec);
}
}
if (mode == CCmode || mode == CC_UNSmode)
{
cr_class = ICR_REGS;
cc_class = ICC_REGS;
cc_first = ICC_FIRST;
cc_last = ICC_LAST;
}
else if (mode == CC_FPmode)
{
cr_class = FCR_REGS;
cc_class = FCC_REGS;
cc_first = FCC_FIRST;
cc_last = FCC_LAST;
}
else
{
cc_first = cc_last = 0;
cr_class = cc_class = NO_REGS;
}
cc = XEXP (true_expr, 0);
nested_cc = cr = NULL_RTX;
if (cc_class != NO_REGS)
{
int cc_regno;
for (cc_regno = cc_first; cc_regno <= cc_last; cc_regno++)
{
int cr_regno = cc_regno - CC_FIRST + CR_FIRST;
if (TEST_HARD_REG_BIT (frv_ifcvt.tmp_reg.regs, cc_regno)
&& TEST_HARD_REG_BIT (frv_ifcvt.tmp_reg.regs, cr_regno))
{
frv_ifcvt.tmp_reg.next_reg[ (int)cr_class ] = cr_regno;
cr = frv_alloc_temp_reg (tmp_reg, cr_class, CC_CCRmode, TRUE,
TRUE);
frv_ifcvt.tmp_reg.next_reg[ (int)cc_class ] = cc_regno;
nested_cc = frv_alloc_temp_reg (tmp_reg, cc_class, CCmode,
TRUE, TRUE);
break;
}
}
}
if (! cr)
{
if (rtl_dump_file)
fprintf (rtl_dump_file, "Could not allocate a CR temporary register\n");
goto fail;
}
if (rtl_dump_file)
fprintf (rtl_dump_file,
"Will use %s for conditional execution, %s for nested comparisons\n",
reg_names[ REGNO (cr)],
(nested_cc) ? reg_names[ REGNO (nested_cc) ] : "<none>");
code = GET_CODE (true_expr);
if (GET_MODE (cc) != CC_FPmode)
{
code = reverse_condition (code);
code_true = EQ;
code_false = NE;
}
else
{
code_true = NE;
code_false = EQ;
}
check_insn = gen_rtx_SET (VOIDmode, cr,
gen_rtx_fmt_ee (code, CC_CCRmode, cc, const0_rtx));
frv_ifcvt_add_insn (check_insn, test_bb->end, TRUE);
frv_ifcvt.cr_reg = cr;
frv_ifcvt.nested_cc_reg = nested_cc;
*p_true = gen_rtx_fmt_ee (code_true, CC_CCRmode, cr, const0_rtx);
*p_false = gen_rtx_fmt_ee (code_false, CC_CCRmode, cr, const0_rtx);
return;
fail:
*p_true = NULL_RTX;
*p_false = NULL_RTX;
if (rtl_dump_file)
fprintf (rtl_dump_file, "Disabling this conditional execution.\n");
return;
}
void
frv_ifcvt_modify_multiple_tests (ce_info, bb, p_true, p_false)
ce_if_block_t *ce_info;
basic_block bb;
rtx *p_true;
rtx *p_false;
{
rtx old_true = XEXP (*p_true, 0);
rtx old_false = XEXP (*p_false, 0);
rtx true_expr = XEXP (*p_true, 1);
rtx false_expr = XEXP (*p_false, 1);
rtx test_expr;
rtx old_test;
rtx cr = XEXP (old_true, 0);
rtx check_insn;
rtx new_cr = NULL_RTX;
rtx *p_new_cr = (rtx *)0;
rtx if_else;
rtx compare;
rtx cc;
enum reg_class cr_class;
enum machine_mode mode = GET_MODE (true_expr);
rtx (*logical_func)(rtx, rtx, rtx);
if (TARGET_DEBUG_COND_EXEC)
{
fprintf (stderr,
"\n:::::::::: frv_ifcvt_modify_multiple_tests, before modification for %s\ntrue insn:\n",
ce_info->and_and_p ? "&&" : "||");
debug_rtx (*p_true);
fputs ("\nfalse insn:\n", stderr);
debug_rtx (*p_false);
}
if (TARGET_NO_MULTI_CE)
goto fail;
if (GET_CODE (cr) != REG)
goto fail;
if (mode == CCmode || mode == CC_UNSmode)
{
cr_class = ICR_REGS;
p_new_cr = &frv_ifcvt.extra_int_cr;
}
else if (mode == CC_FPmode)
{
cr_class = FCR_REGS;
p_new_cr = &frv_ifcvt.extra_fp_cr;
}
else
goto fail;
new_cr = *p_new_cr;
if (! new_cr)
{
new_cr = *p_new_cr = frv_alloc_temp_reg (&frv_ifcvt.tmp_reg, cr_class,
CC_CCRmode, TRUE, TRUE);
if (! new_cr)
goto fail;
}
if (ce_info->and_and_p)
{
old_test = old_false;
test_expr = true_expr;
logical_func = (GET_CODE (old_true) == EQ) ? gen_andcr : gen_andncr;
*p_true = gen_rtx_NE (CC_CCRmode, cr, const0_rtx);
*p_false = gen_rtx_EQ (CC_CCRmode, cr, const0_rtx);
}
else
{
old_test = old_false;
test_expr = false_expr;
logical_func = (GET_CODE (old_false) == EQ) ? gen_orcr : gen_orncr;
*p_true = gen_rtx_EQ (CC_CCRmode, cr, const0_rtx);
*p_false = gen_rtx_NE (CC_CCRmode, cr, const0_rtx);
}
frv_ifcvt_add_insn ((*logical_func) (cr, cr, new_cr), bb->end, TRUE);
cc = XEXP (test_expr, 0);
compare = gen_rtx_fmt_ee (GET_CODE (test_expr), CC_CCRmode, cc, const0_rtx);
if_else = gen_rtx_IF_THEN_ELSE (CC_CCRmode, old_test, compare, const0_rtx);
check_insn = gen_rtx_SET (VOIDmode, new_cr, if_else);
frv_ifcvt_add_insn (check_insn, bb->end, TRUE);
if (TARGET_DEBUG_COND_EXEC)
{
fputs ("\n:::::::::: frv_ifcvt_modify_multiple_tests, after modification\ntrue insn:\n",
stderr);
debug_rtx (*p_true);
fputs ("\nfalse insn:\n", stderr);
debug_rtx (*p_false);
}
return;
fail:
*p_true = *p_false = NULL_RTX;
if (new_cr)
{
CLEAR_HARD_REG_BIT (frv_ifcvt.tmp_reg.regs, REGNO (new_cr));
*p_new_cr = NULL_RTX;
}
if (TARGET_DEBUG_COND_EXEC)
fputs ("\n:::::::::: frv_ifcvt_modify_multiple_tests, failed.\n", stderr);
return;
}
static rtx
frv_ifcvt_load_value (value, insn)
rtx value;
rtx insn ATTRIBUTE_UNUSED;
{
int num_alloc = frv_ifcvt.cur_scratch_regs;
int i;
rtx reg;
if (value == const0_rtx)
return gen_rtx_REG (SImode, GPR_FIRST);
if (CONSTANT_P (value)
|| (GET_CODE (value) == REG && REGNO (value) == LR_REGNO))
{
for (i = 0; i < num_alloc; i++)
{
if (rtx_equal_p (SET_SRC (frv_ifcvt.scratch_regs[i]), value))
return SET_DEST (frv_ifcvt.scratch_regs[i]);
}
}
if (num_alloc >= GPR_TEMP_NUM)
{
if (rtl_dump_file)
fprintf (rtl_dump_file, "Too many temporary registers allocated\n");
return NULL_RTX;
}
reg = frv_alloc_temp_reg (&frv_ifcvt.tmp_reg, GPR_REGS, SImode, TRUE, TRUE);
if (! reg)
{
if (rtl_dump_file)
fputs ("Could not find a scratch register\n", rtl_dump_file);
return NULL_RTX;
}
frv_ifcvt.cur_scratch_regs++;
frv_ifcvt.scratch_regs[num_alloc] = gen_rtx_SET (VOIDmode, reg, value);
if (rtl_dump_file)
{
if (GET_CODE (value) == CONST_INT)
fprintf (rtl_dump_file, "Register %s will hold %ld\n",
reg_names[ REGNO (reg)], (long)INTVAL (value));
else if (GET_CODE (value) == REG && REGNO (value) == LR_REGNO)
fprintf (rtl_dump_file, "Register %s will hold LR\n",
reg_names[ REGNO (reg)]);
else
fprintf (rtl_dump_file, "Register %s will hold a saved value\n",
reg_names[ REGNO (reg)]);
}
return reg;
}
static rtx
frv_ifcvt_rewrite_mem (mem, mode, insn)
rtx mem;
enum machine_mode mode;
rtx insn;
{
rtx addr = XEXP (mem, 0);
if (!frv_legitimate_address_p (mode, addr, reload_completed, TRUE))
{
if (GET_CODE (addr) == PLUS)
{
rtx addr_op0 = XEXP (addr, 0);
rtx addr_op1 = XEXP (addr, 1);
if (plus_small_data_p (addr_op0, addr_op1))
addr = frv_ifcvt_load_value (addr, insn);
else if (GET_CODE (addr_op0) == REG && CONSTANT_P (addr_op1))
{
rtx reg = frv_ifcvt_load_value (addr_op1, insn);
if (!reg)
return NULL_RTX;
addr = gen_rtx_PLUS (Pmode, addr_op0, reg);
}
else
return NULL_RTX;
}
else if (CONSTANT_P (addr))
addr = frv_ifcvt_load_value (addr, insn);
else
return NULL_RTX;
if (addr == NULL_RTX)
return NULL_RTX;
else if (XEXP (mem, 0) != addr)
return change_address (mem, mode, addr);
}
return mem;
}
static rtx
single_set_pattern (pattern)
rtx pattern;
{
rtx set;
int i;
if (GET_CODE (pattern) == COND_EXEC)
pattern = COND_EXEC_CODE (pattern);
if (GET_CODE (pattern) == SET)
return pattern;
else if (GET_CODE (pattern) == PARALLEL)
{
for (i = 0, set = 0; i < XVECLEN (pattern, 0); i++)
{
rtx sub = XVECEXP (pattern, 0, i);
switch (GET_CODE (sub))
{
case USE:
case CLOBBER:
break;
case SET:
if (set)
return 0;
else
set = sub;
break;
default:
return 0;
}
}
return set;
}
return 0;
}
rtx
frv_ifcvt_modify_insn (ce_info, pattern, insn)
ce_if_block_t *ce_info ATTRIBUTE_UNUSED;
rtx pattern;
rtx insn;
{
rtx orig_ce_pattern = pattern;
rtx set;
rtx op0;
rtx op1;
rtx test;
if (GET_CODE (pattern) != COND_EXEC)
abort ();
test = COND_EXEC_TEST (pattern);
if (GET_CODE (test) == AND)
{
rtx cr = frv_ifcvt.cr_reg;
rtx test_reg;
op0 = XEXP (test, 0);
if (! rtx_equal_p (cr, XEXP (op0, 0)))
goto fail;
op1 = XEXP (test, 1);
test_reg = XEXP (op1, 0);
if (GET_CODE (test_reg) != REG)
goto fail;
if (! frv_ifcvt.last_nested_if_cr)
{
rtx and_op;
frv_ifcvt.last_nested_if_cr = test_reg;
if (GET_CODE (op0) == NE)
and_op = gen_andcr (test_reg, cr, test_reg);
else
and_op = gen_andncr (test_reg, cr, test_reg);
frv_ifcvt_add_insn (and_op, insn, TRUE);
}
else if (! rtx_equal_p (test_reg, frv_ifcvt.last_nested_if_cr))
goto fail;
COND_EXEC_TEST (pattern) = test = op1;
}
else
{
frv_ifcvt.last_nested_if_cr = NULL_RTX;
}
set = single_set_pattern (pattern);
if (set)
{
rtx dest = SET_DEST (set);
rtx src = SET_SRC (set);
enum machine_mode mode = GET_MODE (dest);
if (mode == SImode
&& (GET_RTX_CLASS (GET_CODE (src)) == '2'
|| GET_RTX_CLASS (GET_CODE (src)) == 'c'))
{
op0 = XEXP (src, 0);
op1 = XEXP (src, 1);
if (GET_CODE (src) == PLUS && plus_small_data_p (op0, op1))
{
src = frv_ifcvt_load_value (src, insn);
if (src)
COND_EXEC_CODE (pattern) = gen_rtx_SET (VOIDmode, dest, src);
else
goto fail;
}
else if (integer_register_operand (op0, SImode) && CONSTANT_P (op1))
{
op1 = frv_ifcvt_load_value (op1, insn);
if (op1)
COND_EXEC_CODE (pattern)
= gen_rtx_SET (VOIDmode, dest, gen_rtx_fmt_ee (GET_CODE (src),
GET_MODE (src),
op0, op1));
else
goto fail;
}
}
else if (mode == DImode && GET_CODE (src) == MULT)
{
op0 = XEXP (src, 0);
op1 = XEXP (src, 1);
if (GET_CODE (op0) == SIGN_EXTEND && GET_CODE (op1) == CONST_INT)
{
op1 = frv_ifcvt_load_value (op1, insn);
if (op1)
{
op1 = gen_rtx_SIGN_EXTEND (DImode, op1);
COND_EXEC_CODE (pattern)
= gen_rtx_SET (VOIDmode, dest,
gen_rtx_MULT (DImode, op0, op1));
}
else
goto fail;
}
frv_ifcvt_add_insn (gen_rtx_USE (VOIDmode, dest), insn, FALSE);
}
else if (frv_ifcvt.scratch_insns_bitmap
&& bitmap_bit_p (frv_ifcvt.scratch_insns_bitmap,
INSN_UID (insn)))
pattern = set;
else if (mode == QImode || mode == HImode || mode == SImode
|| mode == SFmode)
{
int changed_p = FALSE;
if (CONSTANT_P (src) && integer_register_operand (dest, mode))
{
src = frv_ifcvt_load_value (src, insn);
if (!src)
goto fail;
changed_p = TRUE;
}
if (GET_CODE (dest) == MEM)
{
rtx new_mem = frv_ifcvt_rewrite_mem (dest, mode, insn);
if (!new_mem)
goto fail;
else if (new_mem != dest)
{
changed_p = TRUE;
dest = new_mem;
}
}
if (GET_CODE (src) == MEM)
{
rtx new_mem = frv_ifcvt_rewrite_mem (src, mode, insn);
if (!new_mem)
goto fail;
else if (new_mem != src)
{
changed_p = TRUE;
src = new_mem;
}
}
if (changed_p)
COND_EXEC_CODE (pattern) = gen_rtx_SET (VOIDmode, dest, src);
}
else if (mode == CC_CCRmode && GET_RTX_CLASS (GET_CODE (src)) == '<')
{
int regno = REGNO (XEXP (src, 0));
rtx if_else;
if (ce_info->pass > 1
&& regno != (int)REGNO (frv_ifcvt.nested_cc_reg)
&& TEST_HARD_REG_BIT (frv_ifcvt.nested_cc_ok_rewrite, regno))
{
src = gen_rtx_fmt_ee (GET_CODE (src),
CC_CCRmode,
frv_ifcvt.nested_cc_reg,
XEXP (src, 1));
}
if_else = gen_rtx_IF_THEN_ELSE (CC_CCRmode, test, src, const0_rtx);
pattern = gen_rtx_SET (VOIDmode, dest, if_else);
}
else if (ce_info->pass > 1
&& GET_CODE (dest) == REG
&& CC_P (REGNO (dest))
&& REGNO (dest) != REGNO (frv_ifcvt.nested_cc_reg)
&& TEST_HARD_REG_BIT (frv_ifcvt.nested_cc_ok_rewrite,
REGNO (dest))
&& GET_CODE (src) == COMPARE)
{
PUT_MODE (frv_ifcvt.nested_cc_reg, GET_MODE (dest));
COND_EXEC_CODE (pattern)
= gen_rtx_SET (VOIDmode, frv_ifcvt.nested_cc_reg, copy_rtx (src));
}
}
if (TARGET_DEBUG_COND_EXEC)
{
rtx orig_pattern = PATTERN (insn);
PATTERN (insn) = pattern;
fprintf (stderr,
"\n:::::::::: frv_ifcvt_modify_insn: pass = %d, insn after modification:\n",
ce_info->pass);
debug_rtx (insn);
PATTERN (insn) = orig_pattern;
}
return pattern;
fail:
if (TARGET_DEBUG_COND_EXEC)
{
rtx orig_pattern = PATTERN (insn);
PATTERN (insn) = orig_ce_pattern;
fprintf (stderr,
"\n:::::::::: frv_ifcvt_modify_insn: pass = %d, insn could not be modified:\n",
ce_info->pass);
debug_rtx (insn);
PATTERN (insn) = orig_pattern;
}
return NULL_RTX;
}
void
frv_ifcvt_modify_final (ce_info)
ce_if_block_t *ce_info ATTRIBUTE_UNUSED;
{
rtx existing_insn;
rtx check_insn;
rtx p = frv_ifcvt.added_insns_list;
int i;
if (! p)
abort ();
do
{
rtx check_and_insert_insns = XEXP (p, 0);
rtx old_p = p;
check_insn = XEXP (check_and_insert_insns, 0);
existing_insn = XEXP (check_and_insert_insns, 1);
p = XEXP (p, 1);
if (check_and_insert_insns->jump)
{
emit_insn_before (check_insn, existing_insn);
check_and_insert_insns->jump = 0;
}
else
emit_insn_after (check_insn, existing_insn);
free_EXPR_LIST_node (check_and_insert_insns);
free_EXPR_LIST_node (old_p);
}
while (p != NULL_RTX);
for (i = 0; i < frv_ifcvt.cur_scratch_regs; i++)
{
rtx insn = emit_insn_before (frv_ifcvt.scratch_regs[i], existing_insn);
if (! frv_ifcvt.scratch_insns_bitmap)
frv_ifcvt.scratch_insns_bitmap = BITMAP_XMALLOC ();
bitmap_set_bit (frv_ifcvt.scratch_insns_bitmap, INSN_UID (insn));
frv_ifcvt.scratch_regs[i] = NULL_RTX;
}
frv_ifcvt.added_insns_list = NULL_RTX;
frv_ifcvt.cur_scratch_regs = 0;
}
void
frv_ifcvt_modify_cancel (ce_info)
ce_if_block_t *ce_info ATTRIBUTE_UNUSED;
{
int i;
rtx p = frv_ifcvt.added_insns_list;
while (p != NULL_RTX)
{
rtx check_and_jump = XEXP (p, 0);
rtx old_p = p;
p = XEXP (p, 1);
free_EXPR_LIST_node (check_and_jump);
free_EXPR_LIST_node (old_p);
}
for (i = 0; i < frv_ifcvt.cur_scratch_regs; i++)
frv_ifcvt.scratch_regs[i] = NULL_RTX;
frv_ifcvt.added_insns_list = NULL_RTX;
frv_ifcvt.cur_scratch_regs = 0;
return;
}
int
frv_trampoline_size ()
{
return 5 * 4 ;
}
void
frv_initialize_trampoline (addr, fnaddr, static_chain)
rtx addr;
rtx fnaddr;
rtx static_chain;
{
rtx sc_reg = force_reg (Pmode, static_chain);
emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"),
FALSE, VOIDmode, 4,
addr, Pmode,
GEN_INT (frv_trampoline_size ()), SImode,
fnaddr, Pmode,
sc_reg, Pmode);
}
enum reg_class
frv_secondary_reload_class (class, mode, x, in_p)
enum reg_class class;
enum machine_mode mode ATTRIBUTE_UNUSED;
rtx x;
int in_p ATTRIBUTE_UNUSED;
{
enum reg_class ret;
switch (class)
{
default:
ret = NO_REGS;
break;
case QUAD_REGS:
case EVEN_REGS:
case GPR_REGS:
ret = NO_REGS;
if (x && GET_CODE (x) == REG)
{
int regno = REGNO (x);
if (ACC_P (regno) || ACCG_P (regno))
ret = FPR_REGS;
}
break;
case QUAD_FPR_REGS:
case FEVEN_REGS:
case FPR_REGS:
if (x && CONSTANT_P (x) && !ZERO_P (x))
ret = GPR_REGS;
else
ret = NO_REGS;
break;
case ICC_REGS:
case FCC_REGS:
case CC_REGS:
case ICR_REGS:
case FCR_REGS:
case CR_REGS:
case LCR_REG:
case LR_REG:
ret = GPR_REGS;
break;
case ACC_REGS:
case EVEN_ACC_REGS:
case QUAD_ACC_REGS:
case ACCG_REGS:
ret = FPR_REGS;
break;
}
return ret;
}
int
frv_class_likely_spilled_p (class)
enum reg_class class;
{
switch (class)
{
default:
break;
case ICC_REGS:
case FCC_REGS:
case CC_REGS:
case ICR_REGS:
case FCR_REGS:
case CR_REGS:
case LCR_REG:
case LR_REG:
case SPR_REGS:
case QUAD_ACC_REGS:
case EVEN_ACC_REGS:
case ACC_REGS:
case ACCG_REGS:
return TRUE;
}
return FALSE;
}
int
frv_adjust_field_align (field, computed)
tree field;
int computed;
{
if (DECL_BIT_FIELD (field) && DECL_CONTEXT (field))
{
tree parent = DECL_CONTEXT (field);
tree prev = NULL_TREE;
tree cur;
for (cur = TYPE_FIELDS (parent); cur && cur != field; cur = TREE_CHAIN (cur))
{
if (TREE_CODE (cur) != FIELD_DECL)
continue;
prev = cur;
}
if (!cur)
abort ();
if (prev
&& ! DECL_PACKED (field)
&& ! integer_zerop (DECL_SIZE (field))
&& DECL_BIT_FIELD_TYPE (field) != DECL_BIT_FIELD_TYPE (prev))
{
int prev_align = TYPE_ALIGN (TREE_TYPE (prev));
int cur_align = TYPE_ALIGN (TREE_TYPE (field));
computed = (prev_align > cur_align) ? prev_align : cur_align;
}
}
return computed;
}
int
frv_hard_regno_mode_ok (regno, mode)
int regno;
enum machine_mode mode;
{
int base;
int mask;
switch (mode)
{
case CCmode:
case CC_UNSmode:
return ICC_P (regno) || GPR_P (regno);
case CC_CCRmode:
return CR_P (regno) || GPR_P (regno);
case CC_FPmode:
return FCC_P (regno) || GPR_P (regno);
default:
break;
}
if (INTEGRAL_MODE_P (mode) || FLOAT_MODE_P (mode) || VECTOR_MODE_P (mode))
{
if (ACCG_P (regno))
{
base = ACCG_FIRST;
mask = GET_MODE_SIZE (mode) - 1;
}
else
{
if (GPR_P (regno))
base = GPR_FIRST;
else if (FPR_P (regno))
base = FPR_FIRST;
else if (ACC_P (regno))
base = ACC_FIRST;
else
return 0;
if (GET_MODE_SIZE (mode) < 4)
return 1;
mask = (GET_MODE_SIZE (mode) / 4) - 1;
}
return (((regno - base) & mask) == 0);
}
return 0;
}
int
frv_hard_regno_nregs (regno, mode)
int regno;
enum machine_mode mode;
{
if (ACCG_P (regno))
return GET_MODE_SIZE (mode);
else
return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
}
int
frv_class_max_nregs (class, mode)
enum reg_class class;
enum machine_mode mode;
{
if (class == ACCG_REGS)
return GET_MODE_SIZE (mode);
else
return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
}
int
frv_legitimate_constant_p (x)
rtx x;
{
enum machine_mode mode = GET_MODE (x);
if (GET_CODE (x) != CONST_DOUBLE)
return TRUE;
if (mode == VOIDmode || mode == DImode)
return TRUE;
if (x == CONST0_RTX (mode))
return TRUE;
if (!TARGET_HAS_FPRS)
return TRUE;
if (mode == DFmode && !TARGET_DOUBLE)
return TRUE;
return FALSE;
}
#define HIGH_COST 40
#define MEDIUM_COST 3
#define LOW_COST 1
int
frv_register_move_cost (from, to)
enum reg_class from;
enum reg_class to;
{
switch (from)
{
default:
break;
case QUAD_REGS:
case EVEN_REGS:
case GPR_REGS:
switch (to)
{
default:
break;
case QUAD_REGS:
case EVEN_REGS:
case GPR_REGS:
return LOW_COST;
case FEVEN_REGS:
case FPR_REGS:
return LOW_COST;
case LCR_REG:
case LR_REG:
case SPR_REGS:
return LOW_COST;
}
case FEVEN_REGS:
case FPR_REGS:
switch (to)
{
default:
break;
case QUAD_REGS:
case EVEN_REGS:
case GPR_REGS:
case ACC_REGS:
case EVEN_ACC_REGS:
case QUAD_ACC_REGS:
case ACCG_REGS:
return MEDIUM_COST;
case FEVEN_REGS:
case FPR_REGS:
return LOW_COST;
}
case LCR_REG:
case LR_REG:
case SPR_REGS:
switch (to)
{
default:
break;
case QUAD_REGS:
case EVEN_REGS:
case GPR_REGS:
return MEDIUM_COST;
}
case ACC_REGS:
case EVEN_ACC_REGS:
case QUAD_ACC_REGS:
case ACCG_REGS:
switch (to)
{
default:
break;
case FEVEN_REGS:
case FPR_REGS:
return MEDIUM_COST;
}
}
return HIGH_COST;
}
static bool
frv_assemble_integer (value, size, aligned_p)
rtx value;
unsigned int size;
int aligned_p;
{
if (flag_pic && size == UNITS_PER_WORD)
{
if (GET_CODE (value) == CONST
|| GET_CODE (value) == SYMBOL_REF
|| GET_CODE (value) == LABEL_REF)
{
if (aligned_p)
{
static int label_num = 0;
char buf[256];
const char *p;
ASM_GENERATE_INTERNAL_LABEL (buf, "LCP", label_num++);
p = (* targetm.strip_name_encoding) (buf);
fprintf (asm_out_file, "%s:\n", p);
fprintf (asm_out_file, "%s\n", FIXUP_SECTION_ASM_OP);
fprintf (asm_out_file, "\t.picptr\t%s\n", p);
fprintf (asm_out_file, "\t.previous\n");
}
assemble_integer_with_op ("\t.picptr\t", value);
return true;
}
if (!aligned_p)
{
assemble_integer_with_op ("\t.4byte\t", value);
return true;
}
}
return default_assemble_integer (value, size, aligned_p);
}
static struct machine_function *
frv_init_machine_status ()
{
return ggc_alloc_cleared (sizeof (struct machine_function));
}
static void
frv_registers_update (x, reg_state, modified, p_num_mod, flag)
rtx x;
unsigned char reg_state[];
int modified[];
int *p_num_mod;
int flag;
{
int regno, reg_max;
rtx reg;
rtx cond;
const char *format;
int length;
int j;
switch (GET_CODE (x))
{
default:
break;
case CLOBBER:
frv_registers_update (XEXP (x, 0), reg_state, modified, p_num_mod,
flag | REGSTATE_MODIFIED);
return;
case PRE_MODIFY:
case SET:
frv_registers_update (XEXP (x, 0), reg_state, modified, p_num_mod,
flag | REGSTATE_MODIFIED | REGSTATE_LIVE);
frv_registers_update (XEXP (x, 1), reg_state, modified, p_num_mod, flag);
return;
case COND_EXEC:
cond = XEXP (x, 0);
if ((GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
&& GET_CODE (XEXP (cond, 0)) == REG
&& CR_P (REGNO (XEXP (cond, 0)))
&& GET_CODE (XEXP (cond, 1)) == CONST_INT
&& INTVAL (XEXP (cond, 1)) == 0
&& (flag & (REGSTATE_MODIFIED | REGSTATE_IF_EITHER)) == 0)
{
frv_registers_update (cond, reg_state, modified, p_num_mod, flag);
flag |= ((REGNO (XEXP (cond, 0)) - CR_FIRST)
| ((GET_CODE (cond) == NE)
? REGSTATE_IF_TRUE
: REGSTATE_IF_FALSE));
frv_registers_update (XEXP (x, 1), reg_state, modified, p_num_mod,
flag);
return;
}
else
fatal_insn ("frv_registers_update", x);
case MEM:
flag &= ~REGSTATE_MODIFIED;
break;
case SUBREG:
reg = SUBREG_REG (x);
if (GET_CODE (reg) == REG)
{
regno = subreg_regno (x);
reg_max = REGNO (reg) + HARD_REGNO_NREGS (regno, GET_MODE (reg));
goto reg_common;
}
break;
case REG:
regno = REGNO (x);
reg_max = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
reg_common:
if (flag & REGSTATE_MODIFIED)
{
flag &= REGSTATE_MASK;
while (regno < reg_max)
{
int rs = reg_state[regno];
if (flag != rs)
{
if ((rs & REGSTATE_MODIFIED) == 0)
{
modified[ *p_num_mod ] = regno;
(*p_num_mod)++;
}
else
flag &= ~(REGSTATE_IF_EITHER | REGSTATE_CC_MASK);
reg_state[regno] = (rs | flag);
}
regno++;
}
}
return;
}
length = GET_RTX_LENGTH (GET_CODE (x));
format = GET_RTX_FORMAT (GET_CODE (x));
for (j = 0; j < length; ++j)
{
switch (format[j])
{
case 'e':
frv_registers_update (XEXP (x, j), reg_state, modified, p_num_mod,
flag);
break;
case 'V':
case 'E':
if (XVEC (x, j) != 0)
{
int k;
for (k = 0; k < XVECLEN (x, j); ++k)
frv_registers_update (XVECEXP (x, j, k), reg_state, modified,
p_num_mod, flag);
}
break;
default:
break;
}
}
return;
}
static int
frv_registers_used_p (x, reg_state, flag)
rtx x;
unsigned char reg_state[];
int flag;
{
int regno, reg_max;
rtx reg;
rtx cond;
rtx dest;
const char *format;
int result;
int length;
int j;
switch (GET_CODE (x))
{
default:
break;
case CLOBBER:
return FALSE;
case SET:
dest = SET_DEST (x);
if (flag & REGSTATE_CONDJUMP
&& GET_CODE (dest) == REG && CR_P (REGNO (dest))
&& (reg_state[ REGNO (dest) ] & REGSTATE_LIVE) != 0)
return TRUE;
if (GET_CODE (dest) == MEM)
{
result = frv_registers_used_p (XEXP (dest, 0), reg_state, flag);
if (result)
return result;
}
return frv_registers_used_p (SET_SRC (x), reg_state, flag);
case COND_EXEC:
cond = XEXP (x, 0);
if ((GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
&& GET_CODE (XEXP (cond, 0)) == REG
&& CR_P (REGNO (XEXP (cond, 0)))
&& GET_CODE (XEXP (cond, 1)) == CONST_INT
&& INTVAL (XEXP (cond, 1)) == 0
&& (flag & (REGSTATE_MODIFIED | REGSTATE_IF_EITHER)) == 0)
{
result = frv_registers_used_p (cond, reg_state, flag);
if (result)
return result;
flag |= ((REGNO (XEXP (cond, 0)) - CR_FIRST)
| ((GET_CODE (cond) == NE)
? REGSTATE_IF_TRUE
: REGSTATE_IF_FALSE));
return frv_registers_used_p (XEXP (x, 1), reg_state, flag);
}
else
fatal_insn ("frv_registers_used_p", x);
case SUBREG:
reg = SUBREG_REG (x);
if (GET_CODE (reg) == REG)
{
regno = subreg_regno (x);
reg_max = REGNO (reg) + HARD_REGNO_NREGS (regno, GET_MODE (reg));
goto reg_common;
}
break;
case REG:
regno = REGNO (x);
reg_max = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
reg_common:
while (regno < reg_max)
{
int rs = reg_state[regno];
if (rs & REGSTATE_MODIFIED)
{
int rs_if = rs & REGSTATE_IF_EITHER;
int flag_if = flag & REGSTATE_IF_EITHER;
if ((rs & REGSTATE_IF_EITHER) == 0)
return TRUE;
if (((rs_if == REGSTATE_IF_TRUE && flag_if == REGSTATE_IF_FALSE)
|| (rs_if == REGSTATE_IF_FALSE && flag_if == REGSTATE_IF_TRUE))
&& ((rs & REGSTATE_CC_MASK) == (flag & REGSTATE_CC_MASK)))
;
else
return TRUE;
}
regno++;
}
return FALSE;
}
length = GET_RTX_LENGTH (GET_CODE (x));
format = GET_RTX_FORMAT (GET_CODE (x));
for (j = 0; j < length; ++j)
{
switch (format[j])
{
case 'e':
result = frv_registers_used_p (XEXP (x, j), reg_state, flag);
if (result != 0)
return result;
break;
case 'V':
case 'E':
if (XVEC (x, j) != 0)
{
int k;
for (k = 0; k < XVECLEN (x, j); ++k)
{
result = frv_registers_used_p (XVECEXP (x, j, k), reg_state,
flag);
if (result != 0)
return result;
}
}
break;
default:
break;
}
}
return 0;
}
static int
frv_registers_set_p (x, reg_state, modify_p)
rtx x;
unsigned char reg_state[];
int modify_p;
{
int regno, reg_max;
rtx reg;
rtx cond;
const char *format;
int length;
int j;
switch (GET_CODE (x))
{
default:
break;
case CLOBBER:
return frv_registers_set_p (XEXP (x, 0), reg_state, TRUE);
case PRE_MODIFY:
case SET:
return (frv_registers_set_p (XEXP (x, 0), reg_state, TRUE)
|| frv_registers_set_p (XEXP (x, 1), reg_state, FALSE));
case COND_EXEC:
cond = XEXP (x, 0);
if ((GET_CODE (cond) == EQ || GET_CODE (cond) == NE)
&& GET_CODE (XEXP (cond, 0)) == REG
&& CR_P (REGNO (XEXP (cond, 0)))
&& GET_CODE (XEXP (cond, 1)) == CONST_INT
&& INTVAL (XEXP (cond, 1)) == 0
&& !modify_p)
return frv_registers_set_p (XEXP (x, 1), reg_state, modify_p);
else
fatal_insn ("frv_registers_set_p", x);
case MEM:
modify_p = FALSE;
break;
case SUBREG:
reg = SUBREG_REG (x);
if (GET_CODE (reg) == REG)
{
regno = subreg_regno (x);
reg_max = REGNO (reg) + HARD_REGNO_NREGS (regno, GET_MODE (reg));
goto reg_common;
}
break;
case REG:
regno = REGNO (x);
reg_max = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
reg_common:
if (modify_p)
while (regno < reg_max)
{
int rs = reg_state[regno];
if (rs & REGSTATE_MODIFIED)
return TRUE;
regno++;
}
return FALSE;
}
length = GET_RTX_LENGTH (GET_CODE (x));
format = GET_RTX_FORMAT (GET_CODE (x));
for (j = 0; j < length; ++j)
{
switch (format[j])
{
case 'e':
if (frv_registers_set_p (XEXP (x, j), reg_state, modify_p))
return TRUE;
break;
case 'V':
case 'E':
if (XVEC (x, j) != 0)
{
int k;
for (k = 0; k < XVECLEN (x, j); ++k)
if (frv_registers_set_p (XVECEXP (x, j, k), reg_state,
modify_p))
return TRUE;
}
break;
default:
break;
}
}
return FALSE;
}
static void
frv_pack_insns ()
{
state_t frv_state;
int cur_start_vliw_p;
int next_start_vliw_p;
int cur_condjump_p;
int next_condjump_p;
rtx insn;
rtx link;
int j;
int num_mod = 0;
int modified[FIRST_PSEUDO_REGISTER];
unsigned char reg_state[FIRST_PSEUDO_REGISTER];
if (!optimize || !flag_schedule_insns_after_reload || TARGET_NO_VLIW_BRANCH)
return;
switch (frv_cpu_type)
{
default:
case FRV_CPU_FR300:
case FRV_CPU_SIMPLE:
return;
case FRV_CPU_GENERIC:
case FRV_CPU_FR400:
case FRV_CPU_FR500:
case FRV_CPU_TOMCAT:
break;
}
dfa_start ();
frv_state = (state_t) xmalloc (state_size ());
memset ((PTR) reg_state, REGSTATE_DEAD, sizeof (reg_state));
state_reset (frv_state);
cur_start_vliw_p = FALSE;
next_start_vliw_p = TRUE;
cur_condjump_p = 0;
next_condjump_p = 0;
for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
{
enum rtx_code code = GET_CODE (insn);
enum rtx_code pattern_code;
if (code == NOTE)
{
if (NOTE_LINE_NUMBER (insn) == (int)NOTE_INSN_BASIC_BLOCK)
{
regset live;
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
reg_state[j] &= ~ REGSTATE_LIVE;
live = NOTE_BASIC_BLOCK (insn)->global_live_at_start;
EXECUTE_IF_SET_IN_REG_SET(live, 0, j,
{
reg_state[j] |= REGSTATE_LIVE;
});
}
continue;
}
if (GET_RTX_CLASS (code) != 'i')
{
next_start_vliw_p = TRUE;
continue;
}
pattern_code = GET_CODE (PATTERN (insn));
if (pattern_code == USE || pattern_code == CLOBBER
|| pattern_code == ADDR_VEC || pattern_code == ADDR_DIFF_VEC)
{
CLEAR_VLIW_START (insn);
continue;
}
cur_start_vliw_p = next_start_vliw_p;
next_start_vliw_p = FALSE;
cur_condjump_p |= next_condjump_p;
next_condjump_p = 0;
if (code == CALL_INSN)
{
next_start_vliw_p = TRUE;
if (frv_cpu_type == FRV_CPU_TOMCAT)
cur_start_vliw_p = TRUE;
}
else if (code == JUMP_INSN)
{
if (any_condjump_p (insn))
next_condjump_p = REGSTATE_CONDJUMP;
else
next_start_vliw_p = TRUE;
}
else if (((cur_condjump_p & REGSTATE_CONDJUMP) != 0)
&& get_attr_type (insn) != TYPE_CCR)
cur_start_vliw_p = TRUE;
if (cur_start_vliw_p
|| (get_attr_type (insn) != TYPE_SETLO
&& (frv_registers_used_p (PATTERN (insn),
reg_state,
cur_condjump_p)
|| frv_registers_set_p (PATTERN (insn), reg_state, FALSE)))
|| state_transition (frv_state, insn) >= 0)
{
SET_VLIW_START (insn);
state_reset (frv_state);
state_transition (frv_state, insn);
cur_condjump_p = 0;
for (j = 0; j < num_mod; j++)
reg_state[ modified[j] ] &= ~(REGSTATE_CC_MASK
| REGSTATE_IF_EITHER
| REGSTATE_MODIFIED);
num_mod = 0;
}
else
CLEAR_VLIW_START (insn);
frv_registers_update (PATTERN (insn), reg_state, modified, &num_mod, 0);
for (link = REG_NOTES (insn);
link != NULL_RTX;
link = XEXP (link, 1))
{
rtx reg = XEXP (link, 0);
if (REG_NOTE_KIND (link) == REG_DEAD && GET_CODE (reg) == REG)
{
int regno = REGNO (reg);
int n = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
for (; regno < n; regno++)
reg_state[regno] &= ~REGSTATE_LIVE;
}
}
}
free ((PTR) frv_state);
dfa_finish ();
return;
}
#define def_builtin(name, type, code) \
builtin_function ((name), (type), (code), BUILT_IN_MD, NULL, NULL)
struct builtin_description
{
enum insn_code icode;
const char *name;
enum frv_builtins code;
enum rtx_code comparison;
unsigned int flag;
};
static struct builtin_description bdesc_set[] =
{
{ CODE_FOR_mhdsets, "__MHDSETS", FRV_BUILTIN_MHDSETS, 0, 0 }
};
static struct builtin_description bdesc_1arg[] =
{
{ CODE_FOR_mnot, "__MNOT", FRV_BUILTIN_MNOT, 0, 0 },
{ CODE_FOR_munpackh, "__MUNPACKH", FRV_BUILTIN_MUNPACKH, 0, 0 },
{ CODE_FOR_mbtoh, "__MBTOH", FRV_BUILTIN_MBTOH, 0, 0 },
{ CODE_FOR_mhtob, "__MHTOB", FRV_BUILTIN_MHTOB, 0, 0 },
{ CODE_FOR_mabshs, "__MABSHS", FRV_BUILTIN_MABSHS, 0, 0 }
};
static struct builtin_description bdesc_2arg[] =
{
{ CODE_FOR_mand, "__MAND", FRV_BUILTIN_MAND, 0, 0 },
{ CODE_FOR_mor, "__MOR", FRV_BUILTIN_MOR, 0, 0 },
{ CODE_FOR_mxor, "__MXOR", FRV_BUILTIN_MXOR, 0, 0 },
{ CODE_FOR_maveh, "__MAVEH", FRV_BUILTIN_MAVEH, 0, 0 },
{ CODE_FOR_msaths, "__MSATHS", FRV_BUILTIN_MSATHS, 0, 0 },
{ CODE_FOR_msathu, "__MSATHU", FRV_BUILTIN_MSATHU, 0, 0 },
{ CODE_FOR_maddhss, "__MADDHSS", FRV_BUILTIN_MADDHSS, 0, 0 },
{ CODE_FOR_maddhus, "__MADDHUS", FRV_BUILTIN_MADDHUS, 0, 0 },
{ CODE_FOR_msubhss, "__MSUBHSS", FRV_BUILTIN_MSUBHSS, 0, 0 },
{ CODE_FOR_msubhus, "__MSUBHUS", FRV_BUILTIN_MSUBHUS, 0, 0 },
{ CODE_FOR_mqaddhss, "__MQADDHSS", FRV_BUILTIN_MQADDHSS, 0, 0 },
{ CODE_FOR_mqaddhus, "__MQADDHUS", FRV_BUILTIN_MQADDHUS, 0, 0 },
{ CODE_FOR_mqsubhss, "__MQSUBHSS", FRV_BUILTIN_MQSUBHSS, 0, 0 },
{ CODE_FOR_mqsubhus, "__MQSUBHUS", FRV_BUILTIN_MQSUBHUS, 0, 0 },
{ CODE_FOR_mpackh, "__MPACKH", FRV_BUILTIN_MPACKH, 0, 0 },
{ CODE_FOR_mdpackh, "__MDPACKH", FRV_BUILTIN_MDPACKH, 0, 0 },
{ CODE_FOR_mcop1, "__Mcop1", FRV_BUILTIN_MCOP1, 0, 0 },
{ CODE_FOR_mcop2, "__Mcop2", FRV_BUILTIN_MCOP2, 0, 0 },
{ CODE_FOR_mwcut, "__MWCUT", FRV_BUILTIN_MWCUT, 0, 0 },
{ CODE_FOR_mqsaths, "__MQSATHS", FRV_BUILTIN_MQSATHS, 0, 0 }
};
static struct builtin_description bdesc_cut[] =
{
{ CODE_FOR_mcut, "__MCUT", FRV_BUILTIN_MCUT, 0, 0 },
{ CODE_FOR_mcutss, "__MCUTSS", FRV_BUILTIN_MCUTSS, 0, 0 },
{ CODE_FOR_mdcutssi, "__MDCUTSSI", FRV_BUILTIN_MDCUTSSI, 0, 0 }
};
static struct builtin_description bdesc_2argimm[] =
{
{ CODE_FOR_mrotli, "__MROTLI", FRV_BUILTIN_MROTLI, 0, 0 },
{ CODE_FOR_mrotri, "__MROTRI", FRV_BUILTIN_MROTRI, 0, 0 },
{ CODE_FOR_msllhi, "__MSLLHI", FRV_BUILTIN_MSLLHI, 0, 0 },
{ CODE_FOR_msrlhi, "__MSRLHI", FRV_BUILTIN_MSRLHI, 0, 0 },
{ CODE_FOR_msrahi, "__MSRAHI", FRV_BUILTIN_MSRAHI, 0, 0 },
{ CODE_FOR_mexpdhw, "__MEXPDHW", FRV_BUILTIN_MEXPDHW, 0, 0 },
{ CODE_FOR_mexpdhd, "__MEXPDHD", FRV_BUILTIN_MEXPDHD, 0, 0 },
{ CODE_FOR_mdrotli, "__MDROTLI", FRV_BUILTIN_MDROTLI, 0, 0 },
{ CODE_FOR_mcplhi, "__MCPLHI", FRV_BUILTIN_MCPLHI, 0, 0 },
{ CODE_FOR_mcpli, "__MCPLI", FRV_BUILTIN_MCPLI, 0, 0 },
{ CODE_FOR_mhsetlos, "__MHSETLOS", FRV_BUILTIN_MHSETLOS, 0, 0 },
{ CODE_FOR_mhsetloh, "__MHSETLOH", FRV_BUILTIN_MHSETLOH, 0, 0 },
{ CODE_FOR_mhsethis, "__MHSETHIS", FRV_BUILTIN_MHSETHIS, 0, 0 },
{ CODE_FOR_mhsethih, "__MHSETHIH", FRV_BUILTIN_MHSETHIH, 0, 0 },
{ CODE_FOR_mhdseth, "__MHDSETH", FRV_BUILTIN_MHDSETH, 0, 0 }
};
static struct builtin_description bdesc_void2arg[] =
{
{ CODE_FOR_mdunpackh, "__MDUNPACKH", FRV_BUILTIN_MDUNPACKH, 0, 0 },
{ CODE_FOR_mbtohe, "__MBTOHE", FRV_BUILTIN_MBTOHE, 0, 0 },
};
static struct builtin_description bdesc_void3arg[] =
{
{ CODE_FOR_mcpxrs, "__MCPXRS", FRV_BUILTIN_MCPXRS, 0, 0 },
{ CODE_FOR_mcpxru, "__MCPXRU", FRV_BUILTIN_MCPXRU, 0, 0 },
{ CODE_FOR_mcpxis, "__MCPXIS", FRV_BUILTIN_MCPXIS, 0, 0 },
{ CODE_FOR_mcpxiu, "__MCPXIU", FRV_BUILTIN_MCPXIU, 0, 0 },
{ CODE_FOR_mmulhs, "__MMULHS", FRV_BUILTIN_MMULHS, 0, 0 },
{ CODE_FOR_mmulhu, "__MMULHU", FRV_BUILTIN_MMULHU, 0, 0 },
{ CODE_FOR_mmulxhs, "__MMULXHS", FRV_BUILTIN_MMULXHS, 0, 0 },
{ CODE_FOR_mmulxhu, "__MMULXHU", FRV_BUILTIN_MMULXHU, 0, 0 },
{ CODE_FOR_mmachs, "__MMACHS", FRV_BUILTIN_MMACHS, 0, 0 },
{ CODE_FOR_mmachu, "__MMACHU", FRV_BUILTIN_MMACHU, 0, 0 },
{ CODE_FOR_mmrdhs, "__MMRDHS", FRV_BUILTIN_MMRDHS, 0, 0 },
{ CODE_FOR_mmrdhu, "__MMRDHU", FRV_BUILTIN_MMRDHU, 0, 0 },
{ CODE_FOR_mqcpxrs, "__MQCPXRS", FRV_BUILTIN_MQCPXRS, 0, 0 },
{ CODE_FOR_mqcpxru, "__MQCPXRU", FRV_BUILTIN_MQCPXRU, 0, 0 },
{ CODE_FOR_mqcpxis, "__MQCPXIS", FRV_BUILTIN_MQCPXIS, 0, 0 },
{ CODE_FOR_mqcpxiu, "__MQCPXIU", FRV_BUILTIN_MQCPXIU, 0, 0 },
{ CODE_FOR_mqmulhs, "__MQMULHS", FRV_BUILTIN_MQMULHS, 0, 0 },
{ CODE_FOR_mqmulhu, "__MQMULHU", FRV_BUILTIN_MQMULHU, 0, 0 },
{ CODE_FOR_mqmulxhs, "__MQMULXHS", FRV_BUILTIN_MQMULXHS, 0, 0 },
{ CODE_FOR_mqmulxhu, "__MQMULXHU", FRV_BUILTIN_MQMULXHU, 0, 0 },
{ CODE_FOR_mqmachs, "__MQMACHS", FRV_BUILTIN_MQMACHS, 0, 0 },
{ CODE_FOR_mqmachu, "__MQMACHU", FRV_BUILTIN_MQMACHU, 0, 0 },
{ CODE_FOR_mqxmachs, "__MQXMACHS", FRV_BUILTIN_MQXMACHS, 0, 0 },
{ CODE_FOR_mqxmacxhs, "__MQXMACXHS", FRV_BUILTIN_MQXMACXHS, 0, 0 },
{ CODE_FOR_mqmacxhs, "__MQMACXHS", FRV_BUILTIN_MQMACXHS, 0, 0 }
};
static struct builtin_description bdesc_voidacc[] =
{
{ CODE_FOR_maddaccs, "__MADDACCS", FRV_BUILTIN_MADDACCS, 0, 0 },
{ CODE_FOR_msubaccs, "__MSUBACCS", FRV_BUILTIN_MSUBACCS, 0, 0 },
{ CODE_FOR_masaccs, "__MASACCS", FRV_BUILTIN_MASACCS, 0, 0 },
{ CODE_FOR_mdaddaccs, "__MDADDACCS", FRV_BUILTIN_MDADDACCS, 0, 0 },
{ CODE_FOR_mdsubaccs, "__MDSUBACCS", FRV_BUILTIN_MDSUBACCS, 0, 0 },
{ CODE_FOR_mdasaccs, "__MDASACCS", FRV_BUILTIN_MDASACCS, 0, 0 }
};
static void
frv_init_builtins ()
{
tree endlink = void_list_node;
tree accumulator = integer_type_node;
tree integer = integer_type_node;
tree voidt = void_type_node;
tree uhalf = short_unsigned_type_node;
tree sword1 = long_integer_type_node;
tree uword1 = long_unsigned_type_node;
tree sword2 = long_long_integer_type_node;
tree uword2 = long_long_unsigned_type_node;
tree uword4 = build_pointer_type (uword1);
#define UNARY(RET, T1) \
build_function_type (RET, tree_cons (NULL_TREE, T1, endlink))
#define BINARY(RET, T1, T2) \
build_function_type (RET, tree_cons (NULL_TREE, T1, \
tree_cons (NULL_TREE, T2, endlink)))
#define TRINARY(RET, T1, T2, T3) \
build_function_type (RET, tree_cons (NULL_TREE, T1, \
tree_cons (NULL_TREE, T2, \
tree_cons (NULL_TREE, T3, endlink))))
tree void_ftype_void = build_function_type (voidt, endlink);
tree void_ftype_acc = UNARY (voidt, accumulator);
tree void_ftype_uw4_uw1 = BINARY (voidt, uword4, uword1);
tree void_ftype_uw4_uw2 = BINARY (voidt, uword4, uword2);
tree void_ftype_acc_uw1 = BINARY (voidt, accumulator, uword1);
tree void_ftype_acc_acc = BINARY (voidt, accumulator, accumulator);
tree void_ftype_acc_uw1_uw1 = TRINARY (voidt, accumulator, uword1, uword1);
tree void_ftype_acc_sw1_sw1 = TRINARY (voidt, accumulator, sword1, sword1);
tree void_ftype_acc_uw2_uw2 = TRINARY (voidt, accumulator, uword2, uword2);
tree void_ftype_acc_sw2_sw2 = TRINARY (voidt, accumulator, sword2, sword2);
tree uw1_ftype_uw1 = UNARY (uword1, uword1);
tree uw1_ftype_sw1 = UNARY (uword1, sword1);
tree uw1_ftype_uw2 = UNARY (uword1, uword2);
tree uw1_ftype_acc = UNARY (uword1, accumulator);
tree uw1_ftype_uh_uh = BINARY (uword1, uhalf, uhalf);
tree uw1_ftype_uw1_uw1 = BINARY (uword1, uword1, uword1);
tree uw1_ftype_uw1_int = BINARY (uword1, uword1, integer);
tree uw1_ftype_acc_uw1 = BINARY (uword1, accumulator, uword1);
tree uw1_ftype_acc_sw1 = BINARY (uword1, accumulator, sword1);
tree uw1_ftype_uw2_uw1 = BINARY (uword1, uword2, uword1);
tree uw1_ftype_uw2_int = BINARY (uword1, uword2, integer);
tree sw1_ftype_int = UNARY (sword1, integer);
tree sw1_ftype_sw1_sw1 = BINARY (sword1, sword1, sword1);
tree sw1_ftype_sw1_int = BINARY (sword1, sword1, integer);
tree uw2_ftype_uw1 = UNARY (uword2, uword1);
tree uw2_ftype_uw1_int = BINARY (uword2, uword1, integer);
tree uw2_ftype_uw2_uw2 = BINARY (uword2, uword2, uword2);
tree uw2_ftype_uw2_int = BINARY (uword2, uword2, integer);
tree uw2_ftype_acc_int = BINARY (uword2, accumulator, integer);
tree sw2_ftype_sw2_sw2 = BINARY (sword2, sword2, sword2);
def_builtin ("__MAND", uw1_ftype_uw1_uw1, FRV_BUILTIN_MAND);
def_builtin ("__MOR", uw1_ftype_uw1_uw1, FRV_BUILTIN_MOR);
def_builtin ("__MXOR", uw1_ftype_uw1_uw1, FRV_BUILTIN_MXOR);
def_builtin ("__MNOT", uw1_ftype_uw1, FRV_BUILTIN_MNOT);
def_builtin ("__MROTLI", uw1_ftype_uw1_int, FRV_BUILTIN_MROTLI);
def_builtin ("__MROTRI", uw1_ftype_uw1_int, FRV_BUILTIN_MROTRI);
def_builtin ("__MWCUT", uw1_ftype_uw2_uw1, FRV_BUILTIN_MWCUT);
def_builtin ("__MAVEH", uw1_ftype_uw1_uw1, FRV_BUILTIN_MAVEH);
def_builtin ("__MSLLHI", uw1_ftype_uw1_int, FRV_BUILTIN_MSLLHI);
def_builtin ("__MSRLHI", uw1_ftype_uw1_int, FRV_BUILTIN_MSRLHI);
def_builtin ("__MSRAHI", sw1_ftype_sw1_int, FRV_BUILTIN_MSRAHI);
def_builtin ("__MSATHS", sw1_ftype_sw1_sw1, FRV_BUILTIN_MSATHS);
def_builtin ("__MSATHU", uw1_ftype_uw1_uw1, FRV_BUILTIN_MSATHU);
def_builtin ("__MADDHSS", sw1_ftype_sw1_sw1, FRV_BUILTIN_MADDHSS);
def_builtin ("__MADDHUS", uw1_ftype_uw1_uw1, FRV_BUILTIN_MADDHUS);
def_builtin ("__MSUBHSS", sw1_ftype_sw1_sw1, FRV_BUILTIN_MSUBHSS);
def_builtin ("__MSUBHUS", uw1_ftype_uw1_uw1, FRV_BUILTIN_MSUBHUS);
def_builtin ("__MMULHS", void_ftype_acc_sw1_sw1, FRV_BUILTIN_MMULHS);
def_builtin ("__MMULHU", void_ftype_acc_uw1_uw1, FRV_BUILTIN_MMULHU);
def_builtin ("__MMULXHS", void_ftype_acc_sw1_sw1, FRV_BUILTIN_MMULXHS);
def_builtin ("__MMULXHU", void_ftype_acc_uw1_uw1, FRV_BUILTIN_MMULXHU);
def_builtin ("__MMACHS", void_ftype_acc_sw1_sw1, FRV_BUILTIN_MMACHS);
def_builtin ("__MMACHU", void_ftype_acc_uw1_uw1, FRV_BUILTIN_MMACHU);
def_builtin ("__MMRDHS", void_ftype_acc_sw1_sw1, FRV_BUILTIN_MMRDHS);
def_builtin ("__MMRDHU", void_ftype_acc_uw1_uw1, FRV_BUILTIN_MMRDHU);
def_builtin ("__MQADDHSS", sw2_ftype_sw2_sw2, FRV_BUILTIN_MQADDHSS);
def_builtin ("__MQADDHUS", uw2_ftype_uw2_uw2, FRV_BUILTIN_MQADDHUS);
def_builtin ("__MQSUBHSS", sw2_ftype_sw2_sw2, FRV_BUILTIN_MQSUBHSS);
def_builtin ("__MQSUBHUS", uw2_ftype_uw2_uw2, FRV_BUILTIN_MQSUBHUS);
def_builtin ("__MQMULHS", void_ftype_acc_sw2_sw2, FRV_BUILTIN_MQMULHS);
def_builtin ("__MQMULHU", void_ftype_acc_uw2_uw2, FRV_BUILTIN_MQMULHU);
def_builtin ("__MQMULXHS", void_ftype_acc_sw2_sw2, FRV_BUILTIN_MQMULXHS);
def_builtin ("__MQMULXHU", void_ftype_acc_uw2_uw2, FRV_BUILTIN_MQMULXHU);
def_builtin ("__MQMACHS", void_ftype_acc_sw2_sw2, FRV_BUILTIN_MQMACHS);
def_builtin ("__MQMACHU", void_ftype_acc_uw2_uw2, FRV_BUILTIN_MQMACHU);
def_builtin ("__MCPXRS", void_ftype_acc_sw1_sw1, FRV_BUILTIN_MCPXRS);
def_builtin ("__MCPXRU", void_ftype_acc_uw1_uw1, FRV_BUILTIN_MCPXRU);
def_builtin ("__MCPXIS", void_ftype_acc_sw1_sw1, FRV_BUILTIN_MCPXIS);
def_builtin ("__MCPXIU", void_ftype_acc_uw1_uw1, FRV_BUILTIN_MCPXIU);
def_builtin ("__MQCPXRS", void_ftype_acc_sw2_sw2, FRV_BUILTIN_MQCPXRS);
def_builtin ("__MQCPXRU", void_ftype_acc_uw2_uw2, FRV_BUILTIN_MQCPXRU);
def_builtin ("__MQCPXIS", void_ftype_acc_sw2_sw2, FRV_BUILTIN_MQCPXIS);
def_builtin ("__MQCPXIU", void_ftype_acc_uw2_uw2, FRV_BUILTIN_MQCPXIU);
def_builtin ("__MCUT", uw1_ftype_acc_uw1, FRV_BUILTIN_MCUT);
def_builtin ("__MCUTSS", uw1_ftype_acc_sw1, FRV_BUILTIN_MCUTSS);
def_builtin ("__MEXPDHW", uw1_ftype_uw1_int, FRV_BUILTIN_MEXPDHW);
def_builtin ("__MEXPDHD", uw2_ftype_uw1_int, FRV_BUILTIN_MEXPDHD);
def_builtin ("__MPACKH", uw1_ftype_uh_uh, FRV_BUILTIN_MPACKH);
def_builtin ("__MUNPACKH", uw2_ftype_uw1, FRV_BUILTIN_MUNPACKH);
def_builtin ("__MDPACKH", uw2_ftype_uw2_uw2, FRV_BUILTIN_MDPACKH);
def_builtin ("__MDUNPACKH", void_ftype_uw4_uw2, FRV_BUILTIN_MDUNPACKH);
def_builtin ("__MBTOH", uw2_ftype_uw1, FRV_BUILTIN_MBTOH);
def_builtin ("__MHTOB", uw1_ftype_uw2, FRV_BUILTIN_MHTOB);
def_builtin ("__MBTOHE", void_ftype_uw4_uw1, FRV_BUILTIN_MBTOHE);
def_builtin ("__MCLRACC", void_ftype_acc, FRV_BUILTIN_MCLRACC);
def_builtin ("__MCLRACCA", void_ftype_void, FRV_BUILTIN_MCLRACCA);
def_builtin ("__MRDACC", uw1_ftype_acc, FRV_BUILTIN_MRDACC);
def_builtin ("__MRDACCG", uw1_ftype_acc, FRV_BUILTIN_MRDACCG);
def_builtin ("__MWTACC", void_ftype_acc_uw1, FRV_BUILTIN_MWTACC);
def_builtin ("__MWTACCG", void_ftype_acc_uw1, FRV_BUILTIN_MWTACCG);
def_builtin ("__Mcop1", uw1_ftype_uw1_uw1, FRV_BUILTIN_MCOP1);
def_builtin ("__Mcop2", uw1_ftype_uw1_uw1, FRV_BUILTIN_MCOP2);
def_builtin ("__MTRAP", void_ftype_void, FRV_BUILTIN_MTRAP);
def_builtin ("__MQXMACHS", void_ftype_acc_sw2_sw2, FRV_BUILTIN_MQXMACHS);
def_builtin ("__MQXMACXHS", void_ftype_acc_sw2_sw2, FRV_BUILTIN_MQXMACXHS);
def_builtin ("__MQMACXHS", void_ftype_acc_sw2_sw2, FRV_BUILTIN_MQMACXHS);
def_builtin ("__MADDACCS", void_ftype_acc_acc, FRV_BUILTIN_MADDACCS);
def_builtin ("__MSUBACCS", void_ftype_acc_acc, FRV_BUILTIN_MSUBACCS);
def_builtin ("__MASACCS", void_ftype_acc_acc, FRV_BUILTIN_MASACCS);
def_builtin ("__MDADDACCS", void_ftype_acc_acc, FRV_BUILTIN_MDADDACCS);
def_builtin ("__MDSUBACCS", void_ftype_acc_acc, FRV_BUILTIN_MDSUBACCS);
def_builtin ("__MDASACCS", void_ftype_acc_acc, FRV_BUILTIN_MDASACCS);
def_builtin ("__MABSHS", uw1_ftype_sw1, FRV_BUILTIN_MABSHS);
def_builtin ("__MDROTLI", uw2_ftype_uw2_int, FRV_BUILTIN_MDROTLI);
def_builtin ("__MCPLHI", uw1_ftype_uw2_int, FRV_BUILTIN_MCPLHI);
def_builtin ("__MCPLI", uw1_ftype_uw2_int, FRV_BUILTIN_MCPLI);
def_builtin ("__MDCUTSSI", uw2_ftype_acc_int, FRV_BUILTIN_MDCUTSSI);
def_builtin ("__MQSATHS", sw2_ftype_sw2_sw2, FRV_BUILTIN_MQSATHS);
def_builtin ("__MHSETLOS", sw1_ftype_sw1_int, FRV_BUILTIN_MHSETLOS);
def_builtin ("__MHSETHIS", sw1_ftype_sw1_int, FRV_BUILTIN_MHSETHIS);
def_builtin ("__MHDSETS", sw1_ftype_int, FRV_BUILTIN_MHDSETS);
def_builtin ("__MHSETLOH", uw1_ftype_uw1_int, FRV_BUILTIN_MHSETLOH);
def_builtin ("__MHSETHIH", uw1_ftype_uw1_int, FRV_BUILTIN_MHSETHIH);
def_builtin ("__MHDSETH", uw1_ftype_uw1_int, FRV_BUILTIN_MHDSETH);
#undef UNARY
#undef BINARY
#undef TRINARY
}
static rtx
frv_int_to_acc (icode, opnum, opval)
enum insn_code icode;
int opnum;
rtx opval;
{
rtx reg;
if (GET_CODE (opval) != CONST_INT)
{
error ("accumulator is not a constant integer");
return NULL_RTX;
}
if (! IN_RANGE_P (INTVAL (opval), 0, NUM_ACCS - 1))
{
error ("accumulator number is out of bounds");
return NULL_RTX;
}
reg = gen_rtx_REG (insn_data[icode].operand[opnum].mode,
ACC_FIRST + INTVAL (opval));
if (! (*insn_data[icode].operand[opnum].predicate) (reg, VOIDmode))
REGNO (reg) = ACCG_FIRST + INTVAL (opval);
if (! (*insn_data[icode].operand[opnum].predicate) (reg, VOIDmode))
{
error ("inappropriate accumulator for `%s'", insn_data[icode].name);
return NULL_RTX;
}
return reg;
}
static enum machine_mode
frv_matching_accg_mode (mode)
enum machine_mode mode;
{
switch (mode)
{
case V4SImode:
return V4QImode;
case DImode:
return HImode;
case SImode:
return QImode;
default:
abort ();
}
}
rtx
frv_matching_accg_for_acc (acc)
rtx acc;
{
return gen_rtx_REG (frv_matching_accg_mode (GET_MODE (acc)),
REGNO (acc) - ACC_FIRST + ACCG_FIRST);
}
static rtx
frv_read_argument (arglistptr)
tree *arglistptr;
{
tree next = TREE_VALUE (*arglistptr);
*arglistptr = TREE_CHAIN (*arglistptr);
return expand_expr (next, NULL_RTX, VOIDmode, 0);
}
static int
frv_check_constant_argument (icode, opnum, opval)
enum insn_code icode;
int opnum;
rtx opval;
{
if (GET_CODE (opval) != CONST_INT)
{
error ("`%s' expects a constant argument", insn_data[icode].name);
return FALSE;
}
if (! (*insn_data[icode].operand[opnum].predicate) (opval, VOIDmode))
{
error ("constant argument out of range for `%s'", insn_data[icode].name);
return FALSE;
}
return TRUE;
}
static rtx
frv_legitimize_target (icode, target)
enum insn_code icode;
rtx target;
{
enum machine_mode mode = insn_data[icode].operand[0].mode;
if (! target
|| GET_MODE (target) != mode
|| ! (*insn_data[icode].operand[0].predicate) (target, mode))
return gen_reg_rtx (mode);
else
return target;
}
static rtx
frv_legitimize_argument (icode, opnum, arg)
enum insn_code icode;
int opnum;
rtx arg;
{
enum machine_mode mode = insn_data[icode].operand[opnum].mode;
if ((*insn_data[icode].operand[opnum].predicate) (arg, mode))
return arg;
else
return copy_to_mode_reg (mode, arg);
}
static rtx
frv_expand_set_builtin (icode, arglist, target)
enum insn_code icode;
tree arglist;
rtx target;
{
rtx pat;
rtx op0 = frv_read_argument (&arglist);
if (! frv_check_constant_argument (icode, 1, op0))
return NULL_RTX;
target = frv_legitimize_target (icode, target);
pat = GEN_FCN (icode) (target, op0);
if (! pat)
return NULL_RTX;
emit_insn (pat);
return target;
}
static rtx
frv_expand_unop_builtin (icode, arglist, target)
enum insn_code icode;
tree arglist;
rtx target;
{
rtx pat;
rtx op0 = frv_read_argument (&arglist);
target = frv_legitimize_target (icode, target);
op0 = frv_legitimize_argument (icode, 1, op0);
pat = GEN_FCN (icode) (target, op0);
if (! pat)
return NULL_RTX;
emit_insn (pat);
return target;
}
static rtx
frv_expand_binop_builtin (icode, arglist, target)
enum insn_code icode;
tree arglist;
rtx target;
{
rtx pat;
rtx op0 = frv_read_argument (&arglist);
rtx op1 = frv_read_argument (&arglist);
target = frv_legitimize_target (icode, target);
op0 = frv_legitimize_argument (icode, 1, op0);
op1 = frv_legitimize_argument (icode, 2, op1);
pat = GEN_FCN (icode) (target, op0, op1);
if (! pat)
return NULL_RTX;
emit_insn (pat);
return target;
}
static rtx
frv_expand_cut_builtin (icode, arglist, target)
enum insn_code icode;
tree arglist;
rtx target;
{
rtx pat;
rtx op0 = frv_read_argument (&arglist);
rtx op1 = frv_read_argument (&arglist);
rtx op2;
target = frv_legitimize_target (icode, target);
op0 = frv_int_to_acc (icode, 1, op0);
if (! op0)
return NULL_RTX;
if (icode == CODE_FOR_mdcutssi || GET_CODE (op1) == CONST_INT)
{
if (! frv_check_constant_argument (icode, 2, op1))
return NULL_RTX;
}
else
op1 = frv_legitimize_argument (icode, 2, op1);
op2 = frv_matching_accg_for_acc (op0);
pat = GEN_FCN (icode) (target, op0, op1, op2);
if (! pat)
return NULL_RTX;
emit_insn (pat);
return target;
}
static rtx
frv_expand_binopimm_builtin (icode, arglist, target)
enum insn_code icode;
tree arglist;
rtx target;
{
rtx pat;
rtx op0 = frv_read_argument (&arglist);
rtx op1 = frv_read_argument (&arglist);
if (! frv_check_constant_argument (icode, 2, op1))
return NULL_RTX;
target = frv_legitimize_target (icode, target);
op0 = frv_legitimize_argument (icode, 1, op0);
pat = GEN_FCN (icode) (target, op0, op1);
if (! pat)
return NULL_RTX;
emit_insn (pat);
return target;
}
static rtx
frv_expand_voidbinop_builtin (icode, arglist)
enum insn_code icode;
tree arglist;
{
rtx pat;
rtx op0 = frv_read_argument (&arglist);
rtx op1 = frv_read_argument (&arglist);
enum machine_mode mode0 = insn_data[icode].operand[0].mode;
rtx addr;
if (GET_CODE (op0) != MEM)
{
rtx reg = op0;
if (! offsettable_address_p (0, mode0, op0))
{
reg = gen_reg_rtx (Pmode);
emit_insn (gen_rtx_SET (VOIDmode, reg, op0));
}
op0 = gen_rtx_MEM (SImode, reg);
}
addr = XEXP (op0, 0);
if (! offsettable_address_p (0, mode0, addr))
addr = copy_to_mode_reg (Pmode, op0);
op0 = change_address (op0, V4SImode, addr);
op1 = frv_legitimize_argument (icode, 1, op1);
pat = GEN_FCN (icode) (op0, op1);
if (! pat)
return 0;
emit_insn (pat);
return 0;
}
static rtx
frv_expand_voidtriop_builtin (icode, arglist)
enum insn_code icode;
tree arglist;
{
rtx pat;
rtx op0 = frv_read_argument (&arglist);
rtx op1 = frv_read_argument (&arglist);
rtx op2 = frv_read_argument (&arglist);
rtx op3;
op0 = frv_int_to_acc (icode, 0, op0);
if (! op0)
return NULL_RTX;
op1 = frv_legitimize_argument (icode, 1, op1);
op2 = frv_legitimize_argument (icode, 2, op2);
op3 = frv_matching_accg_for_acc (op0);
pat = GEN_FCN (icode) (op0, op1, op2, op3);
if (! pat)
return NULL_RTX;
emit_insn (pat);
return NULL_RTX;
}
static rtx
frv_expand_voidaccop_builtin (icode, arglist)
enum insn_code icode;
tree arglist;
{
rtx pat;
rtx op0 = frv_read_argument (&arglist);
rtx op1 = frv_read_argument (&arglist);
rtx op2;
rtx op3;
op0 = frv_int_to_acc (icode, 0, op0);
if (! op0)
return NULL_RTX;
op1 = frv_int_to_acc (icode, 1, op1);
if (! op1)
return NULL_RTX;
op2 = frv_matching_accg_for_acc (op0);
op3 = frv_matching_accg_for_acc (op1);
pat = GEN_FCN (icode) (op0, op1, op2, op3);
if (! pat)
return NULL_RTX;
emit_insn (pat);
return NULL_RTX;
}
static rtx
frv_expand_mclracc_builtin (arglist)
tree arglist;
{
enum insn_code icode = CODE_FOR_mclracc;
rtx pat;
rtx op0 = frv_read_argument (&arglist);
op0 = frv_int_to_acc (icode, 0, op0);
if (! op0)
return NULL_RTX;
pat = GEN_FCN (icode) (op0);
if (pat)
emit_insn (pat);
return NULL_RTX;
}
static rtx
frv_expand_noargs_builtin (icode)
enum insn_code icode;
{
rtx pat = GEN_FCN (icode) (GEN_INT (0));
if (pat)
emit_insn (pat);
return NULL_RTX;
}
static rtx
frv_expand_mrdacc_builtin (icode, arglist)
enum insn_code icode;
tree arglist;
{
rtx pat;
rtx target = gen_reg_rtx (SImode);
rtx op0 = frv_read_argument (&arglist);
op0 = frv_int_to_acc (icode, 1, op0);
if (! op0)
return NULL_RTX;
pat = GEN_FCN (icode) (target, op0);
if (! pat)
return NULL_RTX;
emit_insn (pat);
return target;
}
static rtx
frv_expand_mwtacc_builtin (icode, arglist)
enum insn_code icode;
tree arglist;
{
rtx pat;
rtx op0 = frv_read_argument (&arglist);
rtx op1 = frv_read_argument (&arglist);
op0 = frv_int_to_acc (icode, 0, op0);
if (! op0)
return NULL_RTX;
op1 = frv_legitimize_argument (icode, 1, op1);
pat = GEN_FCN (icode) (op0, op1);
if (pat)
emit_insn (pat);
return NULL_RTX;
}
static rtx
frv_expand_builtin (exp, target, subtarget, mode, ignore)
tree exp;
rtx target;
rtx subtarget ATTRIBUTE_UNUSED;
enum machine_mode mode ATTRIBUTE_UNUSED;
int ignore ATTRIBUTE_UNUSED;
{
tree arglist = TREE_OPERAND (exp, 1);
tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
unsigned fcode = (unsigned)DECL_FUNCTION_CODE (fndecl);
unsigned i;
struct builtin_description *d;
if (! TARGET_MEDIA)
{
error ("media functions are not available unless -mmedia is used");
return NULL_RTX;
}
switch (fcode)
{
case FRV_BUILTIN_MCOP1:
case FRV_BUILTIN_MCOP2:
case FRV_BUILTIN_MDUNPACKH:
case FRV_BUILTIN_MBTOHE:
if (! TARGET_MEDIA_REV1)
{
error ("this media function is only available on the fr500");
return NULL_RTX;
}
break;
case FRV_BUILTIN_MQXMACHS:
case FRV_BUILTIN_MQXMACXHS:
case FRV_BUILTIN_MQMACXHS:
case FRV_BUILTIN_MADDACCS:
case FRV_BUILTIN_MSUBACCS:
case FRV_BUILTIN_MASACCS:
case FRV_BUILTIN_MDADDACCS:
case FRV_BUILTIN_MDSUBACCS:
case FRV_BUILTIN_MDASACCS:
case FRV_BUILTIN_MABSHS:
case FRV_BUILTIN_MDROTLI:
case FRV_BUILTIN_MCPLHI:
case FRV_BUILTIN_MCPLI:
case FRV_BUILTIN_MDCUTSSI:
case FRV_BUILTIN_MQSATHS:
case FRV_BUILTIN_MHSETLOS:
case FRV_BUILTIN_MHSETLOH:
case FRV_BUILTIN_MHSETHIS:
case FRV_BUILTIN_MHSETHIH:
case FRV_BUILTIN_MHDSETS:
case FRV_BUILTIN_MHDSETH:
if (! TARGET_MEDIA_REV2)
{
error ("this media function is only available on the fr400");
return NULL_RTX;
}
break;
default:
break;
}
switch (fcode)
{
case FRV_BUILTIN_MTRAP:
return frv_expand_noargs_builtin (CODE_FOR_mtrap);
case FRV_BUILTIN_MCLRACC:
return frv_expand_mclracc_builtin (arglist);
case FRV_BUILTIN_MCLRACCA:
if (TARGET_ACC_8)
return frv_expand_noargs_builtin (CODE_FOR_mclracca8);
else
return frv_expand_noargs_builtin (CODE_FOR_mclracca4);
case FRV_BUILTIN_MRDACC:
return frv_expand_mrdacc_builtin (CODE_FOR_mrdacc, arglist);
case FRV_BUILTIN_MRDACCG:
return frv_expand_mrdacc_builtin (CODE_FOR_mrdaccg, arglist);
case FRV_BUILTIN_MWTACC:
return frv_expand_mwtacc_builtin (CODE_FOR_mwtacc, arglist);
case FRV_BUILTIN_MWTACCG:
return frv_expand_mwtacc_builtin (CODE_FOR_mwtaccg, arglist);
default:
break;
}
for (i = 0, d = bdesc_set; i < sizeof (bdesc_set) / sizeof *d; i++, d++)
if (d->code == fcode)
return frv_expand_set_builtin (d->icode, arglist, target);
for (i = 0, d = bdesc_1arg; i < sizeof (bdesc_1arg) / sizeof *d; i++, d++)
if (d->code == fcode)
return frv_expand_unop_builtin (d->icode, arglist, target);
for (i = 0, d = bdesc_2arg; i < sizeof (bdesc_2arg) / sizeof *d; i++, d++)
if (d->code == fcode)
return frv_expand_binop_builtin (d->icode, arglist, target);
for (i = 0, d = bdesc_cut; i < sizeof (bdesc_cut) / sizeof *d; i++, d++)
if (d->code == fcode)
return frv_expand_cut_builtin (d->icode, arglist, target);
for (i = 0, d = bdesc_2argimm;
i < sizeof (bdesc_2argimm) / sizeof *d;
i++, d++)
{
if (d->code == fcode)
return frv_expand_binopimm_builtin (d->icode, arglist, target);
}
for (i = 0, d = bdesc_void2arg;
i < sizeof (bdesc_void2arg) / sizeof *d;
i++, d++)
{
if (d->code == fcode)
return frv_expand_voidbinop_builtin (d->icode, arglist);
}
for (i = 0, d = bdesc_void3arg;
i < sizeof (bdesc_void3arg) / sizeof *d;
i++, d++)
{
if (d->code == fcode)
return frv_expand_voidtriop_builtin (d->icode, arglist);
}
for (i = 0, d = bdesc_voidacc;
i < sizeof (bdesc_voidacc) / sizeof *d;
i++, d++)
{
if (d->code == fcode)
return frv_expand_voidaccop_builtin (d->icode, arglist);
}
return 0;
}
static const char *
frv_strip_name_encoding (str)
const char *str;
{
while (*str == '*' || *str == SDATA_FLAG_CHAR)
str++;
return str;
}
static bool
frv_in_small_data_p (decl)
tree decl;
{
HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (decl));
return symbol_ref_small_data_p (XEXP (DECL_RTL (decl), 0))
&& size > 0 && size <= g_switch_value;
}