enum cmp_type
{
CMP_SI,
CMP_SF,
CMP_DF,
CMP_MAX
};
extern unsigned int total_code_bytes;
enum processor_type
{
PROCESSOR_700,
PROCESSOR_7100,
PROCESSOR_7100LC,
PROCESSOR_7200,
PROCESSOR_8000
};
extern const char *pa_cpu_string;
extern enum processor_type pa_cpu;
#define pa_cpu_attr ((enum attr_cpu)pa_cpu)
enum architecture_type
{
ARCHITECTURE_10,
ARCHITECTURE_11,
ARCHITECTURE_20
};
struct rtx_def;
extern const char *pa_arch_string;
extern enum architecture_type pa_arch;
#define TARGET_VERSION fputs (" (hppa)", stderr);
extern int target_flags;
#define MASK_PA_11 1
#ifndef TARGET_PA_11
#define TARGET_PA_11 (target_flags & MASK_PA_11)
#endif
#define MASK_DISABLE_FPREGS 2
#define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS)
#define MASK_NO_SPACE_REGS 4
#define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS)
#define MASK_JUMP_IN_DELAY 8
#define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY)
#define MASK_DISABLE_INDEXING 32
#define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING)
#define MASK_PORTABLE_RUNTIME 64
#define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME)
#define MASK_GAS 128
#define TARGET_GAS (target_flags & MASK_GAS)
#define MASK_SOFT_FLOAT 256
#define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
#define MASK_LONG_LOAD_STORE 512
#define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE)
#define MASK_FAST_INDIRECT_CALLS 1024
#define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS)
#define MASK_BIG_SWITCH 2048
#define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
#define MASK_PA_20 4096
#ifndef TARGET_PA_20
#define TARGET_PA_20 (target_flags & MASK_PA_20)
#endif
#ifndef TARGET_64BIT
#define TARGET_64BIT 0
#endif
#ifndef TARGET_ELF32
#define TARGET_ELF32 0
#endif
#define TARGET_SWITCHES \
{{"snake", MASK_PA_11, "Generate PA1.1 code"}, \
{"nosnake", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \
{"pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \
{"pa-risc-1-1", MASK_PA_11, "Generate PA1.1 code"}, \
{"pa-risc-2-0", MASK_PA_20, "Generate PA2.0 code. This option requires binutils 2.10 or later"}, \
{"disable-fpregs", MASK_DISABLE_FPREGS, "Disable FP regs"}, \
{"no-disable-fpregs", -MASK_DISABLE_FPREGS, "Do not disable FP regs"},\
{"no-space-regs", MASK_NO_SPACE_REGS, "Disable space regs"}, \
{"space-regs", -MASK_NO_SPACE_REGS, "Do not disable space regs"}, \
{"jump-in-delay", MASK_JUMP_IN_DELAY, "Put jumps in call delay slots"},\
{"no-jump-in-delay", -MASK_JUMP_IN_DELAY, "Do not put jumps in call delay slots"}, \
{"disable-indexing", MASK_DISABLE_INDEXING, "Disable indexed addressing"},\
{"no-disable-indexing", -MASK_DISABLE_INDEXING, "Do not disable indexed addressing"},\
{"portable-runtime", MASK_PORTABLE_RUNTIME, "Use portable calling conventions"}, \
{"no-portable-runtime", -MASK_PORTABLE_RUNTIME, "Do not use portable calling conventions"},\
{"gas", MASK_GAS, "Assume code will be assembled by GAS"}, \
{"no-gas", -MASK_GAS, "Do not assume code will be assembled by GAS"}, \
{"soft-float", MASK_SOFT_FLOAT, "Use software floating point"}, \
{"no-soft-float", -MASK_SOFT_FLOAT, "Do not use software floating point"}, \
{"long-load-store", MASK_LONG_LOAD_STORE, "Emit long load/store sequences"}, \
{"no-long-load-store", -MASK_LONG_LOAD_STORE, "Do not emit long load/store sequences"},\
{"fast-indirect-calls", MASK_FAST_INDIRECT_CALLS, "Generate fast indirect calls"},\
{"no-fast-indirect-calls", -MASK_FAST_INDIRECT_CALLS, "Do not generate fast indirect calls"},\
{"big-switch", MASK_BIG_SWITCH, "Generate code for huge switch statements"}, \
{"no-big-switch", -MASK_BIG_SWITCH, "Do not generate code for huge switch statements"}, \
{"linker-opt", 0, "Enable linker optimizations"}, \
{ "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, NULL}}
#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY)
#endif
#ifndef TARGET_CPU_DEFAULT
#define TARGET_CPU_DEFAULT 0
#endif
#define TARGET_OPTIONS \
{ \
{ "schedule=", &pa_cpu_string, "Specify CPU for scheduling purposes" },\
{ "arch=", &pa_arch_string, "Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later." }\
}
#define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
#define OVERRIDE_OPTIONS override_options ()
#include "dbxelf.h"
#define DEFAULT_GDB_EXTENSIONS 1
#undef DBX_CONTIN_LENGTH
#define DBX_CONTIN_LENGTH 3000
#define ASM_STABS_OP "\t.stabs\t"
#define ASM_STABN_OP "\t.stabn\t"
#define DEBUGGER_AUTO_OFFSET(X) \
((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
+ (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
((GET_CODE (X) == PLUS ? OFFSET : 0) \
+ (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
#define CPP_PA10_SPEC ""
#define CPP_PA11_SPEC "-D_PA_RISC1_1 -D__hp9000s700"
#define CPP_PA20_SPEC "-D_PA_RISC2_0 -D__hp9000s800"
#define CPP_64BIT_SPEC "-D__LP64__ -D__LONG_MAX__=9223372036854775807L"
#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) == 0
#define CPP_CPU_DEFAULT_SPEC "%(cpp_pa10)"
#endif
#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) != 0
#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_20) != 0
#define CPP_CPU_DEFAULT_SPEC "%(cpp_pa11) %(cpp_pa20)"
#else
#define CPP_CPU_DEFAULT_SPEC "%(cpp_pa11)"
#endif
#endif
#if TARGET_64BIT
#define CPP_64BIT_DEFAULT_SPEC "%(cpp_64bit)"
#else
#define CPP_64BIT_DEFAULT_SPEC ""
#endif
#ifndef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS
#endif
#define EXTRA_SPECS \
{ "cpp_pa10", CPP_PA10_SPEC}, \
{ "cpp_pa11", CPP_PA11_SPEC}, \
{ "cpp_pa20", CPP_PA20_SPEC}, \
{ "cpp_64bit", CPP_64BIT_SPEC}, \
{ "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
{ "cpp_64bit_default", CPP_64BIT_DEFAULT_SPEC }, \
SUBTARGET_EXTRA_SPECS
#define CPP_SPEC "\
%{mpa-risc-1-0:%(cpp_pa10)} \
%{mpa-risc-1-1:%(cpp_pa11)} \
%{msnake:%(cpp_pa11)} \
%{mpa-risc-2-0:%(cpp_pa20)} \
%{!mpa-risc-1-0:%{!mpa-risc-1-1:%{!mpa-risc-2-0:%{!msnake:%(cpp_cpu_default)}}}} \
%{m64bit:%(cpp_64bit)} \
%{!m64bit:%(cpp_64bit_default)} \
%{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__ -D_INCLUDE_LONGLONG} \
%{threads: -D_REENTRANT -D_DCE_THREADS}"
#define CPLUSPLUS_CPP_SPEC "\
-D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__ -D_INCLUDE_LONGLONG \
%{mpa-risc-1-0:%(cpp_pa10)} \
%{mpa-risc-1-1:%(cpp_pa11)} \
%{msnake:%(cpp_pa11)} \
%{mpa-risc-2-0:%(cpp_pa20)} \
%{!mpa-risc-1-0:%{!mpa-risc-1-1:%{!mpa-risc-2-0:%{!msnake:%(cpp_cpu_default)}}}} \
%{m64bit:%(cpp_64bit)} \
%{!m64bit:%(cpp_64bit_default)} \
%{threads: -D_REENTRANT -D_DCE_THREADS}"
#define CC1_SPEC "%{pg:} %{p:}"
#define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
#ifndef LIB_SPEC
#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
#endif
#define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
#define SIZE_TYPE "unsigned int"
#define PTRDIFF_TYPE "int"
#define WCHAR_TYPE "unsigned int"
#define WCHAR_TYPE_SIZE 32
#define CAN_DEBUG_WITHOUT_FP
#define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
#define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem=unix -Asystem=bsd -Acpu=hppa -Amachine=hppa"
#define REAL_ARITHMETIC
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
if (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
(MODE) = word_mode;
#define BITS_BIG_ENDIAN 1
#define BYTES_BIG_ENDIAN 1
#define WORDS_BIG_ENDIAN 1
#define BITS_PER_UNIT 8
#define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
#define MAX_BITS_PER_WORD 64
#define MAX_LONG_TYPE_SIZE 32
#define MAX_WCHAR_TYPE_SIZE 32
#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
#define MIN_UNITS_PER_WORD 4
#define POINTER_SIZE BITS_PER_WORD
#define PARM_BOUNDARY BITS_PER_WORD
#define MAX_PARM_BOUNDARY 64
#define STACK_BOUNDARY (TARGET_64BIT ? 128 : 64)
#define PREFERRED_STACK_BOUNDARY 512
#define FUNCTION_BOUNDARY (TARGET_64BIT ? 64 : 32)
#define EMPTY_FIELD_BOUNDARY 32
#define STRUCTURE_SIZE_BOUNDARY 8
#define PCC_BITFIELD_TYPE_MATTERS 1
#define BIGGEST_ALIGNMENT 128
#define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
#define DATA_ALIGNMENT(TYPE, ALIGN) \
(TREE_CODE (TYPE) == ARRAY_TYPE \
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
#define STRICT_ALIGNMENT 1
#define TARGET_MEM_FUNCTIONS
#define MODES_TIEABLE_P(MODE1, MODE2) \
(GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
#define STACK_POINTER_REGNUM 30
#define FRAME_POINTER_REGNUM 3
#define FRAME_POINTER_REQUIRED \
(current_function_calls_alloca)
#define INITIAL_FRAME_POINTER_OFFSET(VAR) \
do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
#define ARG_POINTER_REGNUM 3
#define STATIC_CHAIN_REGNUM 29
#define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? 27 : 19)
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
extern struct rtx_def *hppa_pic_save_rtx PARAMS ((void));
#define DEFAULT_PCC_STRUCT_RETURN 0
#define RETURN_IN_MEMORY(TYPE) \
((unsigned HOST_WIDE_INT) int_size_in_bytes (TYPE) > (TARGET_64BIT ? 16 : 8))
#define STRUCT_VALUE_REGNUM 28
#define EH_RETURN_DATA_REGNO(N) \
((N) < 3 ? (N) + 20 : (N) == 4 ? 31 : INVALID_REGNUM)
#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
#define EH_RETURN_HANDLER_RTX gen_rtx_REG (Pmode, 2)
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'I' ? VAL_11_BITS_P (VALUE) \
: (C) == 'J' ? VAL_14_BITS_P (VALUE) \
: (C) == 'K' ? zdepi_cint_p (VALUE) \
: (C) == 'L' ? VAL_5_BITS_P (VALUE) \
: (C) == 'M' ? (VALUE) == 0 \
: (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \
|| (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \
== (HOST_WIDE_INT) -1 << 31)) \
: (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
: (C) == 'P' ? and_mask_p (VALUE) \
: 0)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
&& (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
: 0)
#define INDEX_REG_CLASS GENERAL_REGS
#define BASE_REG_CLASS GENERAL_REGS
#define FP_REG_CLASS_P(CLASS) \
((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
#define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
#define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
&& REGNO (IN) < FIRST_PSEUDO_REGISTER) \
? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
(FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
#define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16)))
#define ARGS_GROW_DOWNWARD
#define STARTING_FRAME_OFFSET 8
#define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
#define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
#define OUTGOING_REG_PARM_STACK_SPACE
#define ACCUMULATE_OUTGOING_ARGS 1
#define STACK_POINTER_OFFSET \
(TARGET_64BIT ? -(current_function_outgoing_args_size + 16): -32)
#define STACK_DYNAMIC_OFFSET(FNDECL) \
(TARGET_64BIT \
? (STACK_POINTER_OFFSET) \
: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \
&& TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
|| POINTER_TYPE_P (VALTYPE)) \
? word_mode : TYPE_MODE (VALTYPE), \
TREE_CODE (VALTYPE) == REAL_TYPE && !TARGET_SOFT_FLOAT ? 32 : 28)
#define LIBCALL_VALUE(MODE) \
gen_rtx_REG (MODE, \
(! TARGET_SOFT_FLOAT \
&& ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
#define FUNCTION_VALUE_REGNO_P(N) \
((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
struct hppa_args {int words, nargs_prototype, indirect; };
#define CUMULATIVE_ARGS struct hppa_args
#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
(CUM).words = 0, \
(CUM).indirect = INDIRECT, \
(CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
+ (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
|| RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
: 0)
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
(CUM).words = 0, \
(CUM).indirect = 0, \
(CUM).nargs_prototype = 1000
#define FUNCTION_ARG_SIZE(MODE, TYPE) \
((((MODE) != BLKmode \
? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
: int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
{ (CUM).nargs_prototype--; \
(CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
+ (((CUM).words & 01) && (TYPE) != 0 \
&& FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
}
#define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
function_arg (&CUM, MODE, TYPE, NAMED, 0)
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
function_arg (&CUM, MODE, TYPE, NAMED, 1)
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
(TARGET_64BIT ? function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) : 0)
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
(((TYPE) != 0) \
? ((integer_zerop (TYPE_SIZE (TYPE)) \
|| ! TREE_CONSTANT (TYPE_SIZE (TYPE))) \
? BITS_PER_UNIT \
: (((int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) \
/ UNITS_PER_WORD) * BITS_PER_WORD) \
: ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
? PARM_BOUNDARY : GET_MODE_ALIGNMENT(MODE)))
#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
(TARGET_64BIT \
? 0 \
: (((TYPE) && int_size_in_bytes (TYPE) > 8) \
|| ((MODE) && GET_MODE_SIZE (MODE) > 8)))
#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
(TARGET_64BIT \
? 0 \
: (((TYPE) && int_size_in_bytes (TYPE) > 8) \
|| ((MODE) && GET_MODE_SIZE (MODE) > 8)))
extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
extern enum cmp_type hppa_branch_type;
#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
{ const char *target_name = XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0); \
static unsigned int current_thunk_number; \
char label[16]; \
char *lab; \
ASM_GENERATE_INTERNAL_LABEL (label, "LTHN", current_thunk_number); \
STRIP_NAME_ENCODING (lab, label); \
STRIP_NAME_ENCODING (target_name, target_name); \
\
pa_output_function_prologue (FILE, 0); \
if (VAL_14_BITS_P (DELTA)) \
{ \
if (! TARGET_64BIT && ! TARGET_PORTABLE_RUNTIME && flag_pic) \
{ \
fprintf (FILE, "\taddil LT%%%s,%%r19\n", lab); \
fprintf (FILE, "\tldw RT%%%s(%%r1),%%r22\n", lab); \
fprintf (FILE, "\tldw 0(%%sr0,%%r22),%%r22\n"); \
fprintf (FILE, "\tbb,>=,n %%r22,30,.+16\n"); \
fprintf (FILE, "\tdepi 0,31,2,%%r22\n"); \
fprintf (FILE, "\tldw 4(%%sr0,%%r22),%%r19\n"); \
fprintf (FILE, "\tldw 0(%%sr0,%%r22),%%r22\n"); \
fprintf (FILE, "\tldsid (%%sr0,%%r22),%%r1\n\tmtsp %%r1,%%sr0\n"); \
fprintf (FILE, "\tbe 0(%%sr0,%%r22)\n\tldo "); \
fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, DELTA); \
fprintf (FILE, "(%%r26),%%r26\n"); \
} \
else \
{ \
fprintf (FILE, "\tb %s\n\tldo ", target_name); \
fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, DELTA); \
fprintf (FILE, "(%%r26),%%r26\n"); \
} \
} \
else \
{ \
if (! TARGET_64BIT && ! TARGET_PORTABLE_RUNTIME && flag_pic) \
{ \
fprintf (FILE, "\taddil L%%"); \
fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, DELTA); \
fprintf (FILE, ",%%r26\n\tldo R%%"); \
fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, DELTA); \
fprintf (FILE, "(%%r1),%%r26\n"); \
fprintf (FILE, "\taddil LT%%%s,%%r19\n", lab); \
fprintf (FILE, "\tldw RT%%%s(%%r1),%%r22\n", lab); \
fprintf (FILE, "\tldw 0(%%sr0,%%r22),%%r22\n"); \
fprintf (FILE, "\tbb,>=,n %%r22,30,.+16\n"); \
fprintf (FILE, "\tdepi 0,31,2,%%r22\n"); \
fprintf (FILE, "\tldw 4(%%sr0,%%r22),%%r19\n"); \
fprintf (FILE, "\tldw 0(%%sr0,%%r22),%%r22\n"); \
fprintf (FILE, "\tldsid (%%sr0,%%r22),%%r1\n\tmtsp %%r1,%%sr0\n"); \
fprintf (FILE, "\tbe,n 0(%%sr0,%%r22)\n"); \
} \
else \
{ \
fprintf (FILE, "\taddil L%%"); \
fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, DELTA); \
fprintf (FILE, ",%%r26\n\tb %s\n\tldo R%%", target_name); \
fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, DELTA); \
fprintf (FILE, "(%%r1),%%r26\n"); \
} \
} \
fprintf (FILE, "\t.EXIT\n\t.PROCEND\n"); \
if (! TARGET_64BIT && ! TARGET_PORTABLE_RUNTIME && flag_pic) \
{ \
data_section (); \
fprintf (FILE, "\t.align 4\n"); \
ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTHN", current_thunk_number); \
fprintf (FILE, "\t.word P%%%s\n", target_name); \
function_section (THUNK_FNDECL); \
} \
current_thunk_number++; \
}
#define FUNCTION_PROFILER(FILE, LABEL)
#define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
void hppa_profile_hook PARAMS ((int label_no));
#define PROFILE_BEFORE_PROLOGUE 1
extern int may_call_alloca;
#define EXIT_IGNORE_STACK \
(get_frame_size () != 0 \
|| current_function_calls_alloca || current_function_outgoing_args_size)
#define TRAMPOLINE_TEMPLATE(FILE) \
{ \
if (! TARGET_64BIT) \
{ \
fputs ("\tldw 36(%r22),%r21\n", FILE); \
fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
if (ASSEMBLER_DIALECT == 0) \
fputs ("\tdepi 0,31,2,%r21\n", FILE); \
else \
fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
fputs ("\tldw 4(%r21),%r19\n", FILE); \
fputs ("\tldw 0(%r21),%r21\n", FILE); \
fputs ("\tldsid (%r21),%r1\n", FILE); \
fputs ("\tmtsp %r1,%sr0\n", FILE); \
fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
fputs ("\tldw 40(%r22),%r29\n", FILE); \
fputs ("\t.word 0\n", FILE); \
fputs ("\t.word 0\n", FILE); \
fputs ("\t.word 0\n", FILE); \
fputs ("\t.word 0\n", FILE); \
} \
else \
{ \
fputs ("\t.dword 0\n", FILE); \
fputs ("\t.dword 0\n", FILE); \
fputs ("\t.dword 0\n", FILE); \
fputs ("\t.dword 0\n", FILE); \
fputs ("\tmfia %r31\n", FILE); \
fputs ("\tldd 24(%r31),%r1\n", FILE); \
fputs ("\tldd 24(%r1),%r27\n", FILE); \
fputs ("\tldd 16(%r1),%r1\n", FILE); \
fputs ("\tbve (%r1)\n", FILE); \
fputs ("\tldd 32(%r31),%r31\n", FILE); \
fputs ("\t.dword 0 ; fptr\n", FILE); \
fputs ("\t.dword 0 ; static link\n", FILE); \
} \
}
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
if (! TARGET_64BIT) \
{ \
rtx start_addr, end_addr; \
\
start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
start_addr = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (TRAMP)); \
start_addr = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
emit_move_insn (gen_rtx_MEM (Pmode, start_addr), \
gen_rtx_REG (Pmode, 19)); \
\
start_addr = force_reg (Pmode, (TRAMP)); \
end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
emit_insn (gen_dcacheflush (start_addr, end_addr)); \
end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
} \
else \
{ \
rtx start_addr, end_addr; \
\
start_addr = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
start_addr = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
\
end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
end_addr = gen_rtx_REG (Pmode, 27); \
start_addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
\
start_addr = force_reg (Pmode, (TRAMP)); \
end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
emit_insn (gen_dcacheflush (start_addr, end_addr)); \
end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
} \
}
#define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
#define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs ()
#define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
hppa_va_start (stdarg, valist, nextarg)
#define EXPAND_BUILTIN_VA_ARG(valist, type) \
hppa_va_arg (valist, type)
#define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
#define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
#define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
#define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
#define REGNO_OK_FOR_INDEX_P(REGNO) \
((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
#define REGNO_OK_FOR_BASE_P(REGNO) \
((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
#define REGNO_OK_FOR_FP_P(REGNO) \
(FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
#define MAX_REGS_PER_ADDRESS 2
#define CONSTANT_ADDRESS_P(X) \
((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
|| GET_CODE (X) == HIGH) \
&& (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
#ifndef NEW_HP_ASSEMBLER
#define NEW_HP_ASSEMBLER 0
#endif
#define LEGITIMATE_CONSTANT_P(X) \
((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
|| (X) == CONST0_RTX (GET_MODE (X))) \
&& (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \
&& !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \
&& !(TARGET_64BIT && GET_CODE (X) == CONST_INT \
&& !(HOST_BITS_PER_WIDE_INT <= 32 \
|| (INTVAL (X) >= (HOST_WIDE_INT) -32 << 31 \
&& INTVAL (X) < (HOST_WIDE_INT) 32 << 31) \
|| cint_ok_for_move (INTVAL (X)))) \
&& !function_label_operand (X, VOIDmode))
#define IS_RELOADING_PSEUDO_P(OP) \
((reload_in_progress \
&& GET_CODE (OP) == REG \
&& REGNO (OP) >= FIRST_PSEUDO_REGISTER \
&& reg_renumber [REGNO (OP)] < 0))
#define EXTRA_CONSTRAINT(OP, C) \
((C) == 'Q' ? \
(IS_RELOADING_PSEUDO_P (OP) \
|| (GET_CODE (OP) == MEM \
&& (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
|| reload_in_progress) \
&& ! symbolic_memory_operand (OP, VOIDmode) \
&& !(GET_CODE (XEXP (OP, 0)) == PLUS \
&& (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
|| GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
: ((C) == 'R' ? \
(GET_CODE (OP) == MEM \
&& GET_CODE (XEXP (OP, 0)) == PLUS \
&& (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
|| GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
&& (move_operand (OP, GET_MODE (OP)) \
|| memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
|| reload_in_progress)) \
: ((C) == 'T' ? \
(GET_CODE (OP) == MEM \
\
&& memory_address_p ((TARGET_PA_20 \
? GET_MODE (OP) \
: DFmode), \
XEXP (OP, 0)) \
&& !(GET_CODE (XEXP (OP, 0)) == PLUS \
&& (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
|| GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
: ((C) == 'U' ? \
(GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
: ((C) == 'A' ? \
(GET_CODE (OP) == MEM \
&& GET_CODE (XEXP (OP, 0)) == LO_SUM \
&& GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
&& REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
&& GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \
&& GET_MODE (XEXP (OP, 0)) == Pmode) \
: ((C) == 'S' ? \
(GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))))
#ifndef REG_OK_STRICT
#define REG_OK_FOR_INDEX_P(X) \
(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
#define REG_OK_FOR_BASE_P(X) \
(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
#else
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
#endif
#define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
#define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
#define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
#define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
#define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
#define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
#define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
#define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ \
if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
|| ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
|| GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
&& REG_P (XEXP (X, 0)) \
&& REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
goto ADDR; \
else if (GET_CODE (X) == PLUS) \
{ \
rtx base = 0, index = 0; \
if (REG_P (XEXP (X, 0)) \
&& REG_OK_FOR_BASE_P (XEXP (X, 0))) \
base = XEXP (X, 0), index = XEXP (X, 1); \
else if (REG_P (XEXP (X, 1)) \
&& REG_OK_FOR_BASE_P (XEXP (X, 1))) \
base = XEXP (X, 1), index = XEXP (X, 0); \
if (base != 0) \
if (GET_CODE (index) == CONST_INT \
&& ((INT_14_BITS (index) \
&& (TARGET_SOFT_FLOAT \
|| (TARGET_PA_20 \
&& ((MODE == SFmode \
&& (INTVAL (index) % 4) == 0)\
|| (MODE == DFmode \
&& (INTVAL (index) % 8) == 0)))\
|| ((MODE) != SFmode && (MODE) != DFmode))) \
|| INT_5_BITS (index))) \
goto ADDR; \
if (! TARGET_SOFT_FLOAT \
&& ! TARGET_DISABLE_INDEXING \
&& base \
&& ((MODE) == SFmode || (MODE) == DFmode) \
&& GET_CODE (index) == MULT \
&& GET_CODE (XEXP (index, 0)) == REG \
&& REG_OK_FOR_BASE_P (XEXP (index, 0)) \
&& GET_CODE (XEXP (index, 1)) == CONST_INT \
&& INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\
goto ADDR; \
} \
else if (GET_CODE (X) == LO_SUM \
&& GET_CODE (XEXP (X, 0)) == REG \
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
&& CONSTANT_P (XEXP (X, 1)) \
&& (TARGET_SOFT_FLOAT \
\
|| (TARGET_PA_20 \
&& GET_CODE (XEXP (X, 1)) != CONST_INT)\
|| ((MODE) != SFmode \
&& (MODE) != DFmode))) \
goto ADDR; \
else if (GET_CODE (X) == LO_SUM \
&& GET_CODE (XEXP (X, 0)) == SUBREG \
&& GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
&& REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
&& CONSTANT_P (XEXP (X, 1)) \
&& (TARGET_SOFT_FLOAT \
\
|| (TARGET_PA_20 \
&& GET_CODE (XEXP (X, 1)) != CONST_INT)\
|| ((MODE) != SFmode \
&& (MODE) != DFmode))) \
goto ADDR; \
else if (GET_CODE (X) == LABEL_REF \
|| (GET_CODE (X) == CONST_INT \
&& INT_5_BITS (X))) \
goto ADDR; \
\
else if (GET_CODE (X) == LO_SUM \
&& GET_CODE (XEXP (X, 0)) == REG \
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
&& GET_CODE (XEXP (X, 1)) == UNSPEC \
&& (TARGET_SOFT_FLOAT \
|| TARGET_PA_20 \
|| ((MODE) != SFmode \
&& (MODE) != DFmode))) \
goto ADDR; \
}
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
do { \
int offset, newoffset, mask; \
rtx new, temp = NULL_RTX; \
\
mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
? (TARGET_PA_20 ? 0x3fff : 0x1f) : 0x3fff); \
\
if (optimize \
&& GET_CODE (AD) == PLUS) \
temp = simplify_binary_operation (PLUS, Pmode, \
XEXP (AD, 0), XEXP (AD, 1)); \
\
new = temp ? temp : AD; \
\
if (optimize \
&& GET_CODE (new) == PLUS \
&& GET_CODE (XEXP (new, 0)) == REG \
&& GET_CODE (XEXP (new, 1)) == CONST_INT) \
{ \
offset = INTVAL (XEXP ((new), 1)); \
\
\
if ((offset & mask) >= ((mask + 1) / 2)) \
newoffset = (offset & ~mask) + mask + 1; \
else \
newoffset = offset & ~mask; \
\
if (newoffset != 0 \
&& VAL_14_BITS_P (newoffset)) \
{ \
\
temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
GEN_INT (newoffset)); \
AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
(OPNUM), (TYPE)); \
goto WIN; \
} \
} \
} while (0)
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
{ rtx orig_x = (X); \
(X) = hppa_legitimize_address (X, OLDX, MODE); \
if ((X) != orig_x && memory_address_p (MODE, X)) \
goto WIN; }
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
if (GET_CODE (ADDR) == PRE_DEC \
|| GET_CODE (ADDR) == POST_DEC \
|| GET_CODE (ADDR) == PRE_INC \
|| GET_CODE (ADDR) == POST_INC) \
goto LABEL
#define SELECT_RTX_SECTION(MODE,RTX,ALIGN) \
if (symbolic_operand (RTX, MODE)) \
data_section (); \
else \
readonly_data_section ();
#define SELECT_SECTION(EXP,RELOC,ALIGN) \
if (TREE_CODE (EXP) == VAR_DECL \
&& TREE_READONLY (EXP) \
&& !TREE_THIS_VOLATILE (EXP) \
&& DECL_INITIAL (EXP) \
&& (DECL_INITIAL (EXP) == error_mark_node \
|| TREE_CONSTANT (DECL_INITIAL (EXP))) \
&& !RELOC) \
readonly_data_section (); \
else if (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'c' \
&& !(TREE_CODE (EXP) == STRING_CST && flag_writable_strings) \
&& !RELOC) \
readonly_data_section (); \
else \
data_section ();
#define TEXT_SPACE_P(DECL)\
(TREE_CODE (DECL) == FUNCTION_DECL \
|| (TREE_CODE (DECL) == VAR_DECL \
&& TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
&& (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
&& !flag_pic) \
|| (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \
&& !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
#define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
#define ENCODE_SECTION_INFO(DECL)\
do \
{ if (TEXT_SPACE_P (DECL)) \
{ rtx _rtl; \
if (TREE_CODE (DECL) == FUNCTION_DECL \
|| TREE_CODE (DECL) == VAR_DECL) \
_rtl = DECL_RTL (DECL); \
else \
_rtl = TREE_CST_RTL (DECL); \
SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
if (TREE_CODE (DECL) == FUNCTION_DECL) \
hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
} \
} \
while (0)
#define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
(VAR) = ((SYMBOL_NAME) \
+ (*(SYMBOL_NAME) == '*' || *(SYMBOL_NAME) == '@'))
#define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode)
#define ADDR_VEC_ALIGN(ADDR_VEC) 2
#define DEFAULT_SIGNED_CHAR 1
#define MOVE_MAX 8
#define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
#define SLOW_BYTE_ACCESS 1
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
#define STORE_FLAG_VALUE 1
#define PROMOTE_PROTOTYPES 1
#define PROMOTE_FUNCTION_RETURN 1
#define Pmode word_mode
#define EXTRA_CC_MODES CC(CCFPmode, "CCFP")
#define SELECT_CC_MODE(OP,X,Y) \
(GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
#define FUNCTION_MODE SImode
#define NO_FUNCTION_CSE
#define SHIFT_COUNT_TRUNCATED 1
#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
case CONST_INT: \
if (INTVAL (RTX) == 0) return 0; \
if (INT_14_BITS (RTX)) return 1; \
case HIGH: \
return 2; \
case CONST: \
case LABEL_REF: \
case SYMBOL_REF: \
return 4; \
case CONST_DOUBLE: \
if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \
&& OUTER_CODE != SET) \
return 0; \
else \
return 8;
#define ADDRESS_COST(RTX) \
(GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
(CLASS1 == SHIFT_REGS ? 0x100 \
: FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
: FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
: 2)
#define RTX_COSTS(X,CODE,OUTER_CODE) \
case MULT: \
if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
return COSTS_N_INSNS (3); \
return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
case DIV: \
if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
return COSTS_N_INSNS (14); \
case UDIV: \
case MOD: \
case UMOD: \
return COSTS_N_INSNS (60); \
case PLUS: \
case MINUS: \
if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
return COSTS_N_INSNS (3); \
return COSTS_N_INSNS (1); \
case ASHIFT: \
case ASHIFTRT: \
case LSHIFTRT: \
return COSTS_N_INSNS (1);
#define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
LENGTH += pa_adjust_insn_length (INSN, LENGTH);
#define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
#define ASM_APP_ON ""
#define ASM_APP_OFF ""
#define ASM_FILE_END(FILE) output_deferred_plabels (FILE)
#define ASM_OUTPUT_LABEL(FILE, NAME) \
do { assemble_name (FILE, NAME); \
fputc ('\n', FILE); } while (0)
#define ASM_OUTPUT_LABELREF(FILE,NAME) \
fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
{fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
#define ASM_GLOBALIZE_LABEL(FILE, NAME) \
do { \
\
if (! FUNCTION_NAME_P (NAME)) \
{ \
fputs ("\t.EXPORT ", FILE); \
assemble_name (FILE, NAME); \
fputs (",DATA\n", FILE); \
} \
} while (0)
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
output_ascii ((FILE), (P), (SIZE))
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
if (TARGET_BIG_SWITCH) \
fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \
else \
fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
#define JUMP_TABLES_IN_TEXT_SECTION 1
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
if (TARGET_BIG_SWITCH) \
fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \
else \
fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
fprintf (FILE, "\t.blockz %d\n", (SIZE))
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
{ bss_section (); \
assemble_name ((FILE), (NAME)); \
fputs ("\t.comm ", (FILE)); \
fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
{ bss_section (); \
fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
assemble_name ((FILE), (NAME)); \
fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
{ register rtx addr = ADDR; \
register rtx base; \
int offset; \
switch (GET_CODE (addr)) \
{ \
case REG: \
fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
break; \
case PLUS: \
if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
else \
abort (); \
fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]); \
break; \
case LO_SUM: \
if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
fputs ("R'", FILE); \
else if (flag_pic == 0) \
fputs ("RR'", FILE); \
else \
fputs ("RT'", FILE); \
output_global_address (FILE, XEXP (addr, 1), 0); \
fputs ("(", FILE); \
output_operand (XEXP (addr, 0), 0); \
fputs (")", FILE); \
break; \
case CONST_INT: \
fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); \
fprintf (FILE, "(%%r0)"); \
break; \
default: \
output_addr_const (FILE, addr); \
}}
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
(return_addr_rtx (COUNT, FRAMEADDR))
#define MASK_RETURN_ADDR \
\
(GEN_INT (-4))
#define JMP_BUF_SIZE 50
#define FUNCTION_OK_FOR_SIBCALL(DECL) \
(DECL \
&& ! TARGET_64BIT \
&& ! TREE_PUBLIC (DECL))
#define PREDICATE_CODES \
{"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
{"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
CONST_DOUBLE, CONST, HIGH, CONSTANT_P_RTX}}, \
{"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
{"symbolic_memory_operand", {SUBREG, MEM}}, \
{"reg_before_reload_operand", {REG, MEM}}, \
{"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
{"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, MEM, CONST_INT, \
CONST_DOUBLE}}, \
{"move_operand", {SUBREG, REG, CONSTANT_P_RTX, CONST_INT, MEM}}, \
{"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
{"pic_label_operand", {LABEL_REF, CONST}}, \
{"fp_reg_operand", {REG}}, \
{"arith_operand", {SUBREG, REG, CONST_INT}}, \
{"arith11_operand", {SUBREG, REG, CONST_INT}}, \
{"pre_cint_operand", {CONST_INT}}, \
{"post_cint_operand", {CONST_INT}}, \
{"arith_double_operand", {SUBREG, REG, CONST_DOUBLE}}, \
{"ireg_or_int5_operand", {CONST_INT, REG}}, \
{"int5_operand", {CONST_INT}}, \
{"uint5_operand", {CONST_INT}}, \
{"int11_operand", {CONST_INT}}, \
{"uint32_operand", {CONST_INT, \
HOST_BITS_PER_WIDE_INT > 32 ? 0 : CONST_DOUBLE}}, \
{"arith5_operand", {SUBREG, REG, CONST_INT}}, \
{"and_operand", {SUBREG, REG, CONST_INT}}, \
{"ior_operand", {CONST_INT}}, \
{"lhs_lshift_cint_operand", {CONST_INT}}, \
{"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
{"arith32_operand", {SUBREG, REG, CONST_INT}}, \
{"pc_or_label_operand", {PC, LABEL_REF}}, \
{"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
{"shadd_operand", {CONST_INT}}, \
{"basereg_operand", {REG}}, \
{"div_operand", {REG, CONST_INT}}, \
{"ireg_operand", {REG}}, \
{"cmpib_comparison_operator", {EQ, NE, LT, LE, LEU, \
GT, GTU, GE}}, \
{"movb_comparison_operator", {EQ, NE, LT, GE}},