ChangeLog.AltiVec   [plain text]


Wed Dec 15 13:04:02 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* dwarf2out.c (expand_builtin_dwarf_reg_size): Fix a
	gratuitous abort resulting from more register classes.

	* c-typeck.c (set_init_label): Update constructor_unfilled_fields
	to correct a problem with labeled elements of initializers.

	* version.c: Update to moto-1.6.  Update to 2.95.2.

Thu Dec  9 12:29:04 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* function.c (FRAME_ALIGN_MOD): Add offset and size parameters.
	* rs6000.h (FRAME_ALIGN_MOD): Fix the test for no stack.
	* rs6000.c (rs6000_stack_info): Compute save_size after
	align_size.  This fixes an overlap bug uncovered with the frame
	size change.

Mon Dec  6 10:38:43 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* rs6000.c (output_prolog): Fix the register restore code in the
	prolog for the case of saving the parameters to main and having a
	large stack frame.

	* version.c: Update to moto-1.5.

Mon Nov 1 11:00:04 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* stor-layout.c (int_mode_for_mode): Add MODE_VECTOR.

	* version.c: Update to moto-1.4.

Thu Oct 21 11:18:54 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* rs6000.c (first_vector_reg_to_save): Ignore regs_ever_live if
	-fvec wasn't specified.  This can happen with C++ exception handling.

Tue Sep 21 13:23:21 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* rs6000.h (LEGITIMATE_LO_SUM_ADDRESS_P): Vector addressing can
	only be zero offset.
	(LEGITIMIZE_ADDRESS): Ditto.  Update for 2.95.1.
	(LEGITIMIZE_RELOAD_ADDRESS): Ditto.  Update for 2.95.1.

	* c-typeck.c (process_init_element): Work around a bug in
	output_pending_init_elements for an initilzer for a type like
		struct { unsigned m1:1; unsigned :0; int m3:4; };
	For a record type, mark the next field as not yet filled.

	* version.c: Update to moto-1.3.

Mon Sep 13 16:56:30 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* version.c: Update to moto-1.2.

Wed Aug 25 08:10:46 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* version.c: Update to moto-1.1.

Wed Aug 12 09:57:03 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* c-parse.y (cast_expr): Handle vector constants and C casts
	when -pedantic is used.

Mon Jun 14 10:59:50 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* version.c: Add moto-1.0 to version number.

Wed Apr 14 09:42:00 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* c-decl.c, cp/decl.c (grokdeclarator): Implement the new
	vector types vector {signed,unsigned,bool} int.

Tue Mar 23 09:12:05 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* config/rs6000/builtin.ops: Add attributes for the insn names
	used by vec_abs and vec_abss.
	* config/rs6000/ops-to-gp: Identify vec_abs, vec_abss,
	vec_cmplt, and vec_cmple with an optimize attribute.
	* config/rs6000/vec.h: Rebuild with the command
	"ops-to-gp -gcc vec.ops builtin.ops".
	* config/rs6000/vec.ops: Add vec_abs, vec_abss, vec_cmplt, and
	vec_cmple.  Mark vec_dss and vec_dssall as a
	volatile_void_load_op.
	* gcc.c (default_compilers): Change the predefined value of
	__VEC__ from 10202 to 10205.
	* rs6000.c (builtin_optimize): Add BUILTIN_cmp_reverse, and
	BUILTIN_abs.
	(expand_target_intrinsic): Swap the two operands of
	BUILTIN_cmp_reverse.  Construct the instruction sequence for
	BUILTIN_abs.
	* rs6000.md (vlfD_load, vlf_load): New names to be consistent
	with vec.ops changes.

Tue Mar 15 09:08:15 1999  Tom Wood  <twood@ncct.sps.mot.com>

	* rs6000.c (easy_vector_constant): Add the computation of
	vspltisw v,1 as vsubcuw v,v,v (i.e. 4 values of 1).
	* rs6000.md (vone): New insn.
	(movsv): Add a case for gen_vone.

Mon Dec 14 10:51:02 1998  Tom Wood  <twood@ncct.sps.mot.com>

	* rs6000.h (EXTRA_CONSTANT_CONSTRAINTS): Define.
	* recog.c (constrain_operands): Add new constraint letters A-D when
	EXTRA_CONSTANT_CONSTRAINTS is defined.
	* reg-stack.c (constrain_asm_operands): Ditto.
	* regclass.c (record_reg_classes): Ditto.
	* reload.c (find_reloads): Ditto.

Wed Aug 12 09:57:02 1998  Tom Wood  <twood@ncct.sps.mot.com>

	* c-parse.gperf: Add bool, __vector, __pixel, and vec_step.
	* cp/gxx.gperf: Add __vector, __pixel, and vec_step.
	* c-gperf.h, hash.h: Corresponding changes.
	* c-lex.h, cp/lex.h (RID_BOOL, RID_PIXEL, RID_VECTOR): New keywords.
	* c-lex.c, cp/lex.c (init_lex): Initialized rid pointers for vector
	and pixel.  Unset the new reserved words unless -fvec is used.

	* tree.def (VECTOR_TYPE, VECTOR_CST): New tree codes.
	* tree.h (VECTOR_CST_{LOW,HIGH,0,1,2,3}): New macros.
	(struct tree_vector): Layout of VECTOR_CST.
	* typeclass.h (enum type_class): Add vector_type_class for the
	__builtin_classify_type interface.

	* cp/error.c (dump_type, dump_type_prefix, dump_type_suffix):
	Handle VECTOR_TYPE.
	* cp/method.c (build_overload_name): Ditto.
	* cp/pt.c (use_template_parms, tsubst, unify): Ditto.
	* stor-layout.c (layout_type): Ditto.
	* expr.c (expand_builtin, BUILT_IN_CLASSIFY_TYPE,
	bc_runtime_type_code): Ditto.
	* c-typeck.c (digest_init): Ditto.
	* cp/typeck2.c (digest_init): Ditto.
	* c-convert.c (convert): Ditto.
	* dbxout.c (dbxout_type): Ditto.
	* dwarf2out.c (is_base_type): Ditto.
	* dwarfout.c (type_is_fundamental): Ditto.
	* varasm.c (output_constant): Ditto.

	* cp/tree.c (mapcar): Handle VECTOR_CST.
	* fold-const.c (operand_equal_p, fold): Ditto.
	* print-tree.c (print_node): Ditto.
	* expr.c (is_zeros_p, expand_expr): Ditto.
	* c-typeck.c (initializer_constant_valid_p): Ditto.
	* cp/typeck2.c (initializer_constant_valid_p): Ditto.
	* c-common.c (constant_expression_warning, overflow_warning): Ditto.
	* varasm.c (decode_addr_const, const_hash, compare_constant_1,
	record_constant_1, copy_constant): Ditto.

	* tree.c (build_vector): New function.

	* machmode.def (SVmode): New mode.
	* machmode.h (MODE_VECTOR): New mode classe.
	* expr.c (apply_result_size): Check for use of SVmode.
	* varasm.c (output_constant_pool): Handle MODE_VECTOR.

	* c-decl.c, cp/decl.c, f/com.c (vector_unsigned_char_type_node,
	vector_signed_char_type_node, vector_boolean_char_type_node,
	vector_unsigned_short_type_node, vector_signed_short_type_node,
	vector_boolean_short_type_node, vector_unsigned_long_type_node,
	vector_signed_long_type_node, vector_boolean_long_type_node,
	vector_float_type_node, vector_pixel_type_node): New variables.
	(init_decl_processing): Initialize them.
	* c-tree.h, cp/tree.h: Declare them.

	* c-decl.c, cp/decl2.c (flag_vec): New variable.
	* c-tree.h (flag_vec): Declare it.
	* c-decl.c (c_decode_option): Add -fvec, -fno-vec.
	* cp/decl2.c (lang_f_options): Ditto.
	* toplev.c (lang_options): Ditto.
	* c-decl.c, cp/decl.c (grokdeclarator): Check for combinations of
	types involving __vector, __pixel, and bool.
	* c-decl.c (grokdeclarator): Implement a lone bool as equivalent
	to int.

	* c-parse.y (VEC_STEP): New token.
	(last_compount_expr, last_compound_list): New variables.
	(expr: nonnull_exprlist): Record these values.
	(unary_expr): Parse vec_step.
	(cast_expr): Handle vector constants and C casts.
	* cp/parse.y (VEC_STEP: New token.
	(unary_expr): Parse vec_step.
	(cast_expr): Handle vector constants and C casts.
	* cp/decl2.c (reparse_absdcl_as_casts_or_vector_constant,
	is_vector_constant_list, is_vector_constant_element): New
	functions.

	* c-decl.c (init_decl_processing): Use INIT_TARGET_INTRINSIC to
	declare the target-specific builtin functions.

	* c-decl.c, cp/decl.c, f/com.c (lang_builtin_function,
	lang_comptypes, lang_build_type_variant): Implement new interfaces.

	* c-typeck.c (build_vector_constant, c_vec_step, c_vec_step_expr):
	New functions.
	(build_function_call): Check for an overloaded, target-specific,
	builtin function.  Use SELECT_TARGET_OVERLOAD_INTRINSIC to choose
	the overload if any.
	(convert_arguments): Ensure that a prototype is present if any
	argument is a vector type.
	(convert_for_assignment): Some builtin functions allow const and
	volatile and do not discard their meaning.
	* cp/typeck.c (c_vec_step, c_vec_step_expr,
	build_vector_constant): New functions.
	(build_function_call_real): Check for an overloaded, target-specific,
	builtin function.  Use SELECT_TARGET_OVERLOAD_INTRINSIC to choose
	the overload if any.
	(convert_for_assignment): Some builtin functions allow const and
	volatile and do not discard their meaning.
	* expr.c (expand_builtin): Use EXPAND_TARGET_INTRINSIC to handle
	a target-specific, builtin function.

	* tree.h (BUILT_IN_{FIRST,LAST}_TARGET_OVERLOADED_INTRINSIC,
	BUILT_IN_{FIRST,LAST}_TARGET_INTRINSIC): New builtin function
	codes.
	(DECL_TARGET_INTRINSIC_P, DECL_TARGET_OVERLOADED_INTRINSIC_P): New
	macros.

	* convert.c (convert_to_vector): New function.
	* cp/cvt.c (ocp_convert): New function.

	* rtl.def (CONST_VECTOR): New node.
	* rtl.h (CONSTANT_P): True for a CONST_VECTOR.
	(SYMBOL_REF_FLAG2): Second flag in a SYMBOL_REF used for
	machine-specific purposes.
	* real.h (CONST_VECTOR_{1,2,3,4}): New macros to access elements
	of a CONST_VECTOR.
	(CONST_VECTOR_CHAIN, CONST_VECTOR_MEM): New access macros.
	* cse.c (cannon_hash): Handle CONST_VECTOR.
	* varasm.c (clear_const_double_mem, decode_rtx_const): Ditto.
	* varasm.c (immed_vector_const): New function.
	(RTX_VECTOR): New rtx_const kind.
	(struct rtx_const): Add vector.

	* calls.c (struct arg_data): Add no_stack_slot member.
	(expand_call): Use REARRANGE_ARG_LIST to allow the machine to
	reorder the parameters to a function call.  Use
	NO_REG_PARM_STACK_SPACE to indicate that some parameters do not
	occupy a stack slot even if others do.

	* function.c (FRAME_ALIGN_MOD, FUNCTION_ARG_MOD_BOUNDARY): New
	interfaces.
	(assign_stack_local, assign_outer_stack_local): Use
	FRAME_ALIGN_MOD.
	(instantiate_decl): Allow MODE_VECTOR to have more limited
	addressing modes.
	(assign_parms): Use REARRANGE_ARG_LIST to allow the machine to
	reorder the parameters to a function call.  Use
	NO_REG_PARM_STACK_SPACE to indicate that some parameters do not
	occupy a stack slot even if others do.
	(locate_and_pad_parm): Use FUNCTION_ARG_MOD_BOUNDARY.
	(pad_to_arg_alignment): Add a mod_boundary parameter.

	* recog.c (constrain_operands): Add new constraint letters A-D.
	* reg-stack.c (constrain_asm_operands): Ditto.
	* regclass.c (record_reg_classes): Ditto.
	* reload.c (find_reloads): Ditto.

	* gcc.c (default_compilers): If -fvec is specified, add predefines
	for vector, pixel, and __VEC__.

	* ginclude/ppc-asm.h: Add vector register names v0-v31.  Fix the
	macros for writing functions in assembler.
	* ginclude/stdarg.h, ginclude/varargs.h: Use va-ppc.h when _AIX is
	defined.
	* ginclude/va-ppc.h: Add a section for _AIX.  Add support for
	vector types.

	* rs6000.h (STACK_BOUNDARY): Should be 128 bits.
	(BIGGEST_ALIGNMENT): Now 128 bits.
	(ASM_OUTPUT_ALIGNED_COMMON): Check for 128-bit alignment.
	(ASM_OUTPUT_ALIGNED_LOCAL): Use the extended .lcomm syntax when
	128-bit alignment is required.
	(ASM_CPU_SPEC): Pass -mvec if -fvec is used.
	(FIRST_PSEUDO_REGISTER, FIXED_REGISTERS, CALL_USED_REGISTERS,
	REG_ALLOC_ORDER, HARD_REGNO_NREGS, HARD_REGNO_MODE_OK,
	MODES_TIEABLE_P, REGISTER_MOVE_COST, enum reg_class, REG_CLASS_NAMES,
	REG_CLASS_CONTENTS, REGNO_REG_CLASS, REG_CLASS_FROM_LETTER,
	REGISTER_NAMES, DEBUG_REGISTER_NAMES, ADDITIONAL_REGISTER_NAMES):
	Add the 32 vector registers and the VRsave register.
	(CONST_OK_FOR_LETTER_P): Add A, B, C, and D for new constant
	ranges.
	(struct rs6000_stack): Add support for the vector registers and
	the VRsave register.
	(CUMULATIVE_ARGS): More data to handle vector conventions.
	(REARRANGE_ARG_LIST): New macro.
	(RS6000_VARARGS_SIZE, RS6000_VARARGS_OFFSET, STARTING_FRAME_OFFSET,
	STACK_DYNAMIC_OFFSET): Round to 0 mod 16 so
	 the stack elements stay aligned.
	({BEGIN,END}_EXPAND_INLINE_FUNCTION): New macros.
	(FRAME_ALIGN_MOD): Align to 8 mod 16 except when inlining or there's
	 no stack.
	(FUNCTION_ARG_MOD_BOUNDARY): New macro.
	({BEGIN,END}_EXPAND_INLINE_FUNCTION): New macros.
	(NO_REG_PARM_STACK_SPACE): New macro.
	(FUNCTION_VALUE, LIBCALL_VALUE, FUNCTION_VALUE_REGNO_P): Vector
	 values are returned in v2.
	(FUNCTION_ARG_REGNO_P): Vector values are passed in registers.
	(LEGITIMATE_OFFSET_ADDRESS_P, LEGITIMIZE_ADDRESS): Vector addressing
	can only be zero offset.
	(PREDICATE_CODES): Add zero_m1_operand, vector_register_operand,
	any_operand, equality_operator, and vector_comparision_operator.
	(INIT_TARGET_INTRINSIC, SELECT_TARGET_OVERLOADED_INTRINSIC,
	EXPAND_TARGET_INTRINSIC): New macros.

	* rs6000.c (funny_pointer_check, select_target_overloaded_intrinsic,
	expand_target_intrinsic, altivec_ftype, init_target_intrinsic): New
	functions.
	(struct builtin, BUILTIN_...): New struct and access macros.
	(enum builtin_optimize): New enum.
	(struct overloadx, OVERLOAD_...): New struct and access macros.
	(Overload, Builtin): New arrays defined in vec.h.
	(rs6000_reg_names, alt_reg_names, function_arg_boundary): Add the
	32 vector registers and the VRsave register.
	(choose_vec_easy, vector_register_operand, easy_vector_constant,
	zero_m1_operand, rearrange_arg_list, function_arg_mod_boundary,
	function-arg_skip, no_reg_parm_stack_space, equality_operator,
	vector_comparison_operator, first_vector_reg_to_save): New functions.
	(secondary_reload_class): Vector registers can reload other
	vector registers, easy vector constants, and memory.
	(init_cumulative_args, function_arg_advance, function_arg,
	function_arg_partial_nregs, setup_incoming_varargs): Handle vector
	values.
	(direct_return): Check for an vector registers also.
	(gpc_reg_operand): Ditto.

	* config/rs6000/aix41.h (ASM_CPU_SPEC): Pass -mvec if -fvec is used.
	* config/rs6000/sysv4.h ({SAVE,RESTORE}_VECTOR_{PREFIX,SUFFIX}):
	Redefine these.
	(STACK_BOUNDARY, BIGGEST_ALIGNMENT): Now 128 bits.

	* config/rs6000/builtin.ops: New file.
	* config/rs6000/ops-to-gp: New file.
	* config/rs6000/vec.h: New file.
	* config/rs6000/vec.ops: New file.
	* config/rs6000/vrsave.asm: New file.

	* config/rs6000/t-newas, config/rs6000/t-ppccomm,
	config/rs6000/t-rs6000, config/rs6000/t-winnt,
	config/rs6000/t-xnewas, config/rs6000/t-xrs6000: Add a rule for
	vrsave.S.
	(LIB2FUNCS_EXTRA): Add vrsave.S
	(LIBGCC2_INCLUDES): Need ginclude.
	(TARGET_LIBGCC2_CFLAGS): Need -fvec.

	* config/rs6000/rs6000.md: Add the AltiVec function units and
	instruction patterns.  With the vector register class 'v', all
	patterns that allowed 'f' and 'g' now also allow 'v'.  (These are
	all call related patterns).
	(movdf_softfloat32): Add alternatives to copy between registers
	and memory.