#undef SWITCH_TAKES_ARG
#define SWITCH_TAKES_ARG(CHAR) \
(DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
#undef LIB_SPEC
#define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -leval -lgcc --end-group}}"
#undef STARTFILE_SPEC
#undef ENDFILE_SPEC
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
builtin_define ("__iq2000__"); \
builtin_assert ("cpu=iq2000"); \
builtin_assert ("machine=iq2000"); \
} \
while (0)
extern int target_flags;
#define MASK_GPOPT 0x00000008
#define MASK_EMBEDDED_DATA 0x00008000
#define MASK_UNINIT_CONST_IN_RODATA \
0x00800000
#define TARGET_STATS 0
#define TARGET_EMBEDDED_DATA (target_flags & MASK_EMBEDDED_DATA)
#define TARGET_DEBUG_MODE (target_flags & 0)
#define TARGET_DEBUG_A_MODE (target_flags & 0)
#define TARGET_DEBUG_B_MODE (target_flags & 0)
#define TARGET_DEBUG_C_MODE (target_flags & 0)
#define TARGET_DEBUG_D_MODE (target_flags & 0)
#define TARGET_SWITCHES \
{ \
{"no-crt0", 0, \
N_("No default crt0.o") }, \
{"gpopt", MASK_GPOPT, \
N_("Use GP relative sdata/sbss sections")}, \
{"no-gpopt", -MASK_GPOPT, \
N_("Don't use GP relative sdata/sbss sections")}, \
{"embedded-data", MASK_EMBEDDED_DATA, \
N_("Use ROM instead of RAM")}, \
{"no-embedded-data", -MASK_EMBEDDED_DATA, \
N_("Don't use ROM instead of RAM")}, \
{"uninit-const-in-rodata", MASK_UNINIT_CONST_IN_RODATA, \
N_("Put uninitialized constants in ROM (needs -membedded-data)")}, \
{"no-uninit-const-in-rodata", -MASK_UNINIT_CONST_IN_RODATA, \
N_("Don't put uninitialized constants in ROM")}, \
{"", (TARGET_DEFAULT \
| TARGET_CPU_DEFAULT), \
NULL}, \
}
#define TARGET_DEFAULT 0
#ifndef TARGET_CPU_DEFAULT
#define TARGET_CPU_DEFAULT 0
#endif
#ifndef IQ2000_ISA_DEFAULT
#define IQ2000_ISA_DEFAULT 1
#endif
#define TARGET_OPTIONS \
{ \
SUBTARGET_TARGET_OPTIONS \
{ "cpu=", & iq2000_cpu_string, \
N_("Specify CPU for scheduling purposes")}, \
{ "arch=", & iq2000_arch_string, \
N_("Specify CPU for code generation purposes")}, \
}
#define SUBTARGET_TARGET_OPTIONS
#define IQ2000_VERSION "[1.0]"
#ifndef MACHINE_TYPE
#define MACHINE_TYPE "IQ2000"
#endif
#ifndef TARGET_VERSION_INTERNAL
#define TARGET_VERSION_INTERNAL(STREAM) \
fprintf (STREAM, " %s %s", IQ2000_VERSION, MACHINE_TYPE)
#endif
#ifndef TARGET_VERSION
#define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
#endif
#define OVERRIDE_OPTIONS override_options ()
#define CAN_DEBUG_WITHOUT_FP
#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN 1
#define WORDS_BIG_ENDIAN 1
#define LIBGCC2_WORDS_BIG_ENDIAN 1
#define BITS_PER_WORD 32
#define MAX_BITS_PER_WORD 64
#define UNITS_PER_WORD 4
#define MIN_UNITS_PER_WORD 4
#define POINTER_SIZE 32
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
if (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) < 4) \
(MODE) = SImode;
#define PARM_BOUNDARY 32
#define STACK_BOUNDARY 64
#define FUNCTION_BOUNDARY 32
#define BIGGEST_ALIGNMENT 64
#undef DATA_ALIGNMENT
#define DATA_ALIGNMENT(TYPE, ALIGN) \
((((ALIGN) < BITS_PER_WORD) \
&& (TREE_CODE (TYPE) == ARRAY_TYPE \
|| TREE_CODE (TYPE) == UNION_TYPE \
|| TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
#define EMPTY_FIELD_BOUNDARY 32
#define STRUCTURE_SIZE_BOUNDARY 8
#define STRICT_ALIGNMENT 1
#define PCC_BITFIELD_TYPE_MATTERS 1
#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
#define INT_TYPE_SIZE 32
#define SHORT_TYPE_SIZE 16
#define LONG_TYPE_SIZE 32
#define LONG_LONG_TYPE_SIZE 64
#define CHAR_TYPE_SIZE BITS_PER_UNIT
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#define LONG_DOUBLE_TYPE_SIZE 64
#define DEFAULT_SIGNED_CHAR 1
#define FIRST_PSEUDO_REGISTER 33
#define FIXED_REGISTERS \
{ \
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1 \
}
#define CALL_USED_REGISTERS \
{ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1 \
}
#define REG_ALLOC_ORDER \
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 \
}
#define HARD_REGNO_NREGS(REGNO, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
((REGNO_REG_CLASS (REGNO) == GR_REGS) \
? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \
: ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)
#define MODES_TIEABLE_P(MODE1, MODE2) \
((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
== (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
#define AVOID_CCMODE_COPIES
enum reg_class
{
NO_REGS,
GR_REGS,
ALL_REGS,
LIM_REG_CLASSES
};
#define GENERAL_REGS GR_REGS
#define N_REG_CLASSES (int) LIM_REG_CLASSES
#define REG_CLASS_NAMES \
{ \
"NO_REGS", \
"GR_REGS", \
"ALL_REGS" \
}
#define REG_CLASS_CONTENTS \
{ \
{ 0x00000000, 0x00000000 }, \
{ 0xffffffff, 0x00000000 }, \
{ 0xffffffff, 0x00000001 } \
}
#define REGNO_REG_CLASS(REGNO) \
((REGNO) <= GP_REG_LAST + 1 ? GR_REGS : NO_REGS)
#define BASE_REG_CLASS (GR_REGS)
#define INDEX_REG_CLASS NO_REGS
#define REG_CLASS_FROM_LETTER(C) \
((C) == 'd' ? GR_REGS : \
(C) == 'b' ? ALL_REGS : \
(C) == 'y' ? GR_REGS : \
NO_REGS)
#define REGNO_OK_FOR_INDEX_P(regno) 0
#define PREFERRED_RELOAD_CLASS(X,CLASS) \
((CLASS) != ALL_REGS \
? (CLASS) \
: ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
|| GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
? (GR_REGS) \
: ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
|| GET_MODE (X) == VOIDmode) \
? (GR_REGS) \
: (CLASS))))
#define SMALL_REGISTER_CLASSES 0
#define CLASS_MAX_NREGS(CLASS, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \
: (C) == 'J' ? ((VALUE) == 0) \
: (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000) \
: (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0 \
&& (((VALUE) & ~2147483647) == 0 \
|| ((VALUE) & ~2147483647) == ~2147483647)) \
: (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \
&& (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \
&& (((VALUE) & 0x0000ffff) != 0 \
|| (((VALUE) & ~2147483647) != 0 \
&& ((VALUE) & ~2147483647) != ~2147483647))) \
: (C) == 'N' ? ((((VALUE) & 0xffff) == 0xffff) \
|| (((VALUE) & 0xffff0000) == 0xffff0000)) \
: (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x20) < 0x40) \
: 0)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'G' \
&& (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
#define EXTRA_CONSTRAINT(OP,CODE) \
(((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
: FALSE)
#define STACK_GROWS_DOWNWARD
#define STARTING_FRAME_OFFSET \
(current_function_outgoing_args_size)
#define FIRST_PARM_OFFSET(FNDECL) 0
#define RETURN_ADDR_RTX(count, frame) \
(((count) == 0) \
? (leaf_function_p () \
? gen_rtx_REG (Pmode, GP_REG_FIRST + 31) \
: gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, \
RETURN_ADDRESS_POINTER_REGNUM))) \
: (rtx) 0)
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31)
#define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
#define FRAME_POINTER_REGNUM (GP_REG_FIRST + 1)
#define HARD_FRAME_POINTER_REGNUM (GP_REG_FIRST + 27)
#define ARG_POINTER_REGNUM GP_REG_FIRST
#define RETURN_ADDRESS_POINTER_REGNUM RAP_REG_NUM
#define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
#define FRAME_POINTER_REQUIRED 0
#define ELIMINABLE_REGS \
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
{ RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
{ RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 31}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
#define CAN_ELIMINATE(FROM, TO) \
(((FROM) == RETURN_ADDRESS_POINTER_REGNUM && (! leaf_function_p () \
|| (TO == GP_REG_FIRST + 31 && leaf_function_p))) \
|| ((FROM) != RETURN_ADDRESS_POINTER_REGNUM \
&& ((TO) == HARD_FRAME_POINTER_REGNUM \
|| ((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed))))
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = iq2000_initial_elimination_offset ((FROM), (TO))
#define ACCUMULATE_OUTGOING_ARGS 1
#define REG_PARM_STACK_SPACE(FNDECL) 0
#define OUTGOING_REG_PARM_STACK_SPACE
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
function_arg (& CUM, MODE, TYPE, NAMED)
#define MAX_ARGS_IN_REGISTERS 8
typedef struct iq2000_args
{
int gp_reg_found;
unsigned int arg_number;
unsigned int arg_words;
unsigned int fp_arg_words;
int last_arg_fp;
int fp_code;
unsigned int num_adjusts;
struct rtx_def * adjust[MAX_ARGS_IN_REGISTERS * 2];
} CUMULATIVE_ARGS;
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
init_cumulative_args (& CUM, FNTYPE, LIBNAME) \
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
function_arg_advance (& CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_PADDING(MODE, TYPE) \
(! BYTES_BIG_ENDIAN \
? upward \
: (((MODE) == BLKmode \
? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
&& int_size_in_bytes (TYPE) < (PARM_BOUNDARY / BITS_PER_UNIT))\
: (GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY \
&& (GET_MODE_CLASS (MODE) == MODE_INT))) \
? downward : upward))
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
(((TYPE) != 0) \
? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
? PARM_BOUNDARY \
: TYPE_ALIGN(TYPE)) \
: ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
? PARM_BOUNDARY \
: GET_MODE_ALIGNMENT(MODE)))
#define FUNCTION_ARG_REGNO_P(N) \
(((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
#define FUNCTION_VALUE(VALTYPE, FUNC) iq2000_function_value (VALTYPE, FUNC)
#define LIBCALL_VALUE(MODE) \
gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
|| GET_MODE_SIZE (MODE) >= 4) \
? (MODE) \
: SImode), \
GP_RETURN)
#define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN)
#define DEFAULT_PCC_STRUCT_RETURN 0
#define EXIT_IGNORE_STACK 1
#define FUNCTION_PROFILER(FILE, LABELNO) \
{ \
fprintf (FILE, "\t.set\tnoreorder\n"); \
fprintf (FILE, "\t.set\tnoat\n"); \
fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
fprintf (FILE, "\tjal\t_mcount\n"); \
fprintf (FILE, \
"\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from stack\n", \
"subu", \
reg_names[STACK_POINTER_REGNUM], \
reg_names[STACK_POINTER_REGNUM], \
Pmode == DImode ? 16 : 8); \
fprintf (FILE, "\t.set\treorder\n"); \
fprintf (FILE, "\t.set\tat\n"); \
}
#define EXPAND_BUILTIN_VA_START(valist, nextarg) \
iq2000_va_start (valist, nextarg)
#define TRAMPOLINE_TEMPLATE(STREAM) \
{ \
fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
if (Pmode == DImode) \
{ \
fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \
fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \
} \
else \
{ \
fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw $3,20($31)\n"); \
fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw $2,24($31)\n"); \
} \
fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \
fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
}
#define TRAMPOLINE_SIZE (40)
#define TRAMPOLINE_ALIGNMENT 32
#define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
{ \
rtx addr = ADDR; \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 32)), FUNC); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 36)), CHAIN);\
}
#define CONSTANT_ADDRESS_P(X) \
( (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
|| (GET_CODE (X) == CONST)))
#define MAX_REGS_PER_ADDRESS 1
#ifdef REG_OK_STRICT
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ \
if (iq2000_legitimate_address_p (MODE, X, 1)) \
goto ADDR; \
}
#else
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ \
if (iq2000_legitimate_address_p (MODE, X, 0)) \
goto ADDR; \
}
#endif
#define REG_OK_FOR_INDEX_P(X) 0
#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
{ \
rtx xinsn = (X); \
\
if (TARGET_DEBUG_B_MODE) \
{ \
GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \
GO_DEBUG_RTX (xinsn); \
} \
\
if (iq2000_check_split (X, MODE)) \
{ \
X = gen_rtx_LO_SUM (Pmode, \
copy_to_mode_reg (Pmode, \
gen_rtx_HIGH (Pmode, X)), \
X); \
goto WIN; \
} \
\
if (GET_CODE (xinsn) == PLUS) \
{ \
rtx xplus0 = XEXP (xinsn, 0); \
rtx xplus1 = XEXP (xinsn, 1); \
enum rtx_code code0 = GET_CODE (xplus0); \
enum rtx_code code1 = GET_CODE (xplus1); \
\
if (code0 != REG && code1 == REG) \
{ \
xplus0 = XEXP (xinsn, 1); \
xplus1 = XEXP (xinsn, 0); \
code0 = GET_CODE (xplus0); \
code1 = GET_CODE (xplus1); \
} \
\
if (code0 == REG && REG_MODE_OK_FOR_BASE_P (xplus0, MODE) \
&& code1 == CONST_INT && !SMALL_INT (xplus1)) \
{ \
rtx int_reg = gen_reg_rtx (Pmode); \
rtx ptr_reg = gen_reg_rtx (Pmode); \
\
emit_move_insn (int_reg, \
GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \
\
emit_insn (gen_rtx_SET (VOIDmode, \
ptr_reg, \
gen_rtx_PLUS (Pmode, xplus0, int_reg))); \
\
X = plus_constant (ptr_reg, INTVAL (xplus1) & 0x7fff); \
goto WIN; \
} \
} \
\
if (TARGET_DEBUG_B_MODE) \
GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \
}
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
#define LEGITIMATE_CONSTANT_P(X) (1)
#define REGISTER_MOVE_COST(MODE, FROM, TO) 2
#define MEMORY_MOVE_COST(MODE,CLASS,TO_P) \
(TO_P ? 2 : 16)
#define BRANCH_COST 2
#define SLOW_BYTE_ACCESS 1
#define NO_FUNCTION_CSE 1
#define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
if (REG_NOTE_KIND (LINK) != 0) \
(COST) = 0;
#define TEXT_SECTION_ASM_OP "\t.text"
#define DATA_SECTION_ASM_OP "\t.data"
#define ASM_COMMENT_START " #"
#define ASM_APP_ON "#APP\n"
#define ASM_APP_OFF "#NO_APP\n"
#undef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))
#define GLOBAL_ASM_OP "\t.globl\t"
#define REGISTER_NAMES \
{ \
"%0", "%1", "%2", "%3", "%4", "%5", "%6", "%7", \
"%8", "%9", "%10", "%11", "%12", "%13", "%14", "%15", \
"%16", "%17", "%18", "%19", "%20", "%21", "%22", "%23", \
"%24", "%25", "%26", "%27", "%28", "%29", "%30", "%31", "%rap" \
};
#define ADDITIONAL_REGISTER_NAMES \
{ \
{ "%0", 0 + GP_REG_FIRST }, \
{ "%1", 1 + GP_REG_FIRST }, \
{ "%2", 2 + GP_REG_FIRST }, \
{ "%3", 3 + GP_REG_FIRST }, \
{ "%4", 4 + GP_REG_FIRST }, \
{ "%5", 5 + GP_REG_FIRST }, \
{ "%6", 6 + GP_REG_FIRST }, \
{ "%7", 7 + GP_REG_FIRST }, \
{ "%8", 8 + GP_REG_FIRST }, \
{ "%9", 9 + GP_REG_FIRST }, \
{ "%10", 10 + GP_REG_FIRST }, \
{ "%11", 11 + GP_REG_FIRST }, \
{ "%12", 12 + GP_REG_FIRST }, \
{ "%13", 13 + GP_REG_FIRST }, \
{ "%14", 14 + GP_REG_FIRST }, \
{ "%15", 15 + GP_REG_FIRST }, \
{ "%16", 16 + GP_REG_FIRST }, \
{ "%17", 17 + GP_REG_FIRST }, \
{ "%18", 18 + GP_REG_FIRST }, \
{ "%19", 19 + GP_REG_FIRST }, \
{ "%20", 20 + GP_REG_FIRST }, \
{ "%21", 21 + GP_REG_FIRST }, \
{ "%22", 22 + GP_REG_FIRST }, \
{ "%23", 23 + GP_REG_FIRST }, \
{ "%24", 24 + GP_REG_FIRST }, \
{ "%25", 25 + GP_REG_FIRST }, \
{ "%26", 26 + GP_REG_FIRST }, \
{ "%27", 27 + GP_REG_FIRST }, \
{ "%28", 28 + GP_REG_FIRST }, \
{ "%29", 29 + GP_REG_FIRST }, \
{ "%30", 27 + GP_REG_FIRST }, \
{ "%31", 31 + GP_REG_FIRST }, \
{ "%rap", 32 + GP_REG_FIRST }, \
}
#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
final_prescan_insn (INSN, OPVEC, NOPERANDS)
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) iq2000_print_operand_punct[CODE]
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
#define DBR_OUTPUT_SEQEND(STREAM) \
do \
{ \
fputs ("\n", STREAM); \
} \
while (0)
#define LOCAL_LABEL_PREFIX "$"
#define USER_LABEL_PREFIX ""
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
do \
{ \
fprintf (STREAM, "\t%s\t%sL%d\n", \
Pmode == DImode ? ".dword" : ".word", \
LOCAL_LABEL_PREFIX, VALUE); \
} \
while (0)
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
fprintf (STREAM, "\t%s\t%sL%d\n", \
Pmode == DImode ? ".dword" : ".word", \
LOCAL_LABEL_PREFIX, \
VALUE)
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(STREAM,SIZE) \
fprintf (STREAM, "\t.space\t%u\n", (SIZE))
#define ASM_OUTPUT_ALIGN(STREAM,LOG) \
if ((LOG) != 0) \
fprintf (STREAM, "\t.balign %d\n", 1<<(LOG))
#define DEBUGGER_AUTO_OFFSET(X) \
iq2000_debugger_offset (X, (HOST_WIDE_INT) 0)
#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
iq2000_debugger_offset (X, (HOST_WIDE_INT) OFFSET)
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
#define DWARF2_DEBUGGING_INFO 1
#define PREDICATE_CODES \
{"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
{"arith_operand", { REG, CONST_INT, SUBREG }}, \
{"small_int", { CONST_INT }}, \
{"large_int", { CONST_INT }}, \
{"reg_or_0_operand", { REG, CONST_INT, CONST_DOUBLE, SUBREG }}, \
{"simple_memory_operand", { MEM, SUBREG }}, \
{"equality_op", { EQ, NE }}, \
{"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
LTU, LEU }}, \
{"pc_or_label_operand", { PC, LABEL_REF }}, \
{"call_insn_operand", { CONST_INT, CONST, SYMBOL_REF, REG}}, \
{"move_operand", { CONST_INT, CONST_DOUBLE, CONST, \
SYMBOL_REF, LABEL_REF, SUBREG, \
REG, MEM}}, \
{"power_of_2_operand", { CONST_INT }},
#define CASE_VECTOR_MODE SImode
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
#define MOVE_MAX 4
#define MAX_MOVE_MAX 8
#define SHIFT_COUNT_TRUNCATED 1
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
#define STORE_FLAG_VALUE 1
#define Pmode SImode
#define FUNCTION_MODE SImode
extern char call_used_regs[];
enum cmp_type
{
CMP_SI,
CMP_DI,
CMP_SF,
CMP_DF,
CMP_MAX
};
enum delay_type
{
DELAY_NONE,
DELAY_LOAD,
DELAY_FCMP
};
enum processor_type
{
PROCESSOR_DEFAULT,
PROCESSOR_IQ2000,
PROCESSOR_IQ10
};
#define iq2000_cpu_attr ((enum attr_cpu) iq2000_tune)
extern void rdata_section (void);
extern void sdata_section (void);
extern void sbss_section (void);
#define BITMASK_UPPER16 ((unsigned long) 0xffff << 16)
#define BITMASK_LOWER16 ((unsigned long) 0xffff)
#define GENERATE_BRANCHLIKELY (ISA_HAS_BRANCHLIKELY)
#define BRANCH_LIKELY_P() GENERATE_BRANCHLIKELY
#define ISA_HAS_BRANCHLIKELY (iq2000_isa == 1)
#undef ASM_SPEC
#define DWARF_FRAME_REGNUM(REG) (REG)
#define DWARF_FRAME_RETURN_COLUMN (GP_REG_FIRST + 31)
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + GP_ARG_FIRST : INVALID_REGNUM)
#define EH_RETURN_STACKADJ_REGNO 3
#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_RETURN_STACKADJ_REGNO)
#define EH_RETURN_HANDLER_REGNO 26
#define EH_RETURN_HANDLER_RTX \
gen_rtx_REG (Pmode, EH_RETURN_HANDLER_REGNO)
#define DWARF_CIE_DATA_ALIGNMENT 4
#define UNITS_PER_FPREG 4
#define PAD_VARARGS_DOWN !BYTES_BIG_ENDIAN
#define GP_REG_FIRST 0
#define GP_REG_LAST 31
#define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
#define RAP_REG_NUM 32
#define AT_REGNUM (GP_REG_FIRST + 1)
#define GP_REG_P(REGNO) \
((unsigned int) ((int) (REGNO) - GP_REG_FIRST) < GP_REG_NUM)
#define IQ2000_TEMP1_REGNUM (GP_REG_FIRST + 12)
#define IQ2000_TEMP2_REGNUM (GP_REG_FIRST + 13)
#define GR_REG_CLASS_P(CLASS) \
((CLASS) == GR_REGS)
#define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
#define SMALL_INT_UNSIGNED(X) ((unsigned HOST_WIDE_INT) (INTVAL (X)) < 0x10000)
#define CLASS_UNITS(mode, size) \
((GET_MODE_SIZE (mode) + (size) - 1) / (size))
#define CLASS_CANNOT_CHANGE_MODE 0
#define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
(GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
#ifndef STACK_ARGS_ADJUST
#define STACK_ARGS_ADJUST(SIZE) \
{ \
if (SIZE.constant < 4 * UNITS_PER_WORD) \
SIZE.constant = 4 * UNITS_PER_WORD; \
}
#endif
#define GP_RETURN (GP_REG_FIRST + 2)
#define GP_ARG_FIRST (GP_REG_FIRST + 4)
#define GP_ARG_LAST (GP_REG_FIRST + 11)
#define MAX_ARGS_IN_REGISTERS 8
#define MUST_SAVE_REGISTER(regno) \
((regs_ever_live[regno] && !call_used_regs[regno]) \
|| (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed) \
|| (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
#ifndef IQ2000_STACK_ALIGN
#define IQ2000_STACK_ALIGN(LOC) (((LOC) + 7) & ~7)
#endif
#define BASE_REG_P(regno, mode) \
(GP_REG_P (regno))
#define GP_REG_OR_PSEUDO_STRICT_P(regno, mode) \
BASE_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno], \
(mode))
#define GP_REG_OR_PSEUDO_NONSTRICT_P(regno, mode) \
(((regno) >= FIRST_PSEUDO_REGISTER) || (BASE_REG_P ((regno), (mode))))
#define REGNO_MODE_OK_FOR_BASE_P(regno, mode) \
GP_REG_OR_PSEUDO_STRICT_P ((regno), (mode))
#ifndef REG_OK_STRICT
#define REG_MODE_OK_FOR_BASE_P(X, MODE) \
iq2000_reg_mode_ok_for_base_p (X, MODE, 0)
#else
#define REG_MODE_OK_FOR_BASE_P(X, MODE) \
iq2000_reg_mode_ok_for_base_p (X, MODE, 1)
#endif
#if 1
#define GO_PRINTF(x) fprintf (stderr, (x))
#define GO_PRINTF2(x,y) fprintf (stderr, (x), (y))
#define GO_DEBUG_RTX(x) debug_rtx (x)
#else
#define GO_PRINTF(x)
#define GO_PRINTF2(x,y)
#define GO_DEBUG_RTX(x)
#endif
#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
((LENGTH) = iq2000_adjust_insn_length ((INSN), (LENGTH)))
#define SPECIAL_MODE_PREDICATES \
"pc_or_label_operand",
#ifndef SET_FILE_NUMBER
#define SET_FILE_NUMBER() ++ num_source_filenames
#endif
#ifndef LABEL_AFTER_LOC
#define LABEL_AFTER_LOC(STREAM)
#endif
#ifndef IQ2000_DEFAULT_GVALUE
#define IQ2000_DEFAULT_GVALUE 8
#endif
#define SDATA_SECTION_ASM_OP "\t.sdata"
#define DONT_ACCESS_GBLS_AFTER_EPILOGUE 0
extern char iq2000_print_operand_punct[256];
extern enum processor_type iq2000_tune;
extern int iq2000_isa;
extern rtx branch_cmp[2];
extern enum cmp_type branch_type;
extern const char * iq2000_cpu_string;
extern const char * iq2000_arch_string;
enum iq2000_builtins
{
IQ2000_BUILTIN_ADO16,
IQ2000_BUILTIN_CFC0,
IQ2000_BUILTIN_CFC1,
IQ2000_BUILTIN_CFC2,
IQ2000_BUILTIN_CFC3,
IQ2000_BUILTIN_CHKHDR,
IQ2000_BUILTIN_CTC0,
IQ2000_BUILTIN_CTC1,
IQ2000_BUILTIN_CTC2,
IQ2000_BUILTIN_CTC3,
IQ2000_BUILTIN_LU,
IQ2000_BUILTIN_LUC32L,
IQ2000_BUILTIN_LUC64,
IQ2000_BUILTIN_LUC64L,
IQ2000_BUILTIN_LUK,
IQ2000_BUILTIN_LULCK,
IQ2000_BUILTIN_LUM32,
IQ2000_BUILTIN_LUM32L,
IQ2000_BUILTIN_LUM64,
IQ2000_BUILTIN_LUM64L,
IQ2000_BUILTIN_LUR,
IQ2000_BUILTIN_LURL,
IQ2000_BUILTIN_MFC0,
IQ2000_BUILTIN_MFC1,
IQ2000_BUILTIN_MFC2,
IQ2000_BUILTIN_MFC3,
IQ2000_BUILTIN_MRGB,
IQ2000_BUILTIN_MTC0,
IQ2000_BUILTIN_MTC1,
IQ2000_BUILTIN_MTC2,
IQ2000_BUILTIN_MTC3,
IQ2000_BUILTIN_PKRL,
IQ2000_BUILTIN_RAM,
IQ2000_BUILTIN_RB,
IQ2000_BUILTIN_RX,
IQ2000_BUILTIN_SRRD,
IQ2000_BUILTIN_SRRDL,
IQ2000_BUILTIN_SRULC,
IQ2000_BUILTIN_SRULCK,
IQ2000_BUILTIN_SRWR,
IQ2000_BUILTIN_SRWRU,
IQ2000_BUILTIN_TRAPQF,
IQ2000_BUILTIN_TRAPQFL,
IQ2000_BUILTIN_TRAPQN,
IQ2000_BUILTIN_TRAPQNE,
IQ2000_BUILTIN_TRAPRE,
IQ2000_BUILTIN_TRAPREL,
IQ2000_BUILTIN_WB,
IQ2000_BUILTIN_WBR,
IQ2000_BUILTIN_WBU,
IQ2000_BUILTIN_WX,
IQ2000_BUILTIN_SYSCALL
};