RegisterPressure.h [plain text]
#ifndef LLVM_CODEGEN_REGISTERPRESSURE_H
#define LLVM_CODEGEN_REGISTERPRESSURE_H
#include "llvm/ADT/SparseSet.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/Target/TargetRegisterInfo.h"
namespace llvm {
class LiveIntervals;
class LiveRange;
class RegisterClassInfo;
class MachineInstr;
struct RegisterMaskPair {
unsigned RegUnit; LaneBitmask LaneMask;
RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask)
: RegUnit(RegUnit), LaneMask(LaneMask) {}
};
struct RegisterPressure {
std::vector<unsigned> MaxSetPressure;
SmallVector<RegisterMaskPair,8> LiveInRegs;
SmallVector<RegisterMaskPair,8> LiveOutRegs;
void dump(const TargetRegisterInfo *TRI) const;
};
struct IntervalPressure : RegisterPressure {
SlotIndex TopIdx;
SlotIndex BottomIdx;
void reset();
void openTop(SlotIndex NextTop);
void openBottom(SlotIndex PrevBottom);
};
struct RegionPressure : RegisterPressure {
MachineBasicBlock::const_iterator TopPos;
MachineBasicBlock::const_iterator BottomPos;
void reset();
void openTop(MachineBasicBlock::const_iterator PrevTop);
void openBottom(MachineBasicBlock::const_iterator PrevBottom);
};
class PressureChange {
uint16_t PSetID; int16_t UnitInc;
public:
PressureChange(): PSetID(0), UnitInc(0) {}
PressureChange(unsigned id): PSetID(id+1), UnitInc(0) {
assert(id < UINT16_MAX && "PSetID overflow.");
}
bool isValid() const { return PSetID > 0; }
unsigned getPSet() const {
assert(isValid() && "invalid PressureChange");
return PSetID - 1;
}
unsigned getPSetOrMax() const { return (PSetID - 1) & UINT16_MAX; }
int getUnitInc() const { return UnitInc; }
void setUnitInc(int Inc) { UnitInc = Inc; }
bool operator==(const PressureChange &RHS) const {
return PSetID == RHS.PSetID && UnitInc == RHS.UnitInc;
}
};
template <> struct isPodLike<PressureChange> {
static const bool value = true;
};
class PressureDiff {
enum { MaxPSets = 16 };
PressureChange PressureChanges[MaxPSets];
typedef PressureChange* iterator;
iterator nonconst_begin() { return &PressureChanges[0]; }
iterator nonconst_end() { return &PressureChanges[MaxPSets]; }
public:
typedef const PressureChange* const_iterator;
const_iterator begin() const { return &PressureChanges[0]; }
const_iterator end() const { return &PressureChanges[MaxPSets]; }
void addPressureChange(unsigned RegUnit, bool IsDec,
const MachineRegisterInfo *MRI);
LLVM_DUMP_METHOD void dump(const TargetRegisterInfo &TRI) const;
};
class RegisterOperands {
public:
SmallVector<RegisterMaskPair, 8> Uses;
SmallVector<RegisterMaskPair, 8> Defs;
SmallVector<RegisterMaskPair, 8> DeadDefs;
void collect(const MachineInstr &MI, const TargetRegisterInfo &TRI,
const MachineRegisterInfo &MRI, bool TrackLaneMasks,
bool IgnoreDead);
void detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS);
void adjustLaneLiveness(const LiveIntervals &LIS,
const MachineRegisterInfo &MRI, SlotIndex Pos,
MachineInstr *AddFlagsMI = nullptr);
};
class PressureDiffs {
PressureDiff *PDiffArray;
unsigned Size;
unsigned Max;
public:
PressureDiffs(): PDiffArray(nullptr), Size(0), Max(0) {}
~PressureDiffs() { free(PDiffArray); }
void clear() { Size = 0; }
void init(unsigned N);
PressureDiff &operator[](unsigned Idx) {
assert(Idx < Size && "PressureDiff index out of bounds");
return PDiffArray[Idx];
}
const PressureDiff &operator[](unsigned Idx) const {
return const_cast<PressureDiffs*>(this)->operator[](Idx);
}
void addInstruction(unsigned Idx, const RegisterOperands &RegOpers,
const MachineRegisterInfo &MRI);
};
struct RegPressureDelta {
PressureChange Excess;
PressureChange CriticalMax;
PressureChange CurrentMax;
RegPressureDelta() {}
bool operator==(const RegPressureDelta &RHS) const {
return Excess == RHS.Excess && CriticalMax == RHS.CriticalMax
&& CurrentMax == RHS.CurrentMax;
}
bool operator!=(const RegPressureDelta &RHS) const {
return !operator==(RHS);
}
};
class LiveRegSet {
private:
struct IndexMaskPair {
unsigned Index;
LaneBitmask LaneMask;
IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
: Index(Index), LaneMask(LaneMask) {}
unsigned getSparseSetIndex() const {
return Index;
}
};
typedef SparseSet<IndexMaskPair> RegSet;
RegSet Regs;
unsigned NumRegUnits;
unsigned getSparseIndexFromReg(unsigned Reg) const {
if (TargetRegisterInfo::isVirtualRegister(Reg))
return TargetRegisterInfo::virtReg2Index(Reg) + NumRegUnits;
assert(Reg < NumRegUnits);
return Reg;
}
unsigned getRegFromSparseIndex(unsigned SparseIndex) const {
if (SparseIndex >= NumRegUnits)
return TargetRegisterInfo::index2VirtReg(SparseIndex-NumRegUnits);
return SparseIndex;
}
public:
void clear();
void init(const MachineRegisterInfo &MRI);
LaneBitmask contains(unsigned Reg) const {
unsigned SparseIndex = getSparseIndexFromReg(Reg);
RegSet::const_iterator I = Regs.find(SparseIndex);
if (I == Regs.end())
return 0;
return I->LaneMask;
}
LaneBitmask insert(RegisterMaskPair Pair) {
unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask));
if (!InsertRes.second) {
unsigned PrevMask = InsertRes.first->LaneMask;
InsertRes.first->LaneMask |= Pair.LaneMask;
return PrevMask;
}
return 0;
}
LaneBitmask erase(RegisterMaskPair Pair) {
unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
RegSet::iterator I = Regs.find(SparseIndex);
if (I == Regs.end())
return 0;
unsigned PrevMask = I->LaneMask;
I->LaneMask &= ~Pair.LaneMask;
return PrevMask;
}
size_t size() const {
return Regs.size();
}
template<typename ContainerT>
void appendTo(ContainerT &To) const {
for (const IndexMaskPair &P : Regs) {
unsigned Reg = getRegFromSparseIndex(P.Index);
if (P.LaneMask != 0)
To.push_back(RegisterMaskPair(Reg, P.LaneMask));
}
}
};
class RegPressureTracker {
const MachineFunction *MF;
const TargetRegisterInfo *TRI;
const RegisterClassInfo *RCI;
const MachineRegisterInfo *MRI;
const LiveIntervals *LIS;
const MachineBasicBlock *MBB;
RegisterPressure &P;
bool RequireIntervals;
bool TrackUntiedDefs;
bool TrackLaneMasks;
MachineBasicBlock::const_iterator CurrPos;
std::vector<unsigned> CurrSetPressure;
LiveRegSet LiveRegs;
SparseSet<unsigned, VirtReg2IndexFunctor> UntiedDefs;
std::vector<unsigned> LiveThruPressure;
public:
RegPressureTracker(IntervalPressure &rp) :
MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
RequireIntervals(true), TrackUntiedDefs(false), TrackLaneMasks(false) {}
RegPressureTracker(RegionPressure &rp) :
MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
RequireIntervals(false), TrackUntiedDefs(false), TrackLaneMasks(false) {}
void reset();
void init(const MachineFunction *mf, const RegisterClassInfo *rci,
const LiveIntervals *lis, const MachineBasicBlock *mbb,
MachineBasicBlock::const_iterator pos,
bool TrackLaneMasks, bool TrackUntiedDefs);
void addLiveRegs(ArrayRef<RegisterMaskPair> Regs);
MachineBasicBlock::const_iterator getPos() const { return CurrPos; }
void setPos(MachineBasicBlock::const_iterator Pos) { CurrPos = Pos; }
void recede(SmallVectorImpl<RegisterMaskPair> *LiveUses = nullptr);
void recede(const RegisterOperands &RegOpers,
SmallVectorImpl<RegisterMaskPair> *LiveUses = nullptr);
void recedeSkipDebugValues();
void advance();
void advance(const RegisterOperands &RegOpers);
void closeRegion();
void initLiveThru(const RegPressureTracker &RPTracker);
void initLiveThru(ArrayRef<unsigned> PressureSet) {
LiveThruPressure.assign(PressureSet.begin(), PressureSet.end());
}
ArrayRef<unsigned> getLiveThru() const { return LiveThruPressure; }
RegisterPressure &getPressure() { return P; }
const RegisterPressure &getPressure() const { return P; }
const std::vector<unsigned> &getRegSetPressureAtPos() const {
return CurrSetPressure;
}
bool isTopClosed() const;
bool isBottomClosed() const;
void closeTop();
void closeBottom();
void getMaxUpwardPressureDelta(const MachineInstr *MI,
PressureDiff *PDiff,
RegPressureDelta &Delta,
ArrayRef<PressureChange> CriticalPSets,
ArrayRef<unsigned> MaxPressureLimit);
void getUpwardPressureDelta(const MachineInstr *MI,
PressureDiff &PDiff,
RegPressureDelta &Delta,
ArrayRef<PressureChange> CriticalPSets,
ArrayRef<unsigned> MaxPressureLimit) const;
void getMaxDownwardPressureDelta(const MachineInstr *MI,
RegPressureDelta &Delta,
ArrayRef<PressureChange> CriticalPSets,
ArrayRef<unsigned> MaxPressureLimit);
void getMaxPressureDelta(const MachineInstr *MI,
RegPressureDelta &Delta,
ArrayRef<PressureChange> CriticalPSets,
ArrayRef<unsigned> MaxPressureLimit) {
if (isTopClosed())
return getMaxDownwardPressureDelta(MI, Delta, CriticalPSets,
MaxPressureLimit);
assert(isBottomClosed() && "Uninitialized pressure tracker");
return getMaxUpwardPressureDelta(MI, nullptr, Delta, CriticalPSets,
MaxPressureLimit);
}
void getUpwardPressure(const MachineInstr *MI,
std::vector<unsigned> &PressureResult,
std::vector<unsigned> &MaxPressureResult);
void getDownwardPressure(const MachineInstr *MI,
std::vector<unsigned> &PressureResult,
std::vector<unsigned> &MaxPressureResult);
void getPressureAfterInst(const MachineInstr *MI,
std::vector<unsigned> &PressureResult,
std::vector<unsigned> &MaxPressureResult) {
if (isTopClosed())
return getUpwardPressure(MI, PressureResult, MaxPressureResult);
assert(isBottomClosed() && "Uninitialized pressure tracker");
return getDownwardPressure(MI, PressureResult, MaxPressureResult);
}
bool hasUntiedDef(unsigned VirtReg) const {
return UntiedDefs.count(VirtReg);
}
void dump() const;
protected:
void discoverLiveOut(RegisterMaskPair Pair);
void discoverLiveIn(RegisterMaskPair Pair);
SlotIndex getCurrSlot() const;
void increaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask,
LaneBitmask NewMask);
void decreaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask,
LaneBitmask NewMask);
void bumpDeadDefs(ArrayRef<RegisterMaskPair> DeadDefs);
void bumpUpwardPressure(const MachineInstr *MI);
void bumpDownwardPressure(const MachineInstr *MI);
void discoverLiveInOrOut(RegisterMaskPair Pair,
SmallVectorImpl<RegisterMaskPair> &LiveInOrOut);
LaneBitmask getLastUsedLanes(unsigned RegUnit, SlotIndex Pos) const;
LaneBitmask getLiveLanesAt(unsigned RegUnit, SlotIndex Pos) const;
LaneBitmask getLiveThroughAt(unsigned RegUnit, SlotIndex Pos) const;
};
void dumpRegSetPressure(ArrayRef<unsigned> SetPressure,
const TargetRegisterInfo *TRI);
}
#endif