MipsTargetMachine.cpp [plain text]
#include "MipsTargetMachine.h"
#include "Mips.h"
#include "Mips16FrameLowering.h"
#include "Mips16HardFloat.h"
#include "Mips16ISelDAGToDAG.h"
#include "Mips16ISelLowering.h"
#include "Mips16InstrInfo.h"
#include "MipsFrameLowering.h"
#include "MipsInstrInfo.h"
#include "MipsModuleISelDAGToDAG.h"
#include "MipsOs16.h"
#include "MipsSEFrameLowering.h"
#include "MipsSEISelDAGToDAG.h"
#include "MipsSEISelLowering.h"
#include "MipsSEInstrInfo.h"
#include "MipsTargetObjectFile.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/PassManager.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Transforms/Scalar.h"
using namespace llvm;
#define DEBUG_TYPE "mips"
extern "C" void LLVMInitializeMipsTarget() {
RegisterTargetMachine<MipsebTargetMachine> X(TheMipsTarget);
RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
RegisterTargetMachine<MipsebTargetMachine> A(TheMips64Target);
RegisterTargetMachine<MipselTargetMachine> B(TheMips64elTarget);
}
static std::string computeDataLayout(StringRef TT, StringRef CPU,
const TargetOptions &Options,
bool isLittle) {
std::string Ret = "";
MipsABIInfo ABI =
MipsABIInfo::computeTargetABI(Triple(TT), CPU, Options.MCOptions);
if (isLittle)
Ret += "e";
else
Ret += "E";
Ret += "-m:m";
if (!ABI.IsN64())
Ret += "-p:32:32";
Ret += "-i8:8:32-i16:16:32-i64:64";
if (ABI.IsN64() || ABI.IsN32())
Ret += "-n32:64-S128";
else
Ret += "-n32-S64";
return Ret;
}
MipsTargetMachine::MipsTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL, bool isLittle)
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
CPU, FS, Options, RM, CM, OL),
isLittle(isLittle), TLOF(make_unique<MipsTargetObjectFile>()),
ABI(MipsABIInfo::computeTargetABI(Triple(TT), CPU, Options.MCOptions)),
Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this),
NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",
isLittle, *this),
Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16",
isLittle, *this) {
Subtarget = &DefaultSubtarget;
initAsmInfo();
}
MipsTargetMachine::~MipsTargetMachine() {}
void MipsebTargetMachine::anchor() { }
MipsebTargetMachine::
MipsebTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
void MipselTargetMachine::anchor() { }
MipselTargetMachine::
MipselTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
const MipsSubtarget *
MipsTargetMachine::getSubtargetImpl(const Function &F) const {
Attribute CPUAttr = F.getFnAttribute("target-cpu");
Attribute FSAttr = F.getFnAttribute("target-features");
std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
? CPUAttr.getValueAsString().str()
: TargetCPU;
std::string FS = !FSAttr.hasAttribute(Attribute::None)
? FSAttr.getValueAsString().str()
: TargetFS;
bool hasMips16Attr =
!F.getFnAttribute("mips16").hasAttribute(Attribute::None);
bool hasNoMips16Attr =
!F.getFnAttribute("nomips16").hasAttribute(Attribute::None);
Attribute SFAttr = F.getFnAttribute("use-soft-float");
bool softFloat = !SFAttr.hasAttribute(Attribute::None)
? SFAttr.getValueAsString() == "true"
: Options.UseSoftFloat;
if (hasMips16Attr)
FS += FS.empty() ? "+mips16" : ",+mips16";
else if (hasNoMips16Attr)
FS += FS.empty() ? "-mips16" : ",-mips16";
auto &I = SubtargetMap[CPU + FS + (softFloat ? "use-soft-float=true"
: "use-soft-float=false")];
if (!I) {
resetTargetOptions(F);
I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, *this);
}
return I.get();
}
void MipsTargetMachine::resetSubtarget(MachineFunction *MF) {
DEBUG(dbgs() << "resetSubtarget\n");
Subtarget = const_cast<MipsSubtarget *>(getSubtargetImpl(*MF->getFunction()));
MF->setSubtarget(Subtarget);
return;
}
namespace {
class MipsPassConfig : public TargetPassConfig {
public:
MipsPassConfig(MipsTargetMachine *TM, PassManagerBase &PM)
: TargetPassConfig(TM, PM) {
EnableTailMerge = !getMipsSubtarget().enableLongBranchPass();
}
MipsTargetMachine &getMipsTargetMachine() const {
return getTM<MipsTargetMachine>();
}
const MipsSubtarget &getMipsSubtarget() const {
return *getMipsTargetMachine().getSubtargetImpl();
}
void addIRPasses() override;
bool addInstSelector() override;
void addMachineSSAOptimization() override;
void addPreEmitPass() override;
void addPreRegAlloc() override;
};
}
TargetPassConfig *MipsTargetMachine::createPassConfig(PassManagerBase &PM) {
return new MipsPassConfig(this, PM);
}
void MipsPassConfig::addIRPasses() {
TargetPassConfig::addIRPasses();
addPass(createAtomicExpandPass(&getMipsTargetMachine()));
if (getMipsSubtarget().os16())
addPass(createMipsOs16(getMipsTargetMachine()));
if (getMipsSubtarget().inMips16HardFloat())
addPass(createMips16HardFloat(getMipsTargetMachine()));
}
bool MipsPassConfig::addInstSelector() {
addPass(createMipsModuleISelDag(getMipsTargetMachine()));
addPass(createMips16ISelDag(getMipsTargetMachine()));
addPass(createMipsSEISelDag(getMipsTargetMachine()));
return false;
}
void MipsPassConfig::addMachineSSAOptimization() {
addPass(createMipsOptimizePICCallPass(getMipsTargetMachine()));
TargetPassConfig::addMachineSSAOptimization();
}
void MipsPassConfig::addPreRegAlloc() {
if (getOptLevel() == CodeGenOpt::None)
addPass(createMipsOptimizePICCallPass(getMipsTargetMachine()));
}
TargetIRAnalysis MipsTargetMachine::getTargetIRAnalysis() {
return TargetIRAnalysis([this](Function &F) {
if (Subtarget->allowMixed16_32()) {
DEBUG(errs() << "No Target Transform Info Pass Added\n");
return TargetTransformInfo(getDataLayout());
}
DEBUG(errs() << "Target Transform Info Pass Added\n");
return TargetTransformInfo(BasicTTIImpl(this, F));
});
}
void MipsPassConfig::addPreEmitPass() {
MipsTargetMachine &TM = getMipsTargetMachine();
addPass(createMipsDelaySlotFillerPass(TM));
addPass(createMipsLongBranchPass(TM));
addPass(createMipsConstantIslandPass(TM));
}