#include "MipsInstrInfo.h"
#include "InstPrinter/MipsInstPrinter.h"
#include "MipsAnalyzeImmediate.h"
#include "MipsMachineFunction.h"
#include "MipsTargetMachine.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
#define GET_INSTRINFO_CTOR_DTOR
#include "MipsGenInstrInfo.inc"
void MipsInstrInfo::anchor() {}
MipsInstrInfo::MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBr)
: MipsGenInstrInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
Subtarget(STI), UncondBrOpc(UncondBr) {}
const MipsInstrInfo *MipsInstrInfo::create(MipsSubtarget &STI) {
if (STI.inMips16Mode())
return llvm::createMips16InstrInfo(STI);
return llvm::createMipsSEInstrInfo(STI);
}
bool MipsInstrInfo::isZeroImm(const MachineOperand &op) const {
return op.isImm() && op.getImm() == 0;
}
void MipsInstrInfo::
insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
{
DebugLoc DL;
BuildMI(MBB, MI, DL, get(Mips::NOP));
}
MachineMemOperand *MipsInstrInfo::GetMemOperand(MachineBasicBlock &MBB, int FI,
unsigned Flag) const {
MachineFunction &MF = *MBB.getParent();
MachineFrameInfo &MFI = *MF.getFrameInfo();
unsigned Align = MFI.getObjectAlignment(FI);
return MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI), Flag,
MFI.getObjectSize(FI), Align);
}
void MipsInstrInfo::AnalyzeCondBr(const MachineInstr *Inst, unsigned Opc,
MachineBasicBlock *&BB,
SmallVectorImpl<MachineOperand> &Cond) const {
assert(getAnalyzableBrOpc(Opc) && "Not an analyzable branch");
int NumOp = Inst->getNumExplicitOperands();
BB = Inst->getOperand(NumOp-1).getMBB();
Cond.push_back(MachineOperand::CreateImm(Opc));
for (int i=0; i<NumOp-1; i++)
Cond.push_back(Inst->getOperand(i));
}
bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
SmallVectorImpl<MachineOperand> &Cond,
bool AllowModify) const {
SmallVector<MachineInstr*, 2> BranchInstrs;
BranchType BT = AnalyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs);
return (BT == BT_None) || (BT == BT_Indirect);
}
void
MipsInstrInfo::BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
DebugLoc DL,
const SmallVectorImpl<MachineOperand> &Cond) const {
unsigned Opc = Cond[0].getImm();
const MCInstrDesc &MCID = get(Opc);
MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID);
for (unsigned i = 1; i < Cond.size(); ++i) {
if (Cond[i].isReg())
MIB.addReg(Cond[i].getReg());
else if (Cond[i].isImm())
MIB.addImm(Cond[i].getImm());
else
assert(true && "Cannot copy operand");
}
MIB.addMBB(TBB);
}
unsigned MipsInstrInfo::InsertBranch(
MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const {
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() <= 3) &&
"# of Mips branch conditions must be <= 3!");
if (FBB) {
BuildCondBr(MBB, TBB, DL, Cond);
BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(FBB);
return 2;
}
if (Cond.empty())
BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(TBB);
else BuildCondBr(MBB, TBB, DL, Cond);
return 1;
}
unsigned MipsInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
MachineBasicBlock::reverse_iterator I = MBB.rbegin(), REnd = MBB.rend();
MachineBasicBlock::reverse_iterator FirstBr;
unsigned removed;
while (I != REnd && I->isDebugValue())
++I;
FirstBr = I;
for (removed = 0; I != REnd && removed < 2; ++I, ++removed)
if (!getAnalyzableBrOpc(I->getOpcode()))
break;
MBB.erase(I.base(), FirstBr.base());
return removed;
}
bool MipsInstrInfo::ReverseBranchCondition(
SmallVectorImpl<MachineOperand> &Cond) const {
assert( (Cond.size() && Cond.size() <= 3) &&
"Invalid Mips branch condition!");
Cond[0].setImm(getOppositeBranchOpc(Cond[0].getImm()));
return false;
}
MipsInstrInfo::BranchType MipsInstrInfo::AnalyzeBranch(
MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
SmallVectorImpl<MachineOperand> &Cond, bool AllowModify,
SmallVectorImpl<MachineInstr *> &BranchInstrs) const {
MachineBasicBlock::reverse_iterator I = MBB.rbegin(), REnd = MBB.rend();
while (I != REnd && I->isDebugValue())
++I;
if (I == REnd || !isUnpredicatedTerminator(&*I)) {
TBB = FBB = nullptr;
return BT_NoBranch;
}
MachineInstr *LastInst = &*I;
unsigned LastOpc = LastInst->getOpcode();
BranchInstrs.push_back(LastInst);
if (!getAnalyzableBrOpc(LastOpc))
return LastInst->isIndirectBranch() ? BT_Indirect : BT_None;
unsigned SecondLastOpc = 0;
MachineInstr *SecondLastInst = nullptr;
if (++I != REnd) {
SecondLastInst = &*I;
SecondLastOpc = getAnalyzableBrOpc(SecondLastInst->getOpcode());
if (isUnpredicatedTerminator(SecondLastInst) && !SecondLastOpc)
return BT_None;
}
if (!SecondLastOpc) {
if (LastOpc == UncondBrOpc) {
TBB = LastInst->getOperand(0).getMBB();
return BT_Uncond;
}
AnalyzeCondBr(LastInst, LastOpc, TBB, Cond);
return BT_Cond;
}
if (++I != REnd && isUnpredicatedTerminator(&*I))
return BT_None;
BranchInstrs.insert(BranchInstrs.begin(), SecondLastInst);
if (SecondLastOpc == UncondBrOpc) {
if (!AllowModify)
return BT_None;
TBB = SecondLastInst->getOperand(0).getMBB();
LastInst->eraseFromParent();
BranchInstrs.pop_back();
return BT_Uncond;
}
if (LastOpc != UncondBrOpc)
return BT_None;
AnalyzeCondBr(SecondLastInst, SecondLastOpc, TBB, Cond);
FBB = LastInst->getOperand(0).getMBB();
return BT_CondUncond;
}
unsigned MipsInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
switch (MI->getOpcode()) {
default:
return MI->getDesc().getSize();
case TargetOpcode::INLINEASM: { const MachineFunction *MF = MI->getParent()->getParent();
const char *AsmStr = MI->getOperand(0).getSymbolName();
return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());
}
case Mips::CONSTPOOL_ENTRY:
return MI->getOperand(2).getImm();
}
}
MachineInstrBuilder
MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc,
MachineBasicBlock::iterator I) const {
MachineInstrBuilder MIB;
MIB = BuildMI(*I->getParent(), I, I->getDebugLoc(), get(NewOpc));
for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J)
MIB.addOperand(I->getOperand(J));
MIB.setMemRefs(I->memoperands_begin(), I->memoperands_end());
return MIB;
}