HexagonRegisterInfo.h [plain text]
#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
#define LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
#include "llvm/MC/MachineLocation.h"
#include "llvm/Target/TargetRegisterInfo.h"
#define GET_REGINFO_HEADER
#include "HexagonGenRegisterInfo.inc"
#define HEXAGON_RESERVED_REG_1 Hexagon::R10
#define HEXAGON_RESERVED_REG_2 Hexagon::R11
namespace llvm {
class HexagonSubtarget;
class HexagonInstrInfo;
class Type;
struct HexagonRegisterInfo : public HexagonGenRegisterInfo {
HexagonSubtarget &Subtarget;
HexagonRegisterInfo(HexagonSubtarget &st);
const MCPhysReg *
getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
const TargetRegisterClass* const*
getCalleeSavedRegClasses(const MachineFunction *MF = nullptr) const;
BitVector getReservedRegs(const MachineFunction &MF) const override;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS = nullptr) const override;
void determineFrameLayout(MachineFunction &MF) const;
bool requiresRegisterScavenging(const MachineFunction &MF) const override {
return true;
}
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
return true;
}
unsigned getRARegister() const;
unsigned getFrameRegister(const MachineFunction &MF) const override;
unsigned getFrameRegister() const;
unsigned getStackRegister() const;
};
}
#endif