X86TargetMachine.cpp [plain text]
#include "X86TargetMachine.h"
#include "X86.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/PassManager.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
extern "C" void LLVMInitializeX86Target() {
RegisterTargetMachine<X86TargetMachine> X(TheX86_32Target);
RegisterTargetMachine<X86TargetMachine> Y(TheX86_64Target);
}
void X86TargetMachine::anchor() { }
static std::string computeDataLayout(const X86Subtarget &ST) {
std::string Ret = "e";
Ret += DataLayout::getManglingComponent(ST.getTargetTriple());
if (ST.isTarget64BitILP32() || !ST.is64Bit())
Ret += "-p:32:32";
if (ST.is64Bit() || ST.isTargetCygMing() || ST.isTargetWindows() ||
ST.isTargetNaCl())
Ret += "-i64:64";
else
Ret += "-f64:32:64";
if (ST.isTargetNaCl())
; else if (ST.is64Bit() || ST.isTargetDarwin())
Ret += "-f80:128";
else
Ret += "-f80:32";
if (ST.is64Bit())
Ret += "-n8:16:32:64";
else
Ret += "-n8:16:32";
if (!ST.is64Bit() && (ST.isTargetCygMing() || ST.isTargetWindows()))
Ret += "-S32";
else
Ret += "-S128";
return Ret;
}
X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, Options.StackAlignmentOverride),
FrameLowering(*this, Subtarget),
InstrItins(Subtarget.getInstrItineraryData()),
DL(computeDataLayout(*getSubtargetImpl())),
InstrInfo(*this),
TLInfo(*this),
TSInfo(*this),
JITInfo(*this) {
if (getRelocationModel() == Reloc::Static) {
Subtarget.setPICStyle(PICStyles::None);
} else if (Subtarget.is64Bit()) {
Subtarget.setPICStyle(PICStyles::RIPRel);
} else if (Subtarget.isTargetCOFF()) {
Subtarget.setPICStyle(PICStyles::None);
} else if (Subtarget.isTargetDarwin()) {
if (getRelocationModel() == Reloc::PIC_)
Subtarget.setPICStyle(PICStyles::StubPIC);
else {
assert(getRelocationModel() == Reloc::DynamicNoPIC);
Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
}
} else if (Subtarget.isTargetELF()) {
Subtarget.setPICStyle(PICStyles::GOT);
}
if (Options.FloatABIType == FloatABI::Default)
this->Options.FloatABIType = FloatABI::Hard;
initAsmInfo();
}
static cl::opt<bool>
UseVZeroUpper("x86-use-vzeroupper", cl::Hidden,
cl::desc("Minimize AVX to SSE transition penalty"),
cl::init(true));
static cl::opt<bool>
X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
cl::desc("Enable early if-conversion on X86"));
void X86TargetMachine::addAnalysisPasses(PassManagerBase &PM) {
PM.add(createBasicTargetTransformInfoPass(this));
PM.add(createX86TargetTransformInfoPass(this));
}
namespace {
class X86PassConfig : public TargetPassConfig {
public:
X86PassConfig(X86TargetMachine *TM, PassManagerBase &PM)
: TargetPassConfig(TM, PM) {}
X86TargetMachine &getX86TargetMachine() const {
return getTM<X86TargetMachine>();
}
const X86Subtarget &getX86Subtarget() const {
return *getX86TargetMachine().getSubtargetImpl();
}
virtual bool addInstSelector();
virtual bool addILPOpts();
virtual bool addPreRegAlloc();
virtual bool addPostRegAlloc();
virtual bool addPreEmitPass();
};
}
TargetPassConfig *X86TargetMachine::createPassConfig(PassManagerBase &PM) {
return new X86PassConfig(this, PM);
}
bool X86PassConfig::addInstSelector() {
addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel()));
if (getX86Subtarget().isTargetELF() && getOptLevel() != CodeGenOpt::None)
addPass(createCleanupLocalDynamicTLSPass());
if (!getX86Subtarget().is64Bit())
addPass(createGlobalBaseRegPass());
return false;
}
bool X86PassConfig::addILPOpts() {
if (X86EarlyIfConv && getX86Subtarget().hasCMov()) {
addPass(&EarlyIfConverterID);
return true;
}
return false;
}
bool X86PassConfig::addPreRegAlloc() {
return false; }
bool X86PassConfig::addPostRegAlloc() {
addPass(createX86FloatingPointStackifierPass());
return true; }
bool X86PassConfig::addPreEmitPass() {
bool ShouldPrint = false;
if (getOptLevel() != CodeGenOpt::None && getX86Subtarget().hasSSE2()) {
addPass(createExecutionDependencyFixPass(&X86::VR128RegClass));
ShouldPrint = true;
}
if (getX86Subtarget().hasAVX() && UseVZeroUpper) {
addPass(createX86IssueVZeroUpperPass());
ShouldPrint = true;
}
if (getOptLevel() != CodeGenOpt::None &&
getX86Subtarget().padShortFunctions()) {
addPass(createX86PadShortFunctions());
ShouldPrint = true;
}
if (getOptLevel() != CodeGenOpt::None &&
getX86Subtarget().LEAusesAG()){
addPass(createX86FixupLEAs());
ShouldPrint = true;
}
return ShouldPrint;
}
bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
JITCodeEmitter &JCE) {
PM.add(createX86JITCodeEmitterPass(*this, JCE));
return false;
}