#ifndef POWERPC32_REGISTERINFO_H
#define POWERPC32_REGISTERINFO_H
#include "PPC.h"
#include "llvm/ADT/DenseMap.h"
#define GET_REGINFO_HEADER
#include "PPCGenRegisterInfo.inc"
namespace llvm {
class PPCSubtarget;
class TargetInstrInfo;
class Type;
class PPCRegisterInfo : public PPCGenRegisterInfo {
DenseMap<unsigned, unsigned> ImmToIdxMap;
const PPCSubtarget &Subtarget;
public:
PPCRegisterInfo(const PPCSubtarget &SubTarget);
virtual const TargetRegisterClass *
getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const;
unsigned getRegPressureLimit(const TargetRegisterClass *RC,
MachineFunction &MF) const;
const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
const uint32_t *getCallPreservedMask(CallingConv::ID CC) const;
const uint32_t *getNoPreservedMask() const;
BitVector getReservedRegs(const MachineFunction &MF) const;
bool requiresRegisterScavenging(const MachineFunction &MF) const {
return true;
}
bool requiresFrameIndexScavenging(const MachineFunction &MF) const {
return true;
}
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
return true;
}
virtual bool requiresVirtualBaseRegisters(const MachineFunction &MF) const {
return true;
}
void lowerDynamicAlloc(MachineBasicBlock::iterator II) const;
void lowerCRSpilling(MachineBasicBlock::iterator II,
unsigned FrameIndex) const;
void lowerCRRestore(MachineBasicBlock::iterator II,
unsigned FrameIndex) const;
void lowerVRSAVESpilling(MachineBasicBlock::iterator II,
unsigned FrameIndex) const;
void lowerVRSAVERestore(MachineBasicBlock::iterator II,
unsigned FrameIndex) const;
bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
int &FrameIdx) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS = NULL) const;
bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const;
void materializeFrameBaseRegister(MachineBasicBlock *MBB,
unsigned BaseReg, int FrameIdx,
int64_t Offset) const;
void resolveFrameIndex(MachineBasicBlock::iterator I,
unsigned BaseReg, int64_t Offset) const;
bool isFrameOffsetLegal(const MachineInstr *MI, int64_t Offset) const;
unsigned getFrameRegister(const MachineFunction &MF) const;
unsigned getBaseRegister(const MachineFunction &MF) const;
bool hasBasePointer(const MachineFunction &MF) const;
bool canRealignStack(const MachineFunction &MF) const;
bool needsStackRealignment(const MachineFunction &MF) const;
};
}
#endif