#define DEBUG_TYPE "jit"
#include "MipsJITInfo.h"
#include "MipsInstrInfo.h"
#include "MipsRelocations.h"
#include "MipsSubtarget.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Memory.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdlib>
using namespace llvm;
void MipsJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
unsigned NewAddr = (intptr_t)New;
unsigned OldAddr = (intptr_t)Old;
const unsigned NopInstr = 0x0;
if ((NewAddr & 0xF0000000) == ((OldAddr + 4) & 0xF0000000)) {
unsigned *OldInstruction = (unsigned *)Old;
*OldInstruction = 0x08000000;
unsigned JTargetAddr = NewAddr & 0x0FFFFFFC;
JTargetAddr >>= 2;
*OldInstruction |= JTargetAddr;
OldInstruction++;
*OldInstruction = NopInstr;
sys::Memory::InvalidateInstructionCache(Old, 2 * 4);
} else {
const unsigned HintMask = 0xFFFFF83F, ReturnSequence = 0x03e00008;
unsigned* CurrentInstr = (unsigned*)Old;
unsigned CurrInstrHintClear = (*CurrentInstr) & HintMask;
unsigned* NextInstr = CurrentInstr + 1;
unsigned NextInstrHintClear = (*NextInstr) & HintMask;
if ((CurrInstrHintClear != ReturnSequence) &&
(NextInstrHintClear != ReturnSequence)) {
const unsigned LuiT0Instr = 0x3c080000, AddiuT0Instr = 0x25080000;
const unsigned JrT0Instr = 0x01000008;
(*(CurrentInstr++)) = LuiT0Instr | ((NewAddr & 0xffff0000) >> 16);
(*(CurrentInstr++)) = AddiuT0Instr | (NewAddr & 0x0000ffff);
(*(CurrentInstr++)) = JrT0Instr;
(*CurrentInstr) = NopInstr;
sys::Memory::InvalidateInstructionCache(Old, 4 * 4);
} else {
report_fatal_error("MipsJITInfo::replaceMachineCodeForFunction");
}
}
}
static TargetJITInfo::JITCompilerFn JITCompilerFunction;
#ifndef __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__
#endif
#define GETASMPREFIX2(X) #X
#define GETASMPREFIX(X) GETASMPREFIX2(X)
#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
extern "C" {
#if defined (__mips__)
void MipsCompilationCallback();
asm(
".text\n"
".align 2\n"
".globl " ASMPREFIX "MipsCompilationCallback\n"
ASMPREFIX "MipsCompilationCallback:\n"
".ent " ASMPREFIX "MipsCompilationCallback\n"
".frame $sp, 32, $ra\n"
".set noreorder\n"
".cpload $t9\n"
"addiu $sp, $sp, -64\n"
".cprestore 16\n"
"sw $a0, 20($sp)\n"
"sw $a1, 24($sp)\n"
"sw $a2, 28($sp)\n"
"sw $a3, 32($sp)\n"
"sw $ra, 36($sp)\n"
"sw $t8, 40($sp)\n"
"sdc1 $f12, 48($sp)\n"
"sdc1 $f14, 56($sp)\n"
"addiu $a0, $t8, -16\n"
"jal " ASMPREFIX "MipsCompilationCallbackC\n"
"nop\n"
"lw $a0, 20($sp)\n"
"lw $a1, 24($sp)\n"
"lw $a2, 28($sp)\n"
"lw $a3, 32($sp)\n"
"lw $ra, 36($sp)\n"
"lw $t8, 40($sp)\n"
"ldc1 $f12, 48($sp)\n"
"ldc1 $f14, 56($sp)\n"
"addiu $sp, $sp, 64\n"
"addiu $t8, $t8, -16\n"
"jr $t8\n"
"nop\n"
".set reorder\n"
".end " ASMPREFIX "MipsCompilationCallback\n"
);
#else // host != Mips
void MipsCompilationCallback() {
llvm_unreachable(
"Cannot call MipsCompilationCallback() on a non-Mips arch!");
}
#endif
}
extern "C" void MipsCompilationCallbackC(intptr_t StubAddr) {
intptr_t NewVal = (intptr_t) JITCompilerFunction((void*) StubAddr);
int Hi = ((unsigned)NewVal & 0xffff0000) >> 16;
if ((NewVal & 0x8000) != 0)
Hi++;
int Lo = (int)(NewVal & 0xffff);
*(intptr_t *)(StubAddr) = 0xf << 26 | 25 << 16 | Hi;
*(intptr_t *)(StubAddr + 4) = 9 << 26 | 25 << 21 | 25 << 16 | Lo;
*(intptr_t *)(StubAddr + 8) = 25 << 21 | 8;
*(intptr_t *)(StubAddr + 12) = 0;
sys::Memory::InvalidateInstructionCache((void*) StubAddr, 16);
}
TargetJITInfo::LazyResolverFn MipsJITInfo::getLazyResolverFunction(
JITCompilerFn F) {
JITCompilerFunction = F;
return MipsCompilationCallback;
}
TargetJITInfo::StubLayout MipsJITInfo::getStubLayout() {
StubLayout Result = { 4*4, 4 };
return Result;
}
void *MipsJITInfo::emitFunctionStub(const Function *F, void *Fn,
JITCodeEmitter &JCE) {
JCE.emitAlignment(4);
void *Addr = (void*) (JCE.getCurrentPCValue());
if (!sys::Memory::setRangeWritable(Addr, 16))
llvm_unreachable("ERROR: Unable to mark stub writable.");
intptr_t EmittedAddr;
if (Fn != (void*)(intptr_t)MipsCompilationCallback)
EmittedAddr = (intptr_t)Fn;
else
EmittedAddr = (intptr_t)MipsCompilationCallback;
int Hi = ((unsigned)EmittedAddr & 0xffff0000) >> 16;
if ((EmittedAddr & 0x8000) != 0)
Hi++;
int Lo = (int)(EmittedAddr & 0xffff);
if (IsLittleEndian) {
JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi);
JCE.emitWordLE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
JCE.emitWordLE(25 << 21 | 24 << 11 | 9);
JCE.emitWordLE(0);
} else {
JCE.emitWordBE(0xf << 26 | 25 << 16 | Hi);
JCE.emitWordBE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
JCE.emitWordBE(25 << 21 | 24 << 11 | 9);
JCE.emitWordBE(0);
}
sys::Memory::InvalidateInstructionCache(Addr, 16);
if (!sys::Memory::setRangeExecutable(Addr, 16))
llvm_unreachable("ERROR: Unable to mark stub executable.");
return Addr;
}
void MipsJITInfo::relocate(void *Function, MachineRelocation *MR,
unsigned NumRelocs, unsigned char *GOTBase) {
for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
void *RelocPos = (char*) Function + MR->getMachineCodeOffset();
intptr_t ResultPtr = (intptr_t) MR->getResultPointer();
switch ((Mips::RelocationType) MR->getRelocationType()) {
case Mips::reloc_mips_pc16:
ResultPtr = (((ResultPtr - (intptr_t) RelocPos) - 4) >> 2) & 0xffff;
*((unsigned*) RelocPos) |= (unsigned) ResultPtr;
break;
case Mips::reloc_mips_26:
ResultPtr = (ResultPtr & 0x0fffffff) >> 2;
*((unsigned*) RelocPos) |= (unsigned) ResultPtr;
break;
case Mips::reloc_mips_hi:
ResultPtr = ResultPtr >> 16;
if ((((intptr_t) (MR->getResultPointer()) & 0xffff) >> 15) == 1) {
ResultPtr += 1;
}
*((unsigned*) RelocPos) |= (unsigned) ResultPtr;
break;
case Mips::reloc_mips_lo: {
int Addend = *((unsigned*) RelocPos) & 0xffff;
ResultPtr = (ResultPtr + Addend) & 0xffff;
*((unsigned*) RelocPos) &= 0xffff0000;
*((unsigned*) RelocPos) |= (unsigned) ResultPtr;
break;
}
}
}
}