PHIElimination.cpp [plain text]
#define DEBUG_TYPE "phielim"
#include "llvm/BasicBlock.h"
#include "llvm/Instructions.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Compiler.h"
#include <algorithm>
#include <map>
using namespace llvm;
STATISTIC(NumAtomic, "Number of atomic phis lowered");
namespace {
class VISIBILITY_HIDDEN PNE : public MachineFunctionPass {
MachineRegisterInfo *MRI;
public:
static char ID; PNE() : MachineFunctionPass(&ID) {}
virtual bool runOnMachineFunction(MachineFunction &Fn);
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveVariables>();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}
private:
bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB);
void LowerAtomicPHINode(MachineBasicBlock &MBB,
MachineBasicBlock::iterator AfterPHIsIt);
void analyzePHINodes(const MachineFunction& Fn);
MachineBasicBlock::iterator FindCopyInsertPoint(MachineBasicBlock &MBB,
unsigned SrcReg);
MachineBasicBlock::iterator SkipPHIsAndLabels(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) {
while (I != MBB.end() &&
(I->getOpcode() == TargetInstrInfo::PHI || I->isLabel()))
++I;
return I;
}
typedef std::pair<const MachineBasicBlock*, unsigned> BBVRegPair;
typedef std::map<BBVRegPair, unsigned> VRegPHIUse;
VRegPHIUse VRegPHIUseCount;
SmallPtrSet<MachineInstr*, 4> ImpDefs;
};
}
char PNE::ID = 0;
static RegisterPass<PNE>
X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
const PassInfo *const llvm::PHIEliminationID = &X;
bool PNE::runOnMachineFunction(MachineFunction &Fn) {
MRI = &Fn.getRegInfo();
analyzePHINodes(Fn);
bool Changed = false;
for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
Changed |= EliminatePHINodes(Fn, *I);
for (SmallPtrSet<MachineInstr*,4>::iterator I = ImpDefs.begin(),
E = ImpDefs.end(); I != E; ++I) {
MachineInstr *DefMI = *I;
unsigned DefReg = DefMI->getOperand(0).getReg();
if (MRI->use_empty(DefReg))
DefMI->eraseFromParent();
}
ImpDefs.clear();
VRegPHIUseCount.clear();
return Changed;
}
bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
return false;
MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin());
while (MBB.front().getOpcode() == TargetInstrInfo::PHI)
LowerAtomicPHINode(MBB, AfterPHIsIt);
return true;
}
static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
const MachineRegisterInfo *MRI) {
for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
unsigned SrcReg = MPhi->getOperand(i).getReg();
const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF)
return false;
}
return true;
}
MachineBasicBlock::iterator PNE::FindCopyInsertPoint(MachineBasicBlock &MBB,
unsigned SrcReg) {
if (MBB.empty())
return MBB.begin();
if (!isa<InvokeInst>(MBB.getBasicBlock()->getTerminator()))
return MBB.getFirstTerminator();
SmallPtrSet<MachineInstr*, 8> DefUsesInMBB;
for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg),
RE = MRI->reg_end(); RI != RE; ++RI) {
MachineInstr *DefUseMI = &*RI;
if (DefUseMI->getParent() == &MBB)
DefUsesInMBB.insert(DefUseMI);
}
MachineBasicBlock::iterator InsertPoint;
if (DefUsesInMBB.empty()) {
InsertPoint = MBB.begin();
} else if (DefUsesInMBB.size() == 1) {
InsertPoint = *DefUsesInMBB.begin();
++InsertPoint;
} else {
InsertPoint = MBB.end();
while (!DefUsesInMBB.count(&*--InsertPoint)) {}
++InsertPoint;
}
return SkipPHIsAndLabels(MBB, InsertPoint);
}
void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
MachineBasicBlock::iterator AfterPHIsIt) {
MachineInstr *MPhi = MBB.remove(MBB.begin());
unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
unsigned DestReg = MPhi->getOperand(0).getReg();
bool isDead = MPhi->getOperand(0).isDead();
MachineFunction &MF = *MBB.getParent();
const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
unsigned IncomingReg = 0;
const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
if (isSourceDefinedByImplicitDef(MPhi, MRI))
BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
else {
IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
}
LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
if (LV) {
MachineInstr *PHICopy = prior(AfterPHIsIt);
if (IncomingReg) {
LV->getVarInfo(IncomingReg).NumUses++;
LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true;
}
LV->removeVirtualRegistersKilled(MPhi);
if (isDead) {
LV->addVirtualRegisterDead(DestReg, PHICopy);
LV->removeVirtualRegisterDead(DestReg, MPhi);
}
}
for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
--VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(),
MPhi->getOperand(i).getReg())];
SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
for (int i = NumSrcs - 1; i >= 0; --i) {
unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
"Machine PHI Operands must all be virtual registers!");
MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
ImpDefs.insert(DefMI);
continue;
}
MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
if (!MBBsInsertedInto.insert(&opBlock))
continue;
MachineBasicBlock::iterator InsertPos = FindCopyInsertPoint(opBlock, SrcReg);
TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC);
if (!LV) continue;
LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg);
InRegVI.UsedBlocks[opBlock.getNumber()] = true;
bool ValueIsLive = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0;
std::vector<MachineBasicBlock*> OpSuccBlocks;
for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(),
E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) {
MachineBasicBlock *SuccMBB = *SI;
unsigned SuccIdx = SuccMBB->getNumber();
if (SuccIdx < InRegVI.AliveBlocks.size() &&
InRegVI.AliveBlocks[SuccIdx]) {
ValueIsLive = true;
break;
}
OpSuccBlocks.push_back(SuccMBB);
}
if (!ValueIsLive) {
switch (OpSuccBlocks.size()) {
case 1: {
MachineBasicBlock *MBB = OpSuccBlocks[0];
for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
if (InRegVI.Kills[i]->getParent() == MBB) {
ValueIsLive = true;
break;
}
break;
}
case 2: {
MachineBasicBlock *MBB1 = OpSuccBlocks[0], *MBB2 = OpSuccBlocks[1];
for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
if (InRegVI.Kills[i]->getParent() == MBB1 ||
InRegVI.Kills[i]->getParent() == MBB2) {
ValueIsLive = true;
break;
}
break;
}
default:
std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end());
for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(),
InRegVI.Kills[i]->getParent())) {
ValueIsLive = true;
break;
}
}
}
if (!ValueIsLive) {
MachineBasicBlock::iterator KillInst = prior(InsertPos);
MachineBasicBlock::iterator Term = opBlock.getFirstTerminator();
if (Term != opBlock.end()) {
if (Term->readsRegister(SrcReg))
KillInst = Term;
#ifndef NDEBUG
for (MachineBasicBlock::iterator TI = next(Term); TI != opBlock.end();
++TI) {
assert(!TI->readsRegister(SrcReg) &&
"Terminator instructions cannot use virtual registers unless"
"they are the first terminator in a block!");
}
#endif
}
LV->addVirtualRegisterKilled(SrcReg, KillInst);
unsigned opBlockNum = opBlock.getNumber();
if (opBlockNum < InRegVI.AliveBlocks.size())
InRegVI.AliveBlocks[opBlockNum] = false;
}
}
MF.DeleteMachineInstr(MPhi);
++NumAtomic;
}
void PNE::analyzePHINodes(const MachineFunction& Fn) {
for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
I != E; ++I)
for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(),
BBI->getOperand(i).getReg())];
}