#include "x86emu/x86emui.h"
static void x86emuOp2_illegal_op(
u8 op2)
{
START_OF_INSTR();
DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
TRACE_REGS();
printk("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
M.x86.R_CS, M.x86.R_IP-2,op2);
HALT_SYS();
END_OF_INSTR();
}
#define xorl(a,b) ((a) && !(b)) || (!(a) && (b))
static void x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
{
#ifdef __HAS_LONG_LONG__
static u64 counter = 0;
#else
static u32 counter = 0;
#endif
counter += 0x10000;
START_OF_INSTR();
DECODE_PRINTF("RDTSC\n");
TRACE_AND_STEP();
#ifdef __HAS_LONG_LONG__
M.x86.R_EAX = counter & 0xffffffff;
M.x86.R_EDX = counter >> 32;
#else
M.x86.R_EAX = counter;
M.x86.R_EDX = 0;
#endif
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_long_jump(u8 op2)
{
s32 target;
char *name = 0;
int cond = 0;
START_OF_INSTR();
switch (op2) {
case 0x80:
name = "JO\t";
cond = ACCESS_FLAG(F_OF);
break;
case 0x81:
name = "JNO\t";
cond = !ACCESS_FLAG(F_OF);
break;
case 0x82:
name = "JB\t";
cond = ACCESS_FLAG(F_CF);
break;
case 0x83:
name = "JNB\t";
cond = !ACCESS_FLAG(F_CF);
break;
case 0x84:
name = "JZ\t";
cond = ACCESS_FLAG(F_ZF);
break;
case 0x85:
name = "JNZ\t";
cond = !ACCESS_FLAG(F_ZF);
break;
case 0x86:
name = "JBE\t";
cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
break;
case 0x87:
name = "JNBE\t";
cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
break;
case 0x88:
name = "JS\t";
cond = ACCESS_FLAG(F_SF);
break;
case 0x89:
name = "JNS\t";
cond = !ACCESS_FLAG(F_SF);
break;
case 0x8a:
name = "JP\t";
cond = ACCESS_FLAG(F_PF);
break;
case 0x8b:
name = "JNP\t";
cond = !ACCESS_FLAG(F_PF);
break;
case 0x8c:
name = "JL\t";
cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
break;
case 0x8d:
name = "JNL\t";
cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)));
break;
case 0x8e:
name = "JLE\t";
cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
ACCESS_FLAG(F_ZF));
break;
case 0x8f:
name = "JNLE\t";
cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
ACCESS_FLAG(F_ZF));
break;
}
DECODE_PRINTF(name);
(void)name;
target = (s16) fetch_word_imm();
target += (s16) M.x86.R_IP;
DECODE_PRINTF2("%04x\n", target);
TRACE_AND_STEP();
if (cond)
M.x86.R_IP = (u16)target;
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_set_byte(u8 op2)
{
int mod, rl, rh;
uint destoffset;
u8 *destreg;
char *name = 0;
int cond = 0;
START_OF_INSTR();
switch (op2) {
case 0x90:
name = "SETO\t";
cond = ACCESS_FLAG(F_OF);
break;
case 0x91:
name = "SETNO\t";
cond = !ACCESS_FLAG(F_OF);
break;
case 0x92:
name = "SETB\t";
cond = ACCESS_FLAG(F_CF);
break;
case 0x93:
name = "SETNB\t";
cond = !ACCESS_FLAG(F_CF);
break;
case 0x94:
name = "SETZ\t";
cond = ACCESS_FLAG(F_ZF);
break;
case 0x95:
name = "SETNZ\t";
cond = !ACCESS_FLAG(F_ZF);
break;
case 0x96:
name = "SETBE\t";
cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
break;
case 0x97:
name = "SETNBE\t";
cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
break;
case 0x98:
name = "SETS\t";
cond = ACCESS_FLAG(F_SF);
break;
case 0x99:
name = "SETNS\t";
cond = !ACCESS_FLAG(F_SF);
break;
case 0x9a:
name = "SETP\t";
cond = ACCESS_FLAG(F_PF);
break;
case 0x9b:
name = "SETNP\t";
cond = !ACCESS_FLAG(F_PF);
break;
case 0x9c:
name = "SETL\t";
cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
break;
case 0x9d:
name = "SETNL\t";
cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
break;
case 0x9e:
name = "SETLE\t";
cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
ACCESS_FLAG(F_ZF));
break;
case 0x9f:
name = "SETNLE\t";
cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
ACCESS_FLAG(F_ZF));
break;
}
DECODE_PRINTF(name);
(void)name;
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
destoffset = decode_rm00_address(rl);
TRACE_AND_STEP();
store_data_byte(destoffset, cond ? 0x01 : 0x00);
break;
case 1:
destoffset = decode_rm01_address(rl);
TRACE_AND_STEP();
store_data_byte(destoffset, cond ? 0x01 : 0x00);
break;
case 2:
destoffset = decode_rm10_address(rl);
TRACE_AND_STEP();
store_data_byte(destoffset, cond ? 0x01 : 0x00);
break;
case 3:
destreg = DECODE_RM_BYTE_REGISTER(rl);
TRACE_AND_STEP();
*destreg = cond ? 0x01 : 0x00;
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("PUSH\tFS\n");
TRACE_AND_STEP();
push_word(M.x86.R_FS);
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("POP\tFS\n");
TRACE_AND_STEP();
M.x86.R_FS = pop_word();
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
int bit,disp;
START_OF_INSTR();
DECODE_PRINTF("BT\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval;
u32 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
} else {
u16 srcval;
u16 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval;
u32 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
} else {
u16 srcval;
u16 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval;
u32 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
} else {
u16 srcval;
u16 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *srcreg,*shiftreg;
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
} else {
u16 *srcreg,*shiftreg;
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint destoffset;
u8 shift;
START_OF_INSTR();
DECODE_PRINTF("SHLD\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shld_long(destval,*shiftreg,shift);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shld_word(destval,*shiftreg,shift);
store_data_word(destoffset, destval);
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shld_long(destval,*shiftreg,shift);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shld_word(destval,*shiftreg,shift);
store_data_word(destoffset, destval);
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shld_long(destval,*shiftreg,shift);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shld_word(destval,*shiftreg,shift);
store_data_word(destoffset, destval);
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg,*shiftreg;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
*destreg = shld_long(*destreg,*shiftreg,shift);
} else {
u16 *destreg,*shiftreg;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
*destreg = shld_word(*destreg,*shiftreg,shift);
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint destoffset;
START_OF_INSTR();
DECODE_PRINTF("SHLD\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shld_long(destval,*shiftreg,M.x86.R_CL);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shld_word(destval,*shiftreg,M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shld_long(destval,*shiftreg,M.x86.R_CL);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shld_word(destval,*shiftreg,M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shld_long(destval,*shiftreg,M.x86.R_CL);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shld_word(destval,*shiftreg,M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg,*shiftreg;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
*destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL);
} else {
u16 *destreg,*shiftreg;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
*destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL);
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("PUSH\tGS\n");
TRACE_AND_STEP();
push_word(M.x86.R_GS);
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("POP\tGS\n");
TRACE_AND_STEP();
M.x86.R_GS = pop_word();
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
int bit,disp;
START_OF_INSTR();
DECODE_PRINTF("BTS\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval,mask;
u32 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval | mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, srcval | mask);
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval,mask;
u32 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval | mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, srcval | mask);
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval,mask;
u32 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval | mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, srcval | mask);
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *srcreg,*shiftreg;
u32 mask;
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg |= mask;
} else {
u16 *srcreg,*shiftreg;
u16 mask;
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg |= mask;
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint destoffset;
u8 shift;
START_OF_INSTR();
DECODE_PRINTF("SHLD\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shrd_long(destval,*shiftreg,shift);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shrd_word(destval,*shiftreg,shift);
store_data_word(destoffset, destval);
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shrd_long(destval,*shiftreg,shift);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shrd_word(destval,*shiftreg,shift);
store_data_word(destoffset, destval);
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shrd_long(destval,*shiftreg,shift);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shrd_word(destval,*shiftreg,shift);
store_data_word(destoffset, destval);
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg,*shiftreg;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
*destreg = shrd_long(*destreg,*shiftreg,shift);
} else {
u16 *destreg,*shiftreg;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
*destreg = shrd_word(*destreg,*shiftreg,shift);
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint destoffset;
START_OF_INSTR();
DECODE_PRINTF("SHLD\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 destval;
u32 *shiftreg;
destoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *shiftreg;
destoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg,*shiftreg;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
*destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL);
} else {
u16 *destreg,*shiftreg;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
*destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL);
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("IMUL\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
u32 res_lo,res_hi;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = fetch_data_long(srcoffset);
TRACE_AND_STEP();
imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
if (res_hi != 0) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
} else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
*destreg = (u32)res_lo;
} else {
u16 *destreg;
u16 srcval;
u32 res;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = fetch_data_word(srcoffset);
TRACE_AND_STEP();
res = (s16)*destreg * (s16)srcval;
if (res > 0xFFFF) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
} else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
*destreg = (u16)res;
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
u32 res_lo,res_hi;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = fetch_data_long(srcoffset);
TRACE_AND_STEP();
imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
if (res_hi != 0) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
} else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
*destreg = (u32)res_lo;
} else {
u16 *destreg;
u16 srcval;
u32 res;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = fetch_data_word(srcoffset);
TRACE_AND_STEP();
res = (s16)*destreg * (s16)srcval;
if (res > 0xFFFF) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
} else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
*destreg = (u16)res;
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
u32 res_lo,res_hi;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = fetch_data_long(srcoffset);
TRACE_AND_STEP();
imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
if (res_hi != 0) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
} else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
*destreg = (u32)res_lo;
} else {
u16 *destreg;
u16 srcval;
u32 res;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = fetch_data_word(srcoffset);
TRACE_AND_STEP();
res = (s16)*destreg * (s16)srcval;
if (res > 0xFFFF) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
} else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
*destreg = (u16)res;
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg,*srcreg;
u32 res_lo,res_hi;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_LONG_REGISTER(rl);
TRACE_AND_STEP();
imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg);
if (res_hi != 0) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
} else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
*destreg = (u32)res_lo;
} else {
u16 *destreg,*srcreg;
u32 res;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_WORD_REGISTER(rl);
res = (s16)*destreg * (s16)*srcreg;
if (res > 0xFFFF) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
} else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
*destreg = (u16)res;
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
{
int mod, rh, rl;
u16 *dstreg;
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("LSS\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
dstreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*dstreg = fetch_data_word(srcoffset);
M.x86.R_SS = fetch_data_word(srcoffset + 2);
break;
case 1:
dstreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*dstreg = fetch_data_word(srcoffset);
M.x86.R_SS = fetch_data_word(srcoffset + 2);
break;
case 2:
dstreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*dstreg = fetch_data_word(srcoffset);
M.x86.R_SS = fetch_data_word(srcoffset + 2);
break;
case 3:
TRACE_AND_STEP();
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
int bit,disp;
START_OF_INSTR();
DECODE_PRINTF("BTR\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval,mask;
u32 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval & ~mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval,mask;
u32 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval & ~mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval,mask;
u32 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval & ~mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *srcreg,*shiftreg;
u32 mask;
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg &= ~mask;
} else {
u16 *srcreg,*shiftreg;
u16 mask;
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg &= ~mask;
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
{
int mod, rh, rl;
u16 *dstreg;
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("LFS\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
dstreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*dstreg = fetch_data_word(srcoffset);
M.x86.R_FS = fetch_data_word(srcoffset + 2);
break;
case 1:
dstreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*dstreg = fetch_data_word(srcoffset);
M.x86.R_FS = fetch_data_word(srcoffset + 2);
break;
case 2:
dstreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*dstreg = fetch_data_word(srcoffset);
M.x86.R_FS = fetch_data_word(srcoffset + 2);
break;
case 3:
TRACE_AND_STEP();
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
{
int mod, rh, rl;
u16 *dstreg;
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("LGS\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
dstreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*dstreg = fetch_data_word(srcoffset);
M.x86.R_GS = fetch_data_word(srcoffset + 2);
break;
case 1:
dstreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*dstreg = fetch_data_word(srcoffset);
M.x86.R_GS = fetch_data_word(srcoffset + 2);
break;
case 2:
dstreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*dstreg = fetch_data_word(srcoffset);
M.x86.R_GS = fetch_data_word(srcoffset + 2);
break;
case 3:
TRACE_AND_STEP();
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("MOVZX\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = fetch_data_byte(srcoffset);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
} else {
u16 *destreg;
u16 srcval;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = fetch_data_byte(srcoffset);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = fetch_data_byte(srcoffset);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
} else {
u16 *destreg;
u16 srcval;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = fetch_data_byte(srcoffset);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = fetch_data_byte(srcoffset);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
} else {
u16 *destreg;
u16 srcval;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = fetch_data_byte(srcoffset);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u8 *srcreg;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_BYTE_REGISTER(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = *srcreg;
} else {
u16 *destreg;
u8 *srcreg;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_BYTE_REGISTER(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = *srcreg;
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
u32 *destreg;
u32 srcval;
u16 *srcreg;
START_OF_INSTR();
DECODE_PRINTF("MOVZX\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = fetch_data_word(srcoffset);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
break;
case 1:
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = fetch_data_word(srcoffset);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
break;
case 2:
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = fetch_data_word(srcoffset);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
break;
case 3:
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = *srcreg;
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
int bit;
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
switch (rh) {
case 4:
DECODE_PRINTF("BT\t");
break;
case 5:
DECODE_PRINTF("BTS\t");
break;
case 6:
DECODE_PRINTF("BTR\t");
break;
case 7:
DECODE_PRINTF("BTC\t");
break;
default:
DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
TRACE_REGS();
printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);
HALT_SYS();
}
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, mask;
u8 shift;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0x1F;
srcval = fetch_data_long(srcoffset);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
switch (rh) {
case 5:
store_data_long(srcoffset, srcval | mask);
break;
case 6:
store_data_long(srcoffset, srcval & ~mask);
break;
case 7:
store_data_long(srcoffset, srcval ^ mask);
break;
default:
break;
}
} else {
u16 srcval, mask;
u8 shift;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0xF;
srcval = fetch_data_word(srcoffset);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
switch (rh) {
case 5:
store_data_word(srcoffset, srcval | mask);
break;
case 6:
store_data_word(srcoffset, srcval & ~mask);
break;
case 7:
store_data_word(srcoffset, srcval ^ mask);
break;
default:
break;
}
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, mask;
u8 shift;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0x1F;
srcval = fetch_data_long(srcoffset);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
switch (rh) {
case 5:
store_data_long(srcoffset, srcval | mask);
break;
case 6:
store_data_long(srcoffset, srcval & ~mask);
break;
case 7:
store_data_long(srcoffset, srcval ^ mask);
break;
default:
break;
}
} else {
u16 srcval, mask;
u8 shift;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0xF;
srcval = fetch_data_word(srcoffset);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
switch (rh) {
case 5:
store_data_word(srcoffset, srcval | mask);
break;
case 6:
store_data_word(srcoffset, srcval & ~mask);
break;
case 7:
store_data_word(srcoffset, srcval ^ mask);
break;
default:
break;
}
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, mask;
u8 shift;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0x1F;
srcval = fetch_data_long(srcoffset);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
switch (rh) {
case 5:
store_data_long(srcoffset, srcval | mask);
break;
case 6:
store_data_long(srcoffset, srcval & ~mask);
break;
case 7:
store_data_long(srcoffset, srcval ^ mask);
break;
default:
break;
}
} else {
u16 srcval, mask;
u8 shift;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0xF;
srcval = fetch_data_word(srcoffset);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
switch (rh) {
case 5:
store_data_word(srcoffset, srcval | mask);
break;
case 6:
store_data_word(srcoffset, srcval & ~mask);
break;
case 7:
store_data_word(srcoffset, srcval ^ mask);
break;
default:
break;
}
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *srcreg;
u32 mask;
u8 shift;
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0x1F;
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
switch (rh) {
case 5:
*srcreg |= mask;
break;
case 6:
*srcreg &= ~mask;
break;
case 7:
*srcreg ^= mask;
break;
default:
break;
}
} else {
u16 *srcreg;
u16 mask;
u8 shift;
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0xF;
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
switch (rh) {
case 5:
*srcreg |= mask;
break;
case 6:
*srcreg &= ~mask;
break;
case 7:
*srcreg ^= mask;
break;
default:
break;
}
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
int bit,disp;
START_OF_INSTR();
DECODE_PRINTF("BTC\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval,mask;
u32 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval ^ mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval,mask;
u32 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval ^ mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval,mask;
u32 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval ^ mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *srcreg,*shiftreg;
u32 mask;
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
mask = (0x1 << bit);
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg ^= mask;
} else {
u16 *srcreg,*shiftreg;
u16 mask;
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
mask = (u16)(0x1 << bit);
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg ^= mask;
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("BSF\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch(mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, *dstreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_long(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
if ((srcval >> *dstreg) & 1) break;
} else {
u16 srcval, *dstreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_word(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
if ((srcval >> *dstreg) & 1) break;
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, *dstreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_long(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
if ((srcval >> *dstreg) & 1) break;
} else {
u16 srcval, *dstreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_word(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
if ((srcval >> *dstreg) & 1) break;
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, *dstreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_long(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
if ((srcval >> *dstreg) & 1) break;
} else {
u16 srcval, *dstreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_word(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
if ((srcval >> *dstreg) & 1) break;
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, *dstreg;
srcval = *DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
if ((srcval >> *dstreg) & 1) break;
} else {
u16 srcval, *dstreg;
srcval = *DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
if ((srcval >> *dstreg) & 1) break;
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("BSR\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch(mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, *dstreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_long(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
if ((srcval >> *dstreg) & 1) break;
} else {
u16 srcval, *dstreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_word(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
if ((srcval >> *dstreg) & 1) break;
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, *dstreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_long(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
if ((srcval >> *dstreg) & 1) break;
} else {
u16 srcval, *dstreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_word(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
if ((srcval >> *dstreg) & 1) break;
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, *dstreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_long(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
if ((srcval >> *dstreg) & 1) break;
} else {
u16 srcval, *dstreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
srcval = fetch_data_word(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
if ((srcval >> *dstreg) & 1) break;
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 srcval, *dstreg;
srcval = *DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
if ((srcval >> *dstreg) & 1) break;
} else {
u16 srcval, *dstreg;
srcval = *DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
if ((srcval >> *dstreg) & 1) break;
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("MOVSX\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = (s32)((s8)fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
} else {
u16 *destreg;
u16 srcval;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = (s16)((s8)fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = (s32)((s8)fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
} else {
u16 *destreg;
u16 srcval;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = (s16)((s8)fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = (s32)((s8)fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
} else {
u16 *destreg;
u16 srcval;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = (s16)((s8)fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
}
break;
case 3:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u8 *srcreg;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_BYTE_REGISTER(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = (s32)((s8)*srcreg);
} else {
u16 *destreg;
u8 *srcreg;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_BYTE_REGISTER(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = (s16)((s8)*srcreg);
}
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
u32 *destreg;
u32 srcval;
u16 *srcreg;
START_OF_INSTR();
DECODE_PRINTF("MOVSX\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = (s32)((s16)fetch_data_word(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
break;
case 1:
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = (s32)((s16)fetch_data_word(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
break;
case 2:
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = (s32)((s16)fetch_data_word(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
break;
case 3:
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = (s32)((s16)*srcreg);
break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
void (*x86emu_optab2[256])(u8) =
{
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_rdtsc,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_long_jump,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_set_byte,
x86emuOp2_push_FS,
x86emuOp2_pop_FS,
x86emuOp2_illegal_op,
x86emuOp2_bt_R,
x86emuOp2_shld_IMM,
x86emuOp2_shld_CL,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_push_GS,
x86emuOp2_pop_GS,
x86emuOp2_illegal_op,
x86emuOp2_bts_R,
x86emuOp2_shrd_IMM,
x86emuOp2_shrd_CL,
x86emuOp2_illegal_op,
x86emuOp2_imul_R_RM,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_lss_R_IMM,
x86emuOp2_btr_R,
x86emuOp2_lfs_R_IMM,
x86emuOp2_lgs_R_IMM,
x86emuOp2_movzx_byte_R_RM,
x86emuOp2_movzx_word_R_RM,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_btX_I,
x86emuOp2_btc_R,
x86emuOp2_bsf,
x86emuOp2_bsr,
x86emuOp2_movsx_byte_R_RM,
x86emuOp2_movsx_word_R_RM,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
x86emuOp2_illegal_op,
};