#ifndef _TSENG_H
#define _TSENG_H
#include "xf86.h"
#include "xf86_OSproc.h"
#include "xf86_ansic.h"
#include "compiler.h"
#include "xf86Version.h"
#include "xf86PciInfo.h"
#include "xf86Pci.h"
#include "vgaHW.h"
#include "mibank.h"
#include "micmap.h"
#include "xf1bpp.h"
#include "xf4bpp.h"
#include "fb.h"
#include "xaa.h"
#include "xaalocal.h"
#include "xf86Cursor.h"
#include "xf86fbman.h"
void TsengBlankScreen(ScrnInfoPtr pScrn, Bool unblank);
void TsengProtect(ScrnInfoPtr pScrn, Bool on);
#define MAX_TSENG_CLOCK 86000
typedef enum {
TYPE_ET4000,
TYPE_ET4000W32,
TYPE_ET4000W32I,
TYPE_ET4000W32P,
TYPE_ET6000,
TYPE_ET6100,
TYPE_TSENG
} t_tseng_type;
typedef enum {
TSENGNOREV = 0,
W32REVID_A,
W32REVID_B,
W32REVID_C,
W32REVID_D
} t_w32_revid;
#define ET6100REVID (0x70)
typedef enum {
T_BUS_ISA,
T_BUS_MCA,
T_BUS_VLB,
T_BUS_PCI
} t_tseng_bus;
extern SymTabRec TsengDacTable[];
typedef enum {
UNKNOWN_DAC = -1,
NORMAL_DAC,
ATT20C47xA_DAC,
Sierra1502X_DAC,
ATT20C497_DAC,
ATT20C490_DAC,
ATT20C493_DAC,
ATT20C491_DAC,
ATT20C492_DAC,
ICS5341_DAC,
ICS5301_DAC,
STG1700_DAC,
STG1702_DAC,
STG1703_DAC,
ET6000_DAC,
CH8398_DAC,
MUSIC4910_DAC
} t_ramdactype;
typedef enum {
CLOCKCHIP_DEFAULT = -1,
CLOCKCHIP_ICD2061A,
CLOCKCHIP_ET6000,
CLOCKCHIP_ICS5341,
CLOCKCHIP_ICS5301,
CLOCKCHIP_CH8398,
CLOCKCHIP_STG1703
} t_clockchip_type;
typedef enum {
TSENG_MODE_NORMAL,
TSENG_MODE_PIXMUX,
TSENG_MODE_DACBUS16
} t_clockrange_type;
typedef struct {
unsigned char cmd_reg;
unsigned char f2_M;
unsigned char f2_N;
unsigned char ctrl;
unsigned char w_idx;
unsigned char r_idx;
unsigned char timingctrl;
unsigned char MClkM;
unsigned char dummy;
unsigned char MClkN;
} PllState;
typedef struct {
unsigned char ExtCRTC[16];
unsigned char ExtTS[2];
unsigned char ExtATC;
unsigned char ExtSegSel[2];
unsigned char ExtET6K[0x4F];
unsigned char ExtIMACtrl;
PllState pll;
unsigned char ATTdac_cmd;
} TsengRegRec, *TsengRegPtr;
typedef struct {
unsigned char save1, save2, save3, save4;
} clock_save;
typedef struct {
Bool Programmable;
Bool Set;
int MemClk;
int min, max;
} TsengMClkInfoRec, *TsengMclkInfoPtr;
typedef struct {
int saved_cr;
int rmr;
} dac_save;
typedef struct {
t_ramdactype DacType;
Bool NotAttCompat;
int RamdacShift;
int RamdacMask;
Bool Dac8Bit;
Bool DacPort16;
rgb rgb24packed;
} TsengDacInfoRec, *TsengDacInfoPtr;
typedef struct {
unsigned char cache_SegSelL, cache_SegSelH;
int Bytesperpixel;
Bool need_wait_acl;
int line_width;
int planemask_mask;
int neg_x_pixel_offset;
int powerPerPixel;
unsigned char *BresenhamTable;
pciVideoPtr PciInfo;
PCITAG PciTag;
int Save_Divide;
Bool UsePCIRetry;
Bool UseAccel;
Bool HWCursor;
Bool Linmem_1meg;
Bool UseLinMem;
Bool SlowDram;
Bool FastDram;
Bool MedDram;
Bool SetPCIBurst;
Bool PCIBurst;
Bool SetW32Interleave;
Bool W32Interleave;
Bool ShowCache;
Bool Legend;
Bool NoClockchip;
TsengRegRec SavedReg;
TsengRegRec ModeReg;
unsigned long icd2061_dwv;
t_tseng_bus Bustype;
t_tseng_type ChipType;
int ChipRev;
memType LinFbAddress;
unsigned char *FbBase;
memType LinFbAddressMask;
long FbMapSize;
miBankInfoRec BankInfo;
CARD32 IOAddress;
CARD32 MMIOBase;
int MinClock;
int MaxClock;
int MemClk;
ClockRangePtr clockRange[2];
TsengDacInfoRec DacInfo;
TsengMClkInfoRec MClkInfo;
t_clockchip_type ClockChip;
int max_vco_freq;
CloseScreenProcPtr CloseScreen;
int save_divide;
XAAInfoRecPtr AccelInfoRec;
xf86CursorInfoPtr CursorInfoRec;
CARD32 AccelColorBufferOffset;
CARD32 AccelColorExpandBufferOffsets[3];
unsigned char * XAAColorExpandBuffers[3];
CARD32 AccelImageWriteBufferOffsets[2];
unsigned char * XAAScanlineImageWriteBuffers[2];
CARD32 HWCursorBufferOffset;
unsigned char *HWCursorBuffer;
unsigned char * XAAScanlineColorExpandBuffers[1];
int acl_blitxdir;
int acl_blitydir;
CARD32 acl_iw_dest;
CARD32 acl_skipleft;
CARD32 acl_ColorExpandDst;
int acl_colexp_width_dwords;
int acl_colexp_width_bytes;
dac_save dac;
CARD32* ColExpLUT;
clock_save save_clock;
EntityInfoPtr pEnt;
char * MMioBase;
pointer scratchMemBase;
pointer tsengCPU2ACLBase;
int tsengFg;
int tsengBg;
int tsengPat;
int tseng_old_dir;
int old_x;
int old_y;
int DGAnumModes;
Bool DGAactive;
DGAModePtr DGAModes;
int DGAViewportStatus;
OptionInfoPtr Options;
} TsengRec, *TsengPtr;
#define TsengPTR(p) ((TsengPtr)((p)->driverPrivate))
#define Is_stdET4K ( pTseng->ChipType == TYPE_ET4000 )
#define Is_W32 ( pTseng->ChipType == TYPE_ET4000W32 )
#define Is_W32i ( pTseng->ChipType == TYPE_ET4000W32I )
#define Is_W32p ( pTseng->ChipType == TYPE_ET4000W32P)
#define Is_ET6000 ( pTseng->ChipType == TYPE_ET6000 )
#define Is_ET6100 ( pTseng->ChipType == TYPE_ET6100 )
#define Is_W32_W32i ( Is_W32 || Is_W32i )
#define Is_W32_any ( Is_W32 || Is_W32i || Is_W32p )
#define Is_W32p_ab ( Is_W32p && ( (pTseng->ChipRev == W32REVID_A) || (pTseng->ChipRev == W32REVID_B) ) )
#define Is_W32p_cd ( Is_W32p && ( (pTseng->ChipRev == W32REVID_C) || (pTseng->ChipRev == W32REVID_D) ) )
#define Is_ET6K ( Is_ET6000 || Is_ET6100 )
#define CHIP_SUPPORTS_LINEAR ( Is_W32i || Is_W32p || Is_ET6K )
#define DAC_IS_ATT49x ( (pTseng->DacInfo.DacType == ATT20C490_DAC) \
|| (pTseng->DacInfo.DacType == ATT20C491_DAC) \
|| (pTseng->DacInfo.DacType == ATT20C492_DAC) \
|| (pTseng->DacInfo.DacType == ATT20C493_DAC) \
|| (pTseng->DacInfo.DacType == MUSIC4910_DAC) )
#define DAC_is_GenDAC ( (pTseng->DacInfo.DacType == ICS5341_DAC) \
|| (pTseng->DacInfo.DacType == ICS5301_DAC) )
#define DAC_is_STG170x ( (pTseng->DacInfo.DacType == STG1700_DAC) \
|| (pTseng->DacInfo.DacType == STG1702_DAC) \
|| (pTseng->DacInfo.DacType == STG1703_DAC) )
#define DAC_IS_CHRONTEL (pTseng->DacInfo.DacType == CH8398_DAC)
#define Gendac_programmable_clock \
( pScrn->progClock && \
( (pTseng->ClockChip == CLOCKCHIP_ICS5341) \
|| (pTseng->ClockChip == CLOCKCHIP_ICS5301) \
) \
)
#define STG170x_programmable_clock \
( pScrn->progClock && (pTseng->ClockChip == CLOCKCHIP_STG1703) )
#define ICD2061a_programmable_clock \
( pScrn->progClock && (pTseng->ClockChip == CLOCKCHIP_ICD2061A) )
#define CH8398_programmable_clock \
( pScrn->progClock && (pTseng->ClockChip == CLOCKCHIP_CH8398) )
#define ET6000_programmable_clock \
( pScrn->progClock && (pTseng->ClockChip == CLOCKCHIP_ET6000) )
Bool TsengModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
void TsengAdjustFrame(int scrnIndex, int x, int y, int flags);
Bool TsengDGAInit(ScreenPtr pScreen);
int ET4000SetRead(ScreenPtr pScrn, unsigned int iBank);
int ET4000SetWrite(ScreenPtr pScrn, unsigned int iBank);
int ET4000SetReadWrite(ScreenPtr pScrn, unsigned int iBank);
int ET4000W32SetRead(ScreenPtr pScrn, unsigned int iBank);
int ET4000W32SetWrite(ScreenPtr pScrn, unsigned int iBank);
int ET4000W32SetReadWrite(ScreenPtr pScrn, unsigned int iBank);
Bool Tseng_check_clockchip(ScrnInfoPtr pScrn);
void tseng_clock_setup(ScrnInfoPtr pScrn);
void TsengcommonCalcClock(long freq,
int min_m, int min_n1, int max_n1, int min_n2, int max_n2,
long freq_min, long freq_max,
unsigned char *mdiv, unsigned char *ndiv);
void tseng_dactopel(void);
unsigned char tseng_dactocomm(void);
unsigned char tseng_getdaccomm(void);
void tseng_setdaccomm(unsigned char comm);
Bool Check_Tseng_Ramdac(ScrnInfoPtr pScrn);
void tseng_set_ramdac_bpp(ScrnInfoPtr pScrn, DisplayModePtr mode);
Bool TsengHWCursorInit(ScreenPtr pScreen);
void TsengHVSyncDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags);
void TsengCrtcDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags);
#undef TSENG_DEBUG
#ifdef TSENG_DEBUG
#define PDEBUG(arg) do { ErrorF(arg); } while (0)
#else
#define PDEBUG(arg) do {} while (0)
#endif
#endif