#ifndef __V2KREGS_H__
#define __V2KREGS_H__
#define STATUS 0x4A
#define XBUSCTL 0x4B
#define SCLKPLL 0x68
#define SCRATCH 0x70
#define MEMDIAG 0xa4
#define CURSORBASE 0xac
#define PCLKPLL 0xc0
#define VINEVENBASE 0xd0
#define VINODDBASE 0xd4
#define WRITEINTR0ADDR 0xd8
#define WRITEINTR1ADDR 0xdc
#define DEVICE0_V2x000 0xf0
#define PCLKPLLPMASK 0xffffe1ff
#define SCLKPLLPMASK 0xffffe1ff
#define MCLKPLLPMASK 0xfffe1fff
#define PLLPCLKP 9
#define PLLSCLKP 9
#define PLLMCLKP 13
#define PLLPCLKN 13
#define PLLSCLKN 17
#define PLLPCLKDOUBLE 26
#define DIRECTPCLKMASK 0x00400000
#define DIRECTMCLKMASK 0x00800000
#define VGASTDCLOCK 0x100000
#define EXTRADIV2 0x200000
#define PLLINCLKFREQ 14318
#define MCLK_BYPASSEDGEFREQ 90000
#define CMD_SETPALETTE 0x21
#define MMIO_FIFOINFREE 0x20040
#define MMIO_COMM 0x20042
#define MMIO_FIFOOUTVALID 0x20041
#define MMIO_INTR 0x20044
#define MMIO_DMACMDPTR 0x20050
#define MMIO_CRTCHORZ 0x20088
#define MMIO_CRTCVERT 0x2008c
#define MMIO_CRTCSTATUS 0x2009c
#define MMIO_DACRAMWRITEADR 0x200b0
#define MMIO_DACRAMDATA 0x200b1
#define MMIO_VINEVENBASE 0x200d0
#define MMIO_VINODDBASE 0x200d4
#define MMIO_WRITEINTR0ADDR 0x200d8
#define MMIO_WRITEINTR1ADDR 0x200dc
#define HOST_INTERRUPT_MUTEX 1
typedef struct _v_mem_io {
vu32 fifo_swap_no[0x2000];
vu32 fifo_swap_end[0x2000];
vu32 fifo_swap_inhw[0x2000];
vu32 fifo_swap_hw[0x2000];
vu32 reserved0[0x10];
vu8 fifoinFree;
vu8 fifooutvalid;
vu8 comm;
vu8 memendian;
vu8 intr;
vu8 reserved1;
vu8 intren;
vu8 reserved2;
vu8 debugreg;
vu8 lowwatermark;
vu8 status;
vu8 xbusctl;
vu8 pcitest;
vu8 reserved3[3];
vu32 dmacmdptr;
vu32 dma_address;
vu32 dma_count;
vu8 vga_extend;
vu8 reserved4;
vu8 membase;
vu8 reserved5;
vu32 stateindex;
vu32 statedata;
vu8 sclkpll;
vu8 reserved6[7];
vu16 scratch;
vu8 mode;
vu8 scratch1;
vu8 bankselect;
vu8 reserved7[11];
vu32 crtctest;
vu32 crtcctl;
vu32 crtchorz;
vu32 crtcvert;
vu32 framebaseb;
vu32 framebasea;
vu32 crtcoffset;
vu32 crtcstatus;
vu32 memctl;
vu32 memdiag;
vu32 memcmd;
vu32 cursorbase;
vu8 dacramwriteadr;
vu8 dacramdata;
vu8 dacpixelmsk;
vu8 dacramreadadr;
vu8 dacovswriteadr;
vu8 dacovsdata;
vu8 daccommand0;
vu8 dacovsreadadr;
vu8 daccommand1;
vu8 daccommand2;
vu8 daccommand3;
vu8 daccursordata;
vu8 daccursorxlow;
vu8 daccursorxhigh;
vu8 daccursorylow;
vu8 daccursoryhigh;
vu8 pclkpll;
} v_mem_io;
#define SYSSTATUS_MASK 0x0f
#define SYSSTATUS_SHIFT 0
#define RISCSTATUS_MASK 0xf0
#define RISCSTATUS_SHIFT 4
#define MEMENDIAN_NO 0
#define MEMENDIAN_END 1
#define MEMENDIAN_INHW 2
#define MEMENDIAN_HW 3
#define MEMENDIAN_MASK 3
#define MEMENDIAN_SHIFT 0
#define DMABUSY 0x80
#define DMACMDPTR_DMABUSY 0x1
#define VERTINTR 0x01
#define FIFOLOWINTR 0x02
#define RISCINTR 0x04
#define HALTINTR 0x08
#define FIFOERRORINTR 0x10
#define DMAERRORINTR 0x20
#define DMAINTR 0x40
#define XINTR 0x80
#define VIDEOINEVENINTR 0x100
#define VIDEOINODDINTR 0x100
#define VERTINTREN 0x01
#define FIFOLOWINTREN 0x02
#define RISCINTREN 0x04
#define HALTINTREN 0x08
#define FIFOERRORINTREN 0x10
#define DMAERRORINTREN 0x20
#define DMAINTREN 0x40
#define XINTREN 0x80
#define SOFTRESET 0x01
#define HOLDRISC 0x02
#define STEPRISC 0x04
#define DIRECTSCLK 0x08
#define SOFTVGARESET 0x10
#define SOFTXRESET 0x20
#define VESA_MODE 0x01
#define VGA_MODE 0x02
#define VGA_32 0x04
#define DMA_EN 0x08
#define NATIVE_MODE 0
#define DRAMCTL_ADDR 0xffe00500
#define CRTCTEST_ADDR 0xffe00400
#define CRTCCTL_ADDR 0xffe00420
#define CRTCHORZ_ADDR 0xffe00440
#define CRTCVERT_ADDR 0xffe00460
#define FRAMEBASEB_ADDR 0xffe00480
#define FRAMEBASEA_ADDR 0xffe004a0
#define CRTCOFFSET_ADDR 0xffe004c0
#define CRTCSTATUS_ADDR 0xffe004e0
#define CRTCTEST_VIDEOLATENCY_MASK 0x1F
#define CRTCTEST_NOTVBLANK 0x10000
#define CRTCTEST_VBLANK 0x40000
#define CRTCCTL_SCRNFMT_MASK 0xF
#define CRTCCTL_VIDEOFIFOSIZE128 0x10
#define CRTCCTL_ENABLEDDC 0x20
#define CRTCCTL_DDCOUTPUT 0x40
#define CRTCCTL_DDCDATA 0x80
#define CRTCCTL_VSYNCHI 0x100
#define CRTCCTL_HSYNCHI 0x200
#define CRTCCTL_VSYNCENABLE 0x400
#define CRTCCTL_HSYNCENABLE 0x800
#define CRTCCTL_VIDEOENABLE 0x1000
#define CRTCCTL_STEREOSCOPIC 0x2000
#define CRTCCTL_FRAMEDISPLAYED 0x4000
#define CRTCCTL_FRAMEBUFFERBGR 0x8000
#define CRTCCTL_EVENFRAME 0x10000
#define CRTCCTL_LINEDOUBLE 0x20000
#define CRTCCTL_FRAMESWITCHED 0x40000
#define CRTCCTL_VIDEOFIFOSIZE256 0x800000
#define CRTCHORZ_ACTIVE_MASK 0xFF
#define CRTCHORZ_ACTIVE_SHIFT 0
#define CRTCHORZ_BACKPORCH_MASK 0x7E00
#define CRTCHORZ_BACKPORCH_SHIFT 11
#define CRTCHORZ_SYNC_MASK 0x1F0000L
#define CRTCHORZ_SYNC_SHIFT 16
#define CRTCHORZ_FRONTPORCH_MASK 0xE00000L
#define CRTCHORZ_FRONTPORCH_SHIFT 20
#define CRTCVERT_ACTIVE_MASK 0x7FF
#define CRTCVERT_BACKPORCH_MASK 0x1F800
#define CRTCVERT_SYNC_MASK 0xE0000
#define CRTCVERT_FRONTPORCH_MASK 0x03F00000
#define CRTCOFFSET_MASK 0xFFFF
#define CRTCSTATUS_HORZCLOCKS_MASK 0xFF
#define CRTCSTATUS_HORZ_MASK 0x600
#define CRTCSTATUS_HORZ_FPORCH 0x200
#define CRTCSTATUS_HORZ_SYNC 0x600
#define CRTCSTATUS_HORZ_BPORCH 0x400
#define CRTCSTATUS_HORZ_ACTIVE 0x000
#define CRTCSTATUS_SCANLINESLEFT_MASK 0x003FF800
#define CRTCSTATUS_VERT_MASK 0xC00000
#define CRTCSTATUS_VERT_FPORCH 0x400000
#define CRTCSTATUS_VERT_SYNC 0xC00000
#define CRTCSTATUS_VERT_BPORCH 0x800000
#define CRTCSTATUS_VERT_ACTIVE 0x000000
#define DACRAMWRITEADR 0xb0
#define DACRAMDATA 0xb1
#define DACPIXELMSK 0xb2
#define DACRAMREADADR 0xb3
#define DACOVSWRITEADR 0xb4
#define DACOVSDATA 0xb5
#define DACCOMMAND0 0xb6
#define DACOVSREADADR 0xb7
#define DACCOMMAND1 0xb8
#define DACCOMMAND2 0xb9
#define DACSTATUS 0xba
#define DACCOMMAND3 0xba
#define DACCURSORDATA 0xbb
#define DACCURSORXLOW 0xbc
#define DACCURSORXHIGH 0xbd
#define DACCURSORYLOW 0xbe
#define DACCURSORYHIGH 0xbf
#define BT_CO_COLORWR_ADDR DACOVSWRITEADR
#define BT_CO_COLORDATA DACOVSDATA
#define BT_PTR_ROWOFFSET 32
#define BT_PTR_COLUMNOFFSET 32
#define PLLDEV DEVICE0
#define VOUTEN 0x00080000L
#define VGASCLKOVER2 0x00100000L
#define PCLKSTARTEN 0x00800000L
#define STATEINDEX_IR 128
#define STATEINDEX_PC 129
#define STATEINDEX_S1 130
#define CONFIGIOREG 0xE0000014
#define CONFIGENABLE 0xE0000004
#ifdef USEROM
#define CONFIGROMREG 0xE0000030
#endif
#define ICACHESIZE 2048
#define ICACHELINESIZE 32
#ifndef ICACHE_ONOFF_MASK
#define ICACHE_ONOFF_MASK (((v_u32)1<<17)|(1<<3))
#define ICACHE_ON ((0<<17)|(0<<3))
#define ICACHE_OFF (((v_u32)1<<17)|(1<<3))
#endif
#define BT829_DEV DEVICE0
#define VIDEO_DECODER_DEV_ENABLE 0x4
#define VIDEO_DECODER_DEV_DISABLE 0x0
#define VINBASE_MASK 0x1FFFFFL
#define VINMAXVERT_SHIFT 24
#define VINSTRIDE_SHIFT 27
#define VINQSIZE_SHIFT 30
#define VINORDER_SHIFT 24
#define ACTIVE_LOW 0
#define ACTIVE_HI 1L
#define VINHSYNCHI_SHIFT 26
#define VINVSYNCHI_SHIFT 27
#define VINACTIVE_SHIFT 28
#define VINNOODD_SHIFT 29
#define VINENABLE_SHIFT 30
#endif