#ifndef _I830_COMMON_H_
#define _I830_COMMON_H_
#ifndef _I830_DEFINES_
#define _I830_DEFINES_
#define I830_DMA_BUF_ORDER 12
#define I830_DMA_BUF_SZ (1<<I830_DMA_BUF_ORDER)
#define I830_DMA_BUF_NR 256
#define I830_NR_SAREA_CLIPRECTS 8
#define I830_NR_TEX_REGIONS 64
#define I830_LOG_MIN_TEX_REGION_SIZE 16
#if !defined(I830_ENABLE_4_TEXTURES)
#define I830_TEXTURE_COUNT 2
#define I830_TEXBLEND_COUNT 2
#else
#define I830_TEXTURE_COUNT 4
#define I830_TEXBLEND_COUNT 4
#endif
#define I830_TEXBLEND_SIZE 12
#define I830_UPLOAD_CTX 0x1
#define I830_UPLOAD_BUFFERS 0x2
#define I830_UPLOAD_CLIPRECTS 0x4
#define I830_UPLOAD_TEX0_IMAGE 0x100
#define I830_UPLOAD_TEX0_CUBE 0x200
#define I830_UPLOAD_TEX1_IMAGE 0x400
#define I830_UPLOAD_TEX1_CUBE 0x800
#define I830_UPLOAD_TEX2_IMAGE 0x1000
#define I830_UPLOAD_TEX2_CUBE 0x2000
#define I830_UPLOAD_TEX3_IMAGE 0x4000
#define I830_UPLOAD_TEX3_CUBE 0x8000
#define I830_UPLOAD_TEX_N_IMAGE(n) (0x100 << (n * 2))
#define I830_UPLOAD_TEX_N_CUBE(n) (0x200 << (n * 2))
#define I830_UPLOAD_TEXIMAGE_MASK 0xff00
#define I830_UPLOAD_TEX0 0x10000
#define I830_UPLOAD_TEX1 0x20000
#define I830_UPLOAD_TEX2 0x40000
#define I830_UPLOAD_TEX3 0x80000
#define I830_UPLOAD_TEX_N(n) (0x10000 << (n))
#define I830_UPLOAD_TEX_MASK 0xf0000
#define I830_UPLOAD_TEXBLEND0 0x100000
#define I830_UPLOAD_TEXBLEND1 0x200000
#define I830_UPLOAD_TEXBLEND2 0x400000
#define I830_UPLOAD_TEXBLEND3 0x800000
#define I830_UPLOAD_TEXBLEND_N(n) (0x100000 << (n))
#define I830_UPLOAD_TEXBLEND_MASK 0xf00000
#define I830_UPLOAD_TEX_PALETTE_N(n) (0x1000000 << (n))
#define I830_UPLOAD_TEX_PALETTE_SHARED 0x4000000
#define I830_UPLOAD_STIPPLE 0x8000000
#define I830_DESTREG_CBUFADDR 0
#define I830_DESTREG_DBUFADDR 1
#define I830_DESTREG_DV0 2
#define I830_DESTREG_DV1 3
#define I830_DESTREG_SENABLE 4
#define I830_DESTREG_SR0 5
#define I830_DESTREG_SR1 6
#define I830_DESTREG_SR2 7
#define I830_DESTREG_DR0 8
#define I830_DESTREG_DR1 9
#define I830_DESTREG_DR2 10
#define I830_DESTREG_DR3 11
#define I830_DESTREG_DR4 12
#define I830_DEST_SETUP_SIZE 13
#define I830_CTXREG_STATE1 0
#define I830_CTXREG_STATE2 1
#define I830_CTXREG_STATE3 2
#define I830_CTXREG_STATE4 3
#define I830_CTXREG_STATE5 4
#define I830_CTXREG_IALPHAB 5
#define I830_CTXREG_STENCILTST 6
#define I830_CTXREG_ENABLES_1 7
#define I830_CTXREG_ENABLES_2 8
#define I830_CTXREG_AA 9
#define I830_CTXREG_FOGCOLOR 10
#define I830_CTXREG_BLENDCOLR0 11
#define I830_CTXREG_BLENDCOLR 12
#define I830_CTXREG_VF 13
#define I830_CTXREG_VF2 14
#define I830_CTXREG_MCSB0 15
#define I830_CTXREG_MCSB1 16
#define I830_CTX_SETUP_SIZE 17
#define I830_STPREG_ST0 0
#define I830_STPREG_ST1 1
#define I830_STP_SETUP_SIZE 2
#define I830_TEXREG_MI0 0
#define I830_TEXREG_MI1 1
#define I830_TEXREG_MI2 2
#define I830_TEXREG_MI3 3
#define I830_TEXREG_MI4 4
#define I830_TEXREG_MI5 5
#define I830_TEXREG_MF 6
#define I830_TEXREG_MLC 7
#define I830_TEXREG_MLL 8
#define I830_TEXREG_MCS 9
#define I830_TEX_SETUP_SIZE 10
#define I830_TEXREG_TM0LI 0
#define I830_TEXREG_TM0S0 1
#define I830_TEXREG_TM0S1 2
#define I830_TEXREG_TM0S2 3
#define I830_TEXREG_TM0S3 4
#define I830_TEXREG_TM0S4 5
#define I830_TEXREG_NOP0 6
#define I830_TEXREG_NOP1 7
#define I830_TEXREG_NOP2 8
#define __I830_TEXREG_MCS 9
#define __I830_TEX_SETUP_SIZE 10
#define I830_FRONT 0x1
#define I830_BACK 0x2
#define I830_DEPTH 0x4
#define DRM_I830_INIT 0x00
#define DRM_I830_VERTEX 0x01
#define DRM_I830_CLEAR 0x02
#define DRM_I830_FLUSH 0x03
#define DRM_I830_GETAGE 0x04
#define DRM_I830_GETBUF 0x05
#define DRM_I830_SWAP 0x06
#define DRM_I830_COPY 0x07
#define DRM_I830_DOCOPY 0x08
#define DRM_I830_FLIP 0x09
#define DRM_I830_IRQ_EMIT 0x0a
#define DRM_I830_IRQ_WAIT 0x0b
#define DRM_I830_GETPARAM 0x0c
#define DRM_I830_SETPARAM 0x0d
#endif
typedef struct {
enum {
I830_INIT_DMA = 0x01,
I830_CLEANUP_DMA = 0x02
} func;
unsigned int mmio_offset;
unsigned int buffers_offset;
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;
unsigned int ring_size;
unsigned int front_offset;
unsigned int back_offset;
unsigned int depth_offset;
unsigned int w;
unsigned int h;
unsigned int pitch;
unsigned int pitch_bits;
unsigned int back_pitch;
unsigned int depth_pitch;
unsigned int cpp;
} drmI830Init;
typedef struct {
int clear_color;
int clear_depth;
int flags;
unsigned int clear_colormask;
unsigned int clear_depthmask;
} drmI830Clear;
typedef struct {
int idx;
int used;
int discard;
} drmI830Vertex;
typedef struct {
int idx;
int used;
void *address;
} drmI830Copy;
typedef struct {
void *virtual;
int request_idx;
int request_size;
int granted;
} drmI830DMA;
typedef struct drm_i830_irq_emit {
int *irq_seq;
} drmI830IrqEmit;
typedef struct drm_i830_irq_wait {
int irq_seq;
} drmI830IrqWait;
typedef struct drm_i830_getparam {
int param;
int *value;
} drmI830GetParam;
#define I830_PARAM_IRQ_ACTIVE 1
typedef struct drm_i830_setparam {
int param;
int value;
} drmI830SetParam;
#define I830_SETPARAM_USE_MI_BATCHBUFFER_START 1
#endif