#ifndef ___ATIREGS_H___
#define ___ATIREGS_H___ 1
#include "atiutil.h"
#define SPARSE_IO_BASE 0x03fcu
#define SPARSE_IO_SELECT 0xfc00u
#define BLOCK_IO_BASE 0xff00u
#define BLOCK_IO_SELECT 0x00fcu
#define MM_IO_SELECT 0x03fcu
#define BLOCK_SELECT 0x0400u
#define DWORD_SELECT (BLOCK_SELECT | MM_IO_SELECT)
#define IO_BYTE_SELECT 0x0003u
#define SPARSE_IO_PORT (SPARSE_IO_BASE | IO_BYTE_SELECT)
#define BLOCK_IO_PORT (BLOCK_IO_BASE | IO_BYTE_SELECT)
#define IOPortTag(_SparseIOSelect, _BlockIOSelect) \
(SetBits(_SparseIOSelect, SPARSE_IO_SELECT) | \
SetBits(_BlockIOSelect, DWORD_SELECT))
#define SparseIOTag(_IOSelect) IOPortTag(_IOSelect, 0)
#define BlockIOTag(_IOSelect) IOPortTag(0, _IOSelect)
#define GENVS 0x0102u
#define R_GENLPS 0x03b9u
#define GENHP 0x03bfu
#define ATTRX 0x03c0u
#define ATTRD 0x03c1u
#define GENS0 0x03c2u
#define GENMO 0x03c2u
#define GENENB 0x03c3u
#define SEQX 0x03c4u
#define SEQD 0x03c5u
#define VGA_DAC_MASK 0x03c6u
#define VGA_DAC_READ 0x03c7u
#define VGA_DAC_WRITE 0x03c8u
#define VGA_DAC_DATA 0x03c9u
#define R_GENFC 0x03cau
#define R_GENMO 0x03ccu
#define GRAX 0x03ceu
#define GRAD 0x03cfu
#define GENB 0x03d9u
#define GENLPS 0x03dcu
#define KCX 0x03ddu
#define KCD 0x03deu
#define GENENA 0x46e8u
#define MonochromeIOBase 0x03b0u
#define ColourIOBase 0x03d0u
#define CRTX(_IOBase) ((_IOBase) + 0x04u)
#define CRTD(_IOBase) ((_IOBase) + 0x05u)
#define GENMC(_IOBase) ((_IOBase) + 0x08u)
#define GENS1(_IOBase) ((_IOBase) + 0x0au)
#define GENFC(_IOBase) ((_IOBase) + 0x0au)
#define GENLPC(_IOBase) ((_IOBase) + 0x0bu)
#define DISP_STAT 0x02e8u
#define SENSE 0x0001u
#define VBLANK 0x0002u
#define HORTOG 0x0004u
#define H_TOTAL 0x02e8u
#define IBM_DAC_MASK 0x02eau
#define IBM_DAC_READ 0x02ebu
#define IBM_DAC_WRITE 0x02ecu
#define IBM_DAC_DATA 0x02edu
#define H_DISP 0x06e8u
#define H_SYNC_STRT 0x0ae8u
#define H_SYNC_WID 0x0ee8u
#define HSYNCPOL_POS 0x0000u
#define HSYNCPOL_NEG 0x0020u
#define H_POLARITY_POS HSYNCPOL_POS
#define H_POLARITY_NEG HSYNCPOL_NEG
#define V_TOTAL 0x12e8u
#define V_DISP 0x16e8u
#define V_SYNC_STRT 0x1ae8u
#define V_SYNC_WID 0x1ee8u
#define VSYNCPOL_POS 0x0000u
#define VSYNCPOL_NEG 0x0020u
#define V_POLARITY_POS VSYNCPOL_POS
#define V_POLARITY_NEG VSYNCPOL_NEG
#define DISP_CNTL 0x22e8u
#define ODDBNKENAB 0x0001u
#define MEMCFG_2 0x0000u
#define MEMCFG_4 0x0002u
#define MEMCFG_6 0x0004u
#define MEMCFG_8 0x0006u
#define DBLSCAN 0x0008u
#define INTERLACE 0x0010u
#define DISPEN_NC 0x0000u
#define DISPEN_ENAB 0x0020u
#define DISPEN_DISAB 0x0040u
#define R_H_TOTAL 0x26e8u
#define SUBSYS_STAT 0x42e8u
#define VBLNKFLG 0x0001u
#define PICKFLAG 0x0002u
#define INVALIDIO 0x0004u
#define GPIDLE 0x0008u
#define MONITORID_MASK 0x0070u
#define MONITORID_8507 0x0010u
#define MONITORID_8514 0x0020u
#define MONITORID_8503 0x0050u
#define MONITORID_8512 0x0060u
#define MONITORID_8513 0x0060u
#define MONITORID_NONE 0x0070u
#define _8PLANE 0x0080u
#define SUBSYS_CNTL 0x42e8u
#define RVBLNKFLG 0x0001u
#define RPICKFLAG 0x0002u
#define RINVALIDIO 0x0004u
#define RGPIDLE 0x0008u
#define IVBLNKFLG 0x0100u
#define IPICKFLAG 0x0200u
#define IINVALIDIO 0x0400u
#define IGPIDLE 0x0800u
#define CHPTEST_NC 0x0000u
#define CHPTEST_NORMAL 0x1000u
#define CHPTEST_ENAB 0x2000u
#define GPCTRL_NC 0x0000u
#define GPCTRL_ENAB 0x4000u
#define GPCTRL_RESET 0x8000u
#define ROM_PAGE_SEL 0x46e8u
#define ADVFUNC_CNTL 0x4ae8u
#define DISABPASSTHRU 0x0001u
#define CLOKSEL 0x0004u
#define EXT_CONFIG_0 0x52e8u
#define EXT_CONFIG_1 0x56e8u
#define EXT_CONFIG_2 0x5ae8u
#define EXT_CONFIG_3 0x5ee8u
#define CUR_Y 0x82e8u
#define CUR_X 0x86e8u
#define DESTY_AXSTP 0x8ae8u
#define DESTX_DIASTP 0x8ee8u
#define ERR_TERM 0x92e8u
#define MAJ_AXIS_PCNT 0x96e8u
#define GP_STAT 0x9ae8u
#define GE_STAT 0x9ae8u
#define DATARDY 0x0100u
#define DATA_READY DATARDY
#define GPBUSY 0x0200u
#define CMD 0x9ae8u
#define WRTDATA 0x0001u
#define PLANAR 0x0002u
#define LASTPIX 0x0004u
#define LINETYPE 0x0008u
#define DRAW 0x0010u
#define INC_X 0x0020u
#define YMAJAXIS 0x0040u
#define INC_Y 0x0080u
#define PCDATA 0x0100u
#define _16BIT 0x0200u
#define CMD_NOP 0x0000u
#define CMD_OP_MSK 0xf000u
#define BYTSEQ 0x1000u
#define CMD_LINE 0x2000u
#define CMD_RECT 0x4000u
#define CMD_RECTV1 0x6000u
#define CMD_RECTV2 0x8000u
#define CMD_LINEAF 0xa000u
#define CMD_BITBLT 0xc000u
#define SHORT_STROKE 0x9ee8u
#define SSVDRAW 0x0010u
#define VECDIR_000 0x0000u
#define VECDIR_045 0x0020u
#define VECDIR_090 0x0040u
#define VECDIR_135 0x0060u
#define VECDIR_180 0x0080u
#define VECDIR_225 0x00a0u
#define VECDIR_270 0x00c0u
#define VECDIR_315 0x00e0u
#define BKGD_COLOR 0xa2e8u
#define FRGD_COLOR 0xa6e8u
#define WRT_MASK 0xaae8u
#define RD_MASK 0xaee8u
#define COLOR_CMP 0xb2e8u
#define BKGD_MIX 0xb6e8u
#define BSS_BKGDCOL 0x0000u
#define BSS_FRGDCOL 0x0020u
#define BSS_PCDATA 0x0040u
#define BSS_BITBLT 0x0060u
#define FRGD_MIX 0xbae8u
#define FSS_BKGDCOL 0x0000u
#define FSS_FRGDCOL 0x0020u
#define FSS_PCDATA 0x0040u
#define FSS_BITBLT 0x0060u
#define MULTIFUNC_CNTL 0xbee8u
#define MIN_AXIS_PCNT 0x0000u
#define SCISSORS_T 0x1000u
#define SCISSORS_L 0x2000u
#define SCISSORS_B 0x3000u
#define SCISSORS_R 0x4000u
#define M32_MEM_CNTL 0x5000u
#define HORCFG_4 0x0000u
#define HORCFG_5 0x0001u
#define HORCFG_8 0x0002u
#define HORCFG_10 0x0003u
#define VRTCFG_2 0x0000u
#define VRTCFG_4 0x0004u
#define VRTCFG_6 0x0008u
#define VRTCFG_8 0x000cu
#define BUFSWP 0x0010u
#define PATTERN_L 0x8000u
#define PATTERN_H 0x9000u
#define PIX_CNTL 0xa000u
#define PLANEMODE 0x0004u
#define COLCMPOP_F 0x0000u
#define COLCMPOP_T 0x0008u
#define COLCMPOP_GE 0x0010u
#define COLCMPOP_LT 0x0018u
#define COLCMPOP_NE 0x0020u
#define COLCMPOP_EQ 0x0028u
#define COLCMPOP_LE 0x0030u
#define COLCMPOP_GT 0x0038u
#define MIXSEL_FRGDMIX 0x0000u
#define MIXSEL_PATT 0x0040u
#define MIXSEL_EXPPC 0x0080u
#define MIXSEL_EXPBLT 0x00c0u
#define PIX_TRANS 0xe2e8u
#define OVERSCAN_COLOR_8 0x02eeu
#define OVERSCAN_BLUE_24 0x02efu
#define OVERSCAN_GREEN_24 0x06eeu
#define OVERSCAN_RED_24 0x06efu
#define CURSOR_OFFSET_LO 0x0aeeu
#define CURSOR_OFFSET_HI 0x0eeeu
#define CONFIG_STATUS_1 0x12eeu
#define CLK_MODE 0x0001u
#define BUS_16 0x0002u
#define MC_BUS 0x0004u
#define EEPROM_ENA 0x0008u
#define DRAM_ENA 0x0010u
#define MEM_INSTALLED 0x0060u
#define ROM_ENA 0x0080u
#define ROM_PAGE_ENA 0x0100u
#define ROM_LOCATION 0xfe00u
#define _8514_ONLY 0x0001u
#define BUS_TYPE 0x000eu
#define ISA_16_BIT 0x0000u
#define EISA 0x0002u
#define MICRO_C_16_BIT 0x0004u
#define MICRO_C_8_BIT 0x0006u
#define LOCAL_386SX 0x0008u
#define LOCAL_386DX 0x000au
#define LOCAL_486 0x000cu
#define PCI 0x000eu
#define MEM_TYPE 0x0070u
#define CHIP_DIS 0x0080u
#define TST_VCTR_ENA 0x0100u
#define DACTYPE 0x0e00u
#define MC_ADR_DECODE 0x1000u
#define CARD_ID 0xe000u
#define HORZ_CURSOR_POSN 0x12eeu
#define CONFIG_STATUS_2 0x16eeu
#define SHARE_CLOCK 0x0001u
#define HIRES_BOOT 0x0002u
#define EPROM_16_ENA 0x0004u
#define WRITE_PER_BIT 0x0008u
#define FLASH_ENA 0x0010u
#define SLOW_SEQ_EN 0x0001u
#define MEM_ADDR_DIS 0x0002u
#define ISA_16_ENA 0x0004u
#define KOR_TXT_MODE_ENA 0x0008u
#define LOCAL_BUS_SUPPORT 0x0030u
#define LOCAL_BUS_CONFIG_2 0x0040u
#define LOCAL_BUS_RD_DLY_ENA 0x0080u
#define LOCAL_DAC_EN 0x0100u
#define LOCAL_RDY_EN 0x0200u
#define EEPROM_ADR_SEL 0x0400u
#define GE_STRAP_SEL 0x0800u
#define VESA_RDY 0x1000u
#define Z4GB 0x2000u
#define LOC2_MDRAM 0x4000u
#define VERT_CURSOR_POSN 0x16eeu
#define FIFO_TEST_DATA 0x1aeeu
#define CURSOR_COLOR_0 0x1aeeu
#define CURSOR_COLOR_1 0x1aefu
#define HORZ_CURSOR_OFFSET 0x1eeeu
#define VERT_CURSOR_OFFSET 0x1eefu
#define PCI_CNTL 0x22eeu
#define CRT_PITCH 0x26eeu
#define CRT_OFFSET_LO 0x2aeeu
#define CRT_OFFSET_HI 0x2eeeu
#define LOCAL_CNTL 0x32eeu
#define FIFO_OPT 0x36eeu
#define MISC_OPTIONS 0x36eeu
#define W_STATE_ENA 0x0000u
#define HOST_8_ENA 0x0001u
#define MEM_SIZE_ALIAS 0x000cu
#define MEM_SIZE_512K 0x0000u
#define MEM_SIZE_1M 0x0004u
#define MEM_SIZE_2M 0x0008u
#define MEM_SIZE_4M 0x000cu
#define DISABLE_VGA 0x0010u
#define _16_BIT_IO 0x0020u
#define DISABLE_DAC 0x0040u
#define DLY_LATCH_ENA 0x0080u
#define TEST_MODE 0x0100u
#define BLK_WR_ENA 0x0400u
#define _64_DRAW_ENA 0x0800u
#define FIFO_TEST_TAG 0x3aeeu
#define EXT_CURSOR_COLOR_0 0x3aeeu
#define EXT_CURSOR_COLOR_1 0x3eeeu
#define MEM_BNDRY 0x42eeu
#define MEM_PAGE_BNDRY 0x000fu
#define MEM_BNDRY_ENA 0x0010u
#define SHADOW_CTL 0x46eeu
#define CLOCK_SEL 0x4aeeu
#define VFIFO_DEPTH_1 0x0100u
#define VFIFO_DEPTH_2 0x0200u
#define VFIFO_DEPTH_3 0x0300u
#define VFIFO_DEPTH_4 0x0400u
#define VFIFO_DEPTH_5 0x0500u
#define VFIFO_DEPTH_6 0x0600u
#define VFIFO_DEPTH_7 0x0700u
#define VFIFO_DEPTH_8 0x0800u
#define VFIFO_DEPTH_9 0x0900u
#define VFIFO_DEPTH_A 0x0a00u
#define VFIFO_DEPTH_B 0x0b00u
#define VFIFO_DEPTH_C 0x0c00u
#define VFIFO_DEPTH_D 0x0d00u
#define VFIFO_DEPTH_E 0x0e00u
#define VFIFO_DEPTH_F 0x0f00u
#define COMPOSITE_SYNC 0x1000u
#define ROM_ADDR_1 0x52eeu
#define BIOS_BASE_SEGMENT 0x007fu
#define ROM_ADDR_2 0x56eeu
#define SHADOW_SET 0x5aeeu
#define MEM_CFG 0x5eeeu
#define MEM_APERT_SEL 0x0003u
#define MEM_APERT_PAGE 0x000cu
#define MEM_APERT_LOC 0xfff0u
#define EXT_GE_STATUS 0x62eeu
#define HORZ_OVERSCAN 0x62eeu
#define VERT_OVERSCAN 0x66eeu
#define MAX_WAITSTATES 0x6aeeu
#define GE_OFFSET_LO 0x6eeeu
#define BOUNDS_LEFT 0x72eeu
#define GE_OFFSET_HI 0x72eeu
#define BOUNDS_TOP 0x76eeu
#define GE_PITCH 0x76eeu
#define BOUNDS_RIGHT 0x7aeeu
#define EXT_GE_CONFIG 0x7aeeu
#define MONITOR_ALIAS 0x0007u
#define MONITOR_8507 0x0001u
#define MONITOR_8514 0x0002u
#define MONITOR_8503 0x0005u
#define MONITOR_8512 0x0006u
#define MONITOR_8513 0x0006u
#define MONITOR_NONE 0x0007u
#define ALIAS_ENA 0x0008u
#define PIXEL_WIDTH_4 0x0000u
#define PIXEL_WIDTH_8 0x0010u
#define PIXEL_WIDTH_16 0x0020u
#define PIXEL_WIDTH_24 0x0030u
#define RGB16_555 0x0000u
#define RGB16_565 0x0040u
#define RGB16_655 0x0080u
#define RGB16_664 0x00c0u
#define MULTIPLEX_PIXELS 0x0100u
#define RGB24 0x0000u
#define RGBx24 0x0200u
#define BGR24 0x0400u
#define xBGR24 0x0600u
#define DAC_8_BIT_EN 0x4000u
#define ORDER_16BPP_565 RGB16_565
#define BOUNDS_BOTTOM 0x7eeeu
#define MISC_CNTL 0x7eeeu
#define PATT_DATA_INDEX 0x82eeu
#define R_EXT_GE_CONFIG 0x8eeeu
#define PATT_DATA 0x8eeeu
#define R_MISC_CNTL 0x92eeu
#define BRES_COUNT 0x96eeu
#define EXT_FIFO_STATUS 0x9aeeu
#define LINEDRAW_INDEX 0x9aeeu
#define LINEDRAW_OPT 0xa2eeu
#define BOUNDS_RESET 0x0100u
#define CLIP_MODE_0 0x0000u
#define CLIP_MODE_1 0x0200u
#define CLIP_MODE_2 0x0400u
#define CLIP_MODE_3 0x0600u
#define DEST_X_START 0xa6eeu
#define DEST_X_END 0xaaeeu
#define DEST_Y_END 0xaeeeu
#define R_H_TOTAL_DISP 0xb2eeu
#define SRC_X_STRT 0xb2eeu
#define R_H_SYNC_STRT 0xb6eeu
#define ALU_BG_FN 0xb6eeu
#define R_H_SYNC_WID 0xbaeeu
#define ALU_FG_FN 0xbaeeu
#define SRC_X_END 0xbeeeu
#define R_V_TOTAL 0xc2eeu
#define SRC_Y_DIR 0xc2eeu
#define R_V_DISP 0xc6eeu
#define EXT_SHORT_STROKE 0xc6eeu
#define R_V_SYNC_STRT 0xcaeeu
#define SCAN_X 0xcaeeu
#define VERT_LINE_CNTR 0xceeeu
#define DP_CONFIG 0xceeeu
#define READ_WRITE 0x0001u
#define DATA_WIDTH 0x0200u
#define DATA_ORDER 0x1000u
#define FG_COLOR_SRC_FG 0x2000u
#define FG_COLOR_SRC_BLIT 0x6000u
#define R_V_SYNC_WID 0xd2eeu
#define PATT_LENGTH 0xd2eeu
#define PATT_INDEX 0xd6eeu
#define READ_SRC_X 0xdaeeu
#define EXT_SCISSOR_L 0xdaeeu
#define READ_SRC_Y 0xdeeeu
#define EXT_SCISSOR_T 0xdeeeu
#define EXT_SCISSOR_R 0xe2eeu
#define EXT_SCISSOR_B 0xe6eeu
#define DEST_COMP_FN 0xeeeeu
#define DEST_COLOR_CMP_MASK 0xf2eeu
#define CHIP_ID 0xfaeeu
#define CHIP_CODE_0 0x001fu
#define CHIP_CODE_1 0x03e0u
#define CHIP_CLASS 0x0c00u
#define CHIP_REV 0xf000u
#define LINEDRAW 0xfeeeu
#define CRTC_H_TOTAL_DISP IOPortTag(0x00u, 0x00u)
#define CRTC_H_TOTAL 0x000001fful
#define CRTC_H_DISP 0x01ff0000ul
#define CRTC_H_SYNC_STRT_WID IOPortTag(0x01u, 0x01u)
#define CRTC_H_SYNC_STRT 0x000000fful
#define CRTC_H_SYNC_DLY 0x00000700ul
#define CRTC_H_SYNC_STRT_HI 0x00001000ul
#define CRTC_H_SYNC_WID 0x001f0000ul
#define CRTC_H_SYNC_POL 0x00200000ul
#define CRTC_V_TOTAL_DISP IOPortTag(0x02u, 0x02u)
#define CRTC_V_TOTAL 0x000007fful
#define CRTC_V_DISP 0x07ff0000ul
#define CRTC_V_SYNC_STRT_WID IOPortTag(0x03u, 0x03u)
#define CRTC_V_SYNC_STRT 0x000007fful
#define CRTC_V_SYNC_WID 0x001f0000ul
#define CRTC_V_SYNC_POL 0x00200000ul
#define CRTC_VLINE_CRNT_VLINE IOPortTag(0x04u, 0x04u)
#define CRTC_VLINE 0x000007fful
#define CRTC_CRNT_VLINE 0x07ff0000ul
#define CRTC_OFF_PITCH IOPortTag(0x05u, 0x05u)
#define CRTC_OFFSET 0x000ffffful
#define CRTC_OFFSET_VGA 0x0003fffful
#define CRTC_OFFSET_LOCK 0x00100000ul
#define CRTC_PITCH 0xffc00000ul
#define CRTC_INT_CNTL IOPortTag(0x06u, 0x06u)
#define CRTC_VBLANK 0x00000001ul
#define CRTC_VBLANK_INT_EN 0x00000002ul
#define CRTC_VBLANK_INT 0x00000004ul
#define CRTC_VLINE_INT_EN 0x00000008ul
#define CRTC_VLINE_INT 0x00000010ul
#define CRTC_VLINE_SYNC 0x00000020ul
#define CRTC_FRAME 0x00000040ul
#define CRTC_SNAPSHOT_INT_EN 0x00000080ul
#define CRTC_SNAPSHOT_INT 0x00000100ul
#define CRTC_I2C_INT_EN 0x00000200ul
#define CRTC_I2C_INT 0x00000400ul
#define CRTC2_VBLANK 0x00000800ul
#define CRTC2_VBLANK_INT_EN 0x00001000ul
#define CRTC2_VBLANK_INT 0x00002000ul
#define CRTC2_VLINE_INT_EN 0x00004000ul
#define CRTC2_VLINE_INT 0x00008000ul
#define CRTC_CAPBUF0_INT_EN 0x00010000ul
#define CRTC_CAPBUF0_INT 0x00020000ul
#define CRTC_CAPBUF1_INT_EN 0x00040000ul
#define CRTC_CAPBUF1_INT 0x00080000ul
#define CRTC_OVERLAY_EOF_INT_EN 0x00100000ul
#define CRTC_OVERLAY_EOF_INT 0x00200000ul
#define CRTC_ONESHOT_CAP_INT_EN 0x00400000ul
#define CRTC_ONESHOT_CAP_INT 0x00800000ul
#define CRTC_BUSMASTER_EOL_INT_EN 0x01000000ul
#define CRTC_BUSMASTER_EOL_INT 0x02000000ul
#define CRTC_GP_INT_EN 0x04000000ul
#define CRTC_GP_INT 0x08000000ul
#define CRTC2_VLINE_SYNC 0x10000000ul
#define CRTC_SNAPSHOT2_INT_EN 0x20000000ul
#define CRTC_SNAPSHOT2_INT 0x40000000ul
#define CRTC_VBLANK_BIT2_INT 0x80000000ul
#define CRTC_INT_ENS \
( \
CRTC_VBLANK_INT_EN | \
CRTC_VLINE_INT_EN | \
CRTC_SNAPSHOT_INT_EN | \
CRTC_I2C_INT_EN | \
CRTC2_VBLANK_INT_EN | \
CRTC2_VLINE_INT_EN | \
CRTC_CAPBUF0_INT_EN | \
CRTC_CAPBUF1_INT_EN | \
CRTC_OVERLAY_EOF_INT_EN | \
CRTC_ONESHOT_CAP_INT_EN | \
CRTC_BUSMASTER_EOL_INT_EN | \
CRTC_GP_INT_EN | \
CRTC_SNAPSHOT2_INT_EN | \
0 \
)
#define CRTC_INT_ACKS \
( \
CRTC_VBLANK_INT | \
CRTC_VLINE_INT | \
CRTC_SNAPSHOT_INT | \
CRTC_I2C_INT | \
CRTC2_VBLANK_INT | \
CRTC2_VLINE_INT | \
CRTC_CAPBUF0_INT | \
CRTC_CAPBUF1_INT | \
CRTC_OVERLAY_EOF_INT | \
CRTC_ONESHOT_CAP_INT | \
CRTC_BUSMASTER_EOL_INT | \
CRTC_GP_INT | \
CRTC_SNAPSHOT2_INT | \
CRTC_VBLANK_BIT2_INT | \
0 \
)
#define CRTC_GEN_CNTL IOPortTag(0x07u, 0x07u)
#define CRTC_DBL_SCAN_EN 0x00000001ul
#define CRTC_INTERLACE_EN 0x00000002ul
#define CRTC_HSYNC_DIS 0x00000004ul
#define CRTC_VSYNC_DIS 0x00000008ul
#define CRTC_CSYNC_EN 0x00000010ul
#define CRTC_PIX_BY_2_EN 0x00000020ul
#define CRTC2_DBL_SCAN_EN 0x00000020ul
#define CRTC_DISPLAY_DIS 0x00000040ul
#define CRTC_VGA_XOVERSCAN 0x00000080ul
#define CRTC_PIX_WIDTH 0x00000700ul
#define CRTC_BYTE_PIX_ORDER 0x00000800ul
#define CRTC_VSYNC_INT_EN 0x00001000ul
#define CRTC_VSYNC_INT 0x00002000ul
#define CRTC_FIFO_OVERFILL 0x0000c000ul
#define CRTC2_VSYNC_INT_EN 0x00004000ul
#define CRTC2_VSYNC_INT 0x00008000ul
#define CRTC_FIFO_LWM 0x000f0000ul
#define CRTC_HVSYNC_IO_DRIVE 0x00010000ul
#define CRTC2_PIX_WIDTH 0x000e0000ul
#define CRTC_VGA_128KAP_PAGING 0x00100000ul
#define CRTC_DISPREQ_ONLY 0x00200000ul
#define CRTC_VFC_SYNC_TRISTATE 0x00200000ul
#define CRTC2_EN 0x00200000ul
#define CRTC_LOCK_REGS 0x00400000ul
#define CRTC_SYNC_TRISTATE 0x00800000ul
#define CRTC_EXT_DISP_EN 0x01000000ul
#define CRTC_EN 0x02000000ul
#define CRTC_DISP_REQ_EN 0x04000000ul
#define CRTC_VGA_LINEAR 0x08000000ul
#define CRTC_VSYNC_FALL_EDGE 0x10000000ul
#define CRTC_VGA_TEXT_132 0x20000000ul
#define CRTC_CNT_EN 0x40000000ul
#define CRTC_CUR_B_TEST 0x80000000ul
#define CRTC_INT_ENS_X \
( \
CRTC_VSYNC_INT_EN | \
CRTC2_VSYNC_INT_EN | \
0 \
)
#define CRTC_INT_ACKS_X \
( \
CRTC_VSYNC_INT | \
CRTC2_VSYNC_INT | \
0 \
)
#define DSP_CONFIG BlockIOTag(0x08u)
#define DSP_XCLKS_PER_QW 0x00003ffful
#define DSP_FLUSH_WB 0x00008000ul
#define DSP_LOOP_LATENCY 0x000f0000ul
#define DSP_PRECISION 0x00700000ul
#define DSP_ON_OFF BlockIOTag(0x09u)
#define DSP_OFF 0x000007fful
#define DSP_ON 0x07ff0000ul
#define TIMER_CONFIG BlockIOTag(0x0au)
#define MEM_BUF_CNTL BlockIOTag(0x0bu)
#define SHARED_CNTL BlockIOTag(0x0cu)
#define SHARED_MEM_CONFIG BlockIOTag(0x0du)
#define MEM_ADDR_CONFIG BlockIOTag(0x0du)
#define SHARED_CNTL_CTD BlockIOTag(0x0eu)
#define CTD_FIFO5 0x01000000ul
#define CRT_TRAP BlockIOTag(0x0eu)
#define DSTN_CONTROL BlockIOTag(0x0fu)
#define I2C_CNTL_0 BlockIOTag(0x0fu)
#define I2C_CNTL_STAT 0x0000000ful
#define I2C_CNTL_DONE 0x00000001ul
#define I2C_CNTL_NACK 0x00000002ul
#define I2C_CNTL_HALT 0x00000004ul
#define I2C_CNTL_FULL 0x00000008ul
#define I2C_CNTL_HPTR_RST 0x00000020ul
#define I2C_CNTL_START 0x00000100ul
#define I2C_CNTL_STOP 0x00000200ul
#define I2C_CNTL_GO 0x00000400ul
#define I2C_CNTL_RECEIVE 0x00000800ul
#define I2C_CNTL_ABORT 0x00001000ul
#define I2C_CNTL_INT_EN 0x00002000ul
#define I2C_CNTL_SCL 0x00004000ul
#define I2C_CNTL_SDA 0x00008000ul
#define I2C_CNTL_M_FACTOR 0x00ff0000ul
#define I2C_CNTL_N_FACTOR 0xff000000ul
#define OVR_CLR IOPortTag(0x08u, 0x10u)
#define OVR_CLR_8 0x000000fful
#define OVR_CLR_B 0x0000ff00ul
#define OVR_CLR_G 0x00ff0000ul
#define OVR_CLR_R 0xff000000ul
#define OVR_WID_LEFT_RIGHT IOPortTag(0x09u, 0x11u)
#define OVR_WID_LEFT 0x0000003ful
#define OVR_WID_RIGHT 0x003f0000ul
#define OVR_WID_TOP_BOTTOM IOPortTag(0x0au, 0x12u)
#define OVR_WID_TOP 0x000001fful
#define OVR_WID_BOTTOM 0x01ff0000ul
#define VGA_DSP_CONFIG BlockIOTag(0x13u)
#define VGA_DSP_XCLKS_PER_QW DSP_XCLKS_PER_QW
#define VGA_DSP_PREC_PCLKBY2 0x00700000ul
#define VGA_DSP_PREC_PCLK 0x07000000ul
#define VGA_DSP_ON_OFF BlockIOTag(0x14u)
#define VGA_DSP_OFF DSP_OFF
#define VGA_DSP_ON DSP_ON
#define DSP2_CONFIG BlockIOTag(0x15u)
#define DSP2_ON_OFF BlockIOTag(0x16u)
#define EXT_CRTC_GEN_CNTL BlockIOTag(0x17u)
#define CRTC2_OFF_PITCH BlockIOTag(0x17u)
#define CUR_CLR0 IOPortTag(0x0bu, 0x18u)
#define CUR_CLR1 IOPortTag(0x0cu, 0x19u)
#define CUR_CLR_I 0x000000fful
#define CUR_CLR_B 0x0000ff00ul
#define CUR_CLR_G 0x00ff0000ul
#define CUR_CLR_R 0xff000000ul
#define CUR_CLR (CUR_CLR_R | CUR_CLR_G | CUR_CLR_B)
#define CUR_OFFSET IOPortTag(0x0du, 0x1au)
#define CUR_HORZ_VERT_POSN IOPortTag(0x0eu, 0x1bu)
#define CUR_HORZ_POSN 0x000007fful
#define CUR_VERT_POSN 0x07ff0000ul
#define CUR_HORZ_VERT_OFF IOPortTag(0x0fu, 0x1cu)
#define CUR_HORZ_OFF 0x0000007ful
#define CUR_VERT_OFF 0x007f0000ul
#define CONFIG_PANEL BlockIOTag(0x1du)
#define PANEL_FORMAT 0x00000007ul
#define PANEL_TYPE 0x000000f0ul
#define NO_OF_GREY 0x00000700ul
#define MOD_GEN 0x00001800ul
#define EXT_LVDS_CLK 0x00001800ul
#define BLINK_RATE 0x00006000ul
#define BLINK_RATE_PRO 0x00002000ul
#define DONT_SHADOW_HEND 0x00004000ul
#define DONT_USE_F32KHZ 0x00008000ul
#define LCD_IO_DRIVE 0x00008000ul
#define FP_POL 0x00010000ul
#define LP_POL 0x00020000ul
#define DTMG_POL 0x00040000ul
#define SCK_POL 0x00080000ul
#define DITHER_SEL 0x00300000ul
#define INVERSE_VIDEO_EN 0x00400000ul
#define BL_CLK_SEL 0x01800000ul
#define BL_LEVEL 0x0e000000ul
#define BL_CLK_SEL_PRO 0x00800000ul
#define BL_LEVEL_PRO 0x03000000ul
#define BIAS_LEVEL_PRO 0x0c000000ul
#define HSYNC_DELAY 0xf0000000ul
#define TV_OUT_INDEX BlockIOTag(0x1du)
#define TV_REG_INDEX 0x000000fful
#define TV_ON 0x00000100ul
#define GP_IO IOPortTag(0x1eu, 0x1eu)
#define GP_IO_0 0x00000001ul
#define GP_IO_1 0x00000002ul
#define GP_IO_2 0x00000004ul
#define GP_IO_3 0x00000008ul
#define GP_IO_4 0x00000010ul
#define GP_IO_5 0x00000020ul
#define GP_IO_6 0x00000040ul
#define GP_IO_7 0x00000080ul
#define GP_IO_8 0x00000100ul
#define GP_IO_9 0x00000200ul
#define GP_IO_A 0x00000400ul
#define GP_IO_B 0x00000800ul
#define GP_IO_C 0x00001000ul
#define GP_IO_D 0x00002000ul
#define GP_IO_E 0x00004000ul
#define GP_IO_F 0x00008000ul
#define GP_IO_DIR_0 0x00010000ul
#define GP_IO_DIR_1 0x00020000ul
#define GP_IO_DIR_2 0x00040000ul
#define GP_IO_DIR_3 0x00080000ul
#define GP_IO_DIR_4 0x00100000ul
#define GP_IO_DIR_5 0x00200000ul
#define GP_IO_DIR_6 0x00400000ul
#define GP_IO_DIR_7 0x00800000ul
#define GP_IO_DIR_8 0x01000000ul
#define GP_IO_DIR_9 0x02000000ul
#define GP_IO_DIR_A 0x04000000ul
#define GP_IO_DIR_B 0x08000000ul
#define GP_IO_DIR_C 0x10000000ul
#define GP_IO_DIR_D 0x20000000ul
#define GP_IO_DIR_E 0x40000000ul
#define GP_IO_DIR_F 0x80000000ul
#define GP_IO_CNTL BlockIOTag(0x1fu)
#define GP_IO_MODE 0x0000000ful
#define GP_IO_EN 0x80000000ul
#define HW_DEBUG BlockIOTag(0x1fu)
#define FAST_SRCCOPY_DIS 0x00000001ul
#define BYPASS_SUBPIC_DBF 0x00000001ul
#define SRC_AUTONA_FIX_DIS 0x00000002ul
#define SYNC_PD_EN 0x00000002ul
#define DISP_QW_FIX_DIS 0x00000004ul
#define GUIDST_WB_EXP_DIS 0x00000008ul
#define CYC_ALL_FIX_DIS 0x00000008ul
#define AGPPLL_FIX_EN 0x00000008ul
#define SRC_AUTONA_ALWAYS_EN 0x00000010ul
#define GUI_BEATS_HOST_P 0x00000010ul
#define DRV_CNTL_DQMB_WEB 0x00000020ul
#define FAST_FILL_SCISSOR_DIS 0x00000020ul
#define INTER_BLIT_FIX_DIS 0x00000020ul
#define DRV_CNTL_MA 0x00000040ul
#define AUTO_BLKWRT_COLOR_DIS 0x00000040ul
#define INTER_PRIM_DIS 0x00000040ul
#define DRV_CNTL_MD 0x00000080ul
#define CHG_DEV_ID 0x00000100ul
#define SRC_TRACK_DST_FIX_DIS 0x00000200ul
#define HCLK_FB_SKEW 0x00000380ul
#define SRC_TRACK_DST_FIX_DIS_P 0x00000080ul
#define AUTO_BLKWRT_COLOR_DIS_P 0x00000100ul
#define INTER_LINE_OVERLAP_DIS 0x00000200ul
#define MEM_OE_PULLBACK 0x00000400ul
#define DBL_BUFFER_EN 0x00000400ul
#define MEM_WE_FIX_DIS 0x00000800ul
#define MEM_OE_PULLBACK_B 0x00000800ul
#define CMDFIFO_SIZE_EN 0x00000800ul
#define RD_EN_FIX_DIS 0x00001000ul
#define MEM_WE_FIX_DIS_B 0x00001000ul
#define AUTO_FF_DIS 0x00001000ul
#define CMDFIFO_SIZE_DIS 0x00002000ul
#define AUTO_BLKWRT_DIS 0x00002000ul
#define GUI_BEATS_HOST 0x00004000ul
#define ORED_INVLD_RB_CACHE 0x00004000ul
#define BLOCK_DBL_BUF 0x00008000ul
#define R2W_TURNAROUND_DELAY 0x00020000ul
#define ENA_32BIT_DATA_BUS 0x00040000ul
#define HCLK_FB_SKEW_P 0x00070000ul
#define ENA_FLASH_ROM 0x00080000ul
#define DISABLE_SWITCH_FIX 0x00080000ul
#define MCLK_START_EN 0x00080000ul
#define SEL_VBLANK_BDL_BUF 0x00100000ul
#define CMDFIFO_64EN 0x00200000ul
#define BM_FIX_DIS 0x00400000ul
#define Z_SWITCH_EN 0x00800000ul
#define FLUSH_HOST_WB 0x01000000ul
#define HW_DEBUG_WRITE_MSK_FIX_DIS 0x02000000ul
#define Z_NO_WRITE_EN 0x04000000ul
#define DISABLE_PCLK_RESET_P 0x08000000ul
#define PM_D3_SUPPORT_ENABLE_P 0x10000000ul
#define STARTCYCLE_FIX_ENABLE 0x20000000ul
#define DONT_RST_CHAREN 0x20000000ul
#define C3_FIX_ENABLE 0x40000000ul
#define BM_HOSTRA_EN 0x40000000ul
#define PKGBGAb 0x80000000ul
#define AUTOEXP_HORZ_FIX 0x80000000ul
#define SCRATCH_REG0 IOPortTag(0x10u, 0x20u)
#define SCRATCH_REG1 IOPortTag(0x11u, 0x21u)
#define BIOS_INIT_DAC_SUBTYPE 0x0000f000ul
#define SCRATCH_REG2 BlockIOTag(0x22u)
#define SCRATCH_REG3 BlockIOTag(0x23u)
#define DISPLAY_SWITCH_DISABLE 0x08000000ul
#define CLOCK_CNTL IOPortTag(0x12u, 0x24u)
#define CLOCK_BIT 0x00000004ul
#define CLOCK_PULSE 0x00000008ul
#define CLOCK_SELECT 0x0000000ful
#define CLOCK_DIVIDER 0x00000030ul
#define CLOCK_STROBE 0x00000040ul
#define CLOCK_DATA 0x00000080ul
#define PLL_WR_EN 0x00000200ul
#define PLL_ADDR 0x0000fc00ul
#define PLL_DATA 0x00ff0000ul
#define CONFIG_STAT64_1 BlockIOTag(0x25u)
#define CFG_SUBSYS_DEV_ID 0x000000fful
#define CFG_SUBSYS_VEN_ID 0x00ffff00ul
#define CFG_DIMM_TYPE 0xe0000000ul
#define CFG_PCI_SUBSYS_DEV_ID 0x0000fffful
#define CFG_PCI_SUBSYS_VEN_ID 0xffff0000ul
#define CONFIG_STAT64_2 BlockIOTag(0x26u)
#define CFG_DIMM_TYPE_3 0x00000001ul
#define CFG_ROMWRTEN 0x00000020ul
#define CFG_AGPVCOGAIN 0x000000c0ul
#define CFG_PCI_TYPE 0x00000100ul
#define CFG_AGPSKEW 0x00000e00ul
#define CFG_X1CLKSKEW 0x00007000ul
#define CFG_PANEL_ID_P 0x000f8000ul
#define CFG_PREFETCH_EN 0x00200000ul
#define CFG_ID_DISABLE 0x00400000ul
#define CFG_PRE_TESTEN 0x00800000ul
#define CFG_PCI5VEN 0x02000000ul
#define CFG_VGA_DISABLE 0x04000000ul
#define CFG_ENINTB 0x08000000ul
#define CFG_ROM_REMAP_2 0x20000000ul
#define CFG_IDSEL 0x40000000ul
#define TV_OUT_DATA BlockIOTag(0x27u)
#define BUS_CNTL IOPortTag(0x13u, 0x28u)
#define BUS_WS 0x0000000ful
#define BUS_DBL_RESYNC 0x00000001ul
#define BUS_MSTR_RESET 0x00000002ul
#define BUS_FLUSH_BUF 0x00000004ul
#define BUS_STOP_REQ_DIS 0x00000008ul
#define BUS_ROM_WS 0x000000f0ul
#define BUS_APER_REG_DIS 0x00000010ul
#define BUS_EXTRA_PIPE_DIS 0x00000020ul
#define BUS_MASTER_DIS 0x00000040ul
#define BUS_ROM_WRT_EN 0x00000080ul
#define BUS_ROM_PAGE 0x00000f00ul
#define BUS_MINOR_REV_ID 0x00000700ul
#define BUS_CHIP_HIDDEN_REV 0x00000300ul
#define BUS_ROM_DIS 0x00001000ul
#define BUS_IO_16_EN 0x00002000ul
#define BUS_PCI_READ_RETRY_EN 0x00002000ul
#define BUS_DAC_SNOOP_EN 0x00004000ul
#define BUS_PCI_RETRY_EN 0x00008000ul
#define BUS_PCI_WRT_RETRY_EN 0x00008000ul
#define BUS_FIFO_WS 0x000f0000ul
#define BUS_RETRY_WS 0x000f0000ul
#define BUS_FIFO_ERR_INT_EN 0x00100000ul
#define BUS_MSTR_RD_MULT 0x00100000ul
#define BUS_FIFO_ERR_INT 0x00200000ul
#define BUS_MSTR_RD_LINE 0x00200000ul
#define BUS_HOST_ERR_INT_EN 0x00400000ul
#define BUS_SUSPEND 0x00400000ul
#define BUS_HOST_ERR_INT 0x00800000ul
#define BUS_LAT16X 0x00800000ul
#define BUS_PCI_DAC_WS 0x07000000ul
#define BUS_RD_DISCARD_EN 0x01000000ul
#define BUS_RD_ABORT_EN 0x02000000ul
#define BUS_MSTR_WS 0x04000000ul
#define BUS_PCI_DAC_DLY 0x08000000ul
#define BUS_EXT_REG_EN 0x08000000ul
#define BUS_PCI_MEMW_WS 0x10000000ul
#define BUS_MSTR_DISCONNECT_EN 0x10000000ul
#define BUS_PCI_BURST_DEC 0x20000000ul
#define BUS_BURST 0x20000000ul
#define BUS_WRT_BURST 0x20000000ul
#define BUS_RDY_READ_DLY 0xc0000000ul
#define BUS_READ_BURST 0x40000000ul
#define BUS_RDY_READ_DLY_B 0x80000000ul
#define LCD_INDEX BlockIOTag(0x29u)
#define LCD_REG_INDEX 0x0000003ful
#define LCD_DISPLAY_DIS 0x00000100ul
#define LCD_SRC_SEL 0x00000200ul
#define LCD_SRC_SEL_CRTC1 0x00000000ul
#define LCD_SRC_SEL_CRTC2 0x00000200ul
#define LCD_CRTC2_DISPLAY_DIS 0x00000400ul
#define LCD_GUI_ACTIVE 0x00000800ul
#define LCD_MONDET_SENSE 0x01000000ul
#define LCD_MONDET_INT_POL 0x02000000ul
#define LCD_MONDET_INT_EN 0x04000000ul
#define LCD_MONDET_INT 0x08000000ul
#define LCD_MONDET_EN 0x10000000ul
#define LCD_EN_PL 0x20000000ul
#define HFB_PITCH_ADDR BlockIOTag(0x2au)
#define LCD_DATA BlockIOTag(0x2au)
#define EXT_MEM_CNTL BlockIOTag(0x2bu)
#define MEM_CNTL IOPortTag(0x14u, 0x2cu)
#define CTL_MEM_SIZE 0x00000007ul
#define CTL_MEM_REFRESH 0x00000078ul
#define CTL_MEM_SIZEB 0x0000000ful
#define CTL_MEM_RD_LATCH_EN 0x00000010ul
#define CTL_MEM_RD_LATCH_DLY 0x00000020ul
#define CTL_MEM_LATENCY 0x00000030ul
#define CTL_MEM_SD_LATCH_EN 0x00000040ul
#define CTL_MEM_SD_LATCH_DLY 0x00000080ul
#define CTL_MEM_LATCH 0x000000c0ul
#define CTL_MEM_WDOE_CNTL 0x000000c0ul
#define CTL_MEM_FULL_PLS 0x00000100ul
#define CTL_MEM_CYC_LNTH_AUX 0x00000180ul
#define CTL_MEM_TRP 0x00000300ul
#define CTL_MEM_CYC_LNTH 0x00000600ul
#define CTL_MEM_REFRESH_RATE 0x00001800ul
#define CTL_MEM_TRCD 0x00000c00ul
#define CTL_MEM_WR_RDY_SEL 0x00000800ul
#define CTL_MEM_EXT_RMW_CYC_EN 0x00001000ul
#define CTL_MEM_TCRD 0x00001000ul
#define CTL_MEM_DLL_RESET 0x00002000ul
#define CTL_MEM_TR2W 0x00002000ul
#define CTL_MEM_ACTV_PRE 0x0000c000ul
#define CTL_MEM_CAS_PHASE 0x00004000ul
#define CTL_MEM_OE_PULLBACK 0x00008000ul
#define CTL_MEM_TWR 0x0000c000ul
#define CTL_MEM_BNDRY 0x00030000ul
#define CTL_MEM_BNDRY_0K 0x00000000ul
#define CTL_MEM_BNDRY_256K 0x00010000ul
#define CTL_MEM_BNDRY_512K 0x00020000ul
#define CTL_MEM_BNDRY_1024K 0x00030000ul
#define CTL_MEM_DLL_GAIN_CNTL 0x00030000ul
#define CTL_MEM_BNDRY_EN 0x00040000ul
#define CTL_MEM_SDRAM_RESET 0x00040000ul
#define CTL_MEM_TRAS 0x00070000ul
#define CTL_MEM_TILE_SELECT 0x00180000ul
#define CTL_MEM_REFRESH_DIS 0x00080000ul
#define CTL_MEM_LOW_LATENCY_MODE 0x00200000ul
#define CTL_MEM_CDE_PULLBACK 0x00400000ul
#define CTL_MEM_REFRESH_RATE_B 0x00f00000ul
#define CTL_MEM_PIX_WIDTH 0x07000000ul
#define CTL_MEM_LOWER_APER_ENDIAN 0x03000000ul
#define CTL_MEM_OE_SELECT 0x18000000ul
#define CTL_MEM_UPPER_APER_ENDIAN 0x0c000000ul
#define CTL_MEM_PAGE_SIZE 0x30000000ul
#define MEM_VGA_WP_SEL IOPortTag(0x15u, 0x2du)
#define MEM_VGA_WPS0 0x0000fffful
#define MEM_VGA_WPS1 0xffff0000ul
#define MEM_VGA_RP_SEL IOPortTag(0x16u, 0x2eu)
#define MEM_VGA_RPS0 0x0000fffful
#define MEM_VGA_RPS1 0xffff0000ul
#define LT_GIO BlockIOTag(0x2fu)
#define I2C_CNTL_1 BlockIOTag(0x2fu)
#define I2C_DATA_PORT 0x000000fful
#define I2C_DATA_COUNT 0x0000ff00ul
#define I2C_ADDR_COUNT 0x00070000ul
#define I2C_SEL 0x00400000ul
#define I2C_TIME_LIMIT 0xff000000ul
#define DAC_REGS IOPortTag(0x17u, 0x30u)
#define M64_DAC_WRITE (DAC_REGS + 0)
#define M64_DAC_DATA (DAC_REGS + 1)
#define M64_DAC_MASK (DAC_REGS + 2)
#define M64_DAC_READ (DAC_REGS + 3)
#define DAC_CNTL IOPortTag(0x18u, 0x31u)
#define DAC_EXT_SEL 0x00000003ul
#define DAC_EXT_SEL_RS2 0x000000001ul
#define DAC_EXT_SEL_RS3 0x000000002ul
#define DAC_RANGE_CTL 0x00000003ul
#define DAC_BLANKING 0x00000004ul
#define DAC_CMP_DIS 0x00000008ul
#define DAC1_CLK_SEL 0x00000010ul
#define DAC_PALETTE_ACCESS_CNTL 0x00000020ul
#define DAC_PALETTE2_SNOOP_EN 0x00000040ul
#define DAC_CMP_OUTPUT 0x00000080ul
#define DAC_8BIT_EN 0x00000100ul
#define DAC_PIX_DLY 0x00000600ul
#define DAC_DIRECT 0x00000400ul
#define DAC_BLANK_ADJ 0x00001800ul
#define DAC_PAL_CLK_SEL 0x00000800ul
#define DAC_CRT_SENSE 0x00000800ul
#define DAC_CRT_DETECTION_ON 0x00001000ul
#define DAC_VGA_ADR_EN 0x00002000ul
#define DAC_FEA_CON_EN 0x00004000ul
#define DAC_PDMN 0x00008000ul
#define DAC_TYPE 0x00070000ul
#define DAC_MON_ID_STATE0 0x01000000ul
#define DAC_GIO_STATE_1 0x01000000ul
#define DAC_MON_ID_STATE1 0x02000000ul
#define DAC_GIO_STATE_0 0x02000000ul
#define DAC_MON_ID_STATE2 0x04000000ul
#define DAC_GIO_STATE_4 0x04000000ul
#define DAC_MON_ID_DIR0 0x08000000ul
#define DAC_GIO_DIR_1 0x08000000ul
#define DAC_MON_ID_DIR1 0x10000000ul
#define DAC_GIO_DIR_0 0x10000000ul
#define DAC_MON_ID_DIR2 0x20000000ul
#define DAC_GIO_DIR_4 0x20000000ul
#define DAC_MAN_CMP_STATE 0x40000000ul
#define DAC_RW_WS 0x80000000ul
#define HORZ_STRETCHING BlockIOTag(0x32u)
#define HORZ_STRETCH_BLEND 0x00000ffful
#define HORZ_STRETCH_RATIO 0x0000fffful
#define HORZ_STRETCH_LOOP 0x00070000ul
#define HORZ_STRETCH_LOOP09 0x00000000ul
#define HORZ_STRETCH_LOOP11 0x00010000ul
#define HORZ_STRETCH_LOOP12 0x00020000ul
#define HORZ_STRETCH_LOOP14 0x00030000ul
#define HORZ_STRETCH_LOOP15 0x00040000ul
#define HORZ_PANEL_SIZE 0x0ff00000ul
#define AUTO_HORZ_RATIO 0x20000000ul
#define HORZ_STRETCH_MODE 0x40000000ul
#define HORZ_STRETCH_EN 0x80000000ul
#define EXT_DAC_REGS BlockIOTag(0x32u)
#define EXT_DAC_REG_SEL 0x0000000ful
#define EXT_DAC_DATA 0x0000ff00ul
#define EXT_DAC_EN 0x00010000ul
#define EXT_DAC_WID 0x00020000ul
#define VERT_STRETCHING BlockIOTag(0x33u)
#define VERT_STRETCH_RATIO0 0x000003fful
#define VERT_STRETCH_RATIO1 0x000ffc00ul
#define VERT_STRETCH_RATIO2 0x3ff00000ul
#define VERT_STRETCH_USE0 0x40000000ul
#define VERT_STRETCH_EN 0x80000000ul
#define GEN_TEST_CNTL IOPortTag(0x19u, 0x34u)
#define GEN_EE_DATA_OUT 0x00000001ul
#define GEN_GIO2_DATA_OUT 0x00000001ul
#define GEN_EE_CLOCK 0x00000002ul
#define GEN_EE_CHIP_SEL 0x00000004ul
#define GEN_GIO3_DATA_OUT 0x00000004ul
#define GEN_EE_DATA_IN 0x00000008ul
#define GEN_GIO2_DATA_IN 0x00000008ul
#define GEN_EE_EN 0x00000010ul
#define GEN_GIO2_ENABLE 0x00000010ul
#define GEN_ICON2_ENABLE 0x00000010ul
#define GEN_OVR_OUTPUT_EN 0x00000020ul
#define GEN_GIO2_WRITE 0x00000020ul
#define GEN_CUR2_ENABLE 0x00000020ul
#define GEN_OVR_POLARITY 0x00000040ul
#define GEN_ICON_ENABLE 0x00000040ul
#define GEN_CUR_EN 0x00000080ul
#define GEN_GUI_EN 0x00000100ul
#define GEN_GUI_RESETB 0x00000100ul
#define GEN_BLOCK_WR_EN 0x00000200ul
#define GEN_SOFT_RESET 0x00000200ul
#define GEN_MEM_TRISTATE 0x00000400ul
#define GEN_TEST_VECT_MODE 0x00003000ul
#define GEN_TEST_FIFO_EN 0x00010000ul
#define GEN_TEST_GUI_REGS_EN 0x00020000ul
#define GEN_TEST_VECT_EN 0x00040000ul
#define GEN_TEST_CRC_STR 0x00080000ul
#define GEN_TEST_MODE_T 0x000f0000ul
#define GEN_TEST_MODE 0x00700000ul
#define GEN_TEST_CNT_EN 0x00100000ul
#define GEN_TEST_CRC_EN 0x00200000ul
#define GEN_TEST_MEM_WR 0x01000000ul
#define GEN_TEST_MEM_STROBE 0x02000000ul
#define GEN_TEST_DST_SS_EN 0x04000000ul
#define GEN_TEST_DST_SS_STROBE 0x08000000ul
#define GEN_TEST_SRC_SS_EN 0x10000000ul
#define GEN_TEST_SRC_SS_STROBE 0x20000000ul
#define GEN_TEST_CNT_VALUE 0x3f000000ul
#define GEN_TEST_CC_EN 0x40000000ul
#define GEN_TEST_CC_STROBE 0x80000000ul
#define GEN_DEBUG_MODE 0xff000000ul
#define LCD_GEN_CTRL BlockIOTag(0x35u)
#define CRT_ON 0x00000001ul
#define LCD_ON 0x00000002ul
#define HORZ_DIVBY2_EN 0x00000004ul
#define TRISTATE_MEM_EN 0x00000008ul
#define DONT_DS_ICON 0x00000008ul
#define LOCK_8DOT 0x00000010ul
#define ICON_ENABLE 0x00000020ul
#define DONT_SHADOW_VPAR 0x00000040ul
#define TOGGLE_EN 0x00000080ul
#define V2CLK_PM_EN 0x00000080ul
#define RST_FM 0x00000100ul
#define DISABLE_PCLK_RESET 0x00000200ul
#define DIS_HOR_CRT_DIVBY2 0x00000400ul
#define SCLK_SEL 0x00000800ul
#define SCLK_DELAY 0x0000f000ul
#define MCLK_PM_EN 0x00010000ul
#define TVCLK_PM_EN 0x00010000ul
#define VCLK_DAC_PM_EN 0x00020000ul
#define VCLK_LCD_OFF 0x00040000ul
#define SLOWDOWN_XMCLK 0x00080000ul
#define SELECT_WAIT_4MS 0x00080000ul
#define XTALIN_PM_EN 0x00080000ul
#define LCD_CLK_RATIO 0x00100000ul
#define V2CLK_DAC_PM_EN 0x00100000ul
#define LVDS_EN 0x00200000ul
#define LVDS_PLL_EN 0x00400000ul
#define LVDS_PLL_RESET 0x00800000ul
#define LVDS_RESERVED_BITS 0x07000000ul
#define CRTC_RW_SELECT 0x08000000ul
#define USE_SHADOWED_VEND 0x10000000ul
#define USE_SHADOWED_ROWCUR 0x20000000ul
#define SHADOW_EN 0x40000000ul
#define SHADOW_RW_EN 0x80000000ul
#define CUSTOM_MACRO_CNTL BlockIOTag(0x35u)
#define POWER_MANAGEMENT BlockIOTag(0x36u)
#define PWR_MGT_ON 0x00000001ul
#define PWR_MGT_MODE 0x00000006ul
#define AUTO_PWRUP_EN 0x00000008ul
#define ACTIVITY_PIN_ON 0x00000010ul
#define STANDBY_POL 0x00000020ul
#define SUSPEND_POL 0x00000040ul
#define SELF_REFRESH 0x00000080ul
#define ACTIVITY_PIN_EN 0x00000100ul
#define KEYBD_SNOOP 0x00000200ul
#define USE_F32KHZ 0x00000400ul
#define DONT_USE_XTALIN 0x00000400ul
#define TRISTATE_MEM_EN_P 0x00000800ul
#define LCDENG_TEST_MODE 0x0000f000ul
#define STANDBY_COUNT 0x000f0000ul
#define SUSPEND_COUNT 0x00f00000ul
#define BAISON 0x01000000ul
#define BLON 0x02000000ul
#define DIGON 0x04000000ul
#define PM_D3_SUPPORT_ENABLE 0x08000000ul
#define STANDBY_NOW 0x10000000ul
#define SUSPEND_NOW 0x20000000ul
#define PWR_MGT_STATUS 0xc0000000ul
#define CONFIG_CNTL IOPortTag(0x1au, 0x37u)
#define CFG_MEM_AP_SIZE 0x00000003ul
#define CFG_MEM_VGA_AP_EN 0x00000004ul
#define CFG_MEM_AP_LOC 0x00003ff0ul
#define CFG_CARD_ID 0x00070000ul
#define CFG_VGA_DIS 0x00080000ul
#define CFG_CDE_WINDOW 0x3f000000ul
#define CONFIG_CHIP_ID IOPortTag(0x1bu, 0x38u)
#define CFG_CHIP_TYPE0 0x000000fful
#define CFG_CHIP_TYPE1 0x0000ff00ul
#define CFG_CHIP_TYPE 0x0000fffful
#define CFG_CHIP_CLASS 0x00ff0000ul
#define CFG_CHIP_REV 0xff000000ul
#define CFG_CHIP_VERSION 0x07000000ul
#define CFG_CHIP_FOUNDRY 0x38000000ul
#define CFG_CHIP_REVISION 0xc0000000ul
#define CONFIG_STATUS64_0 IOPortTag(0x1cu, 0x39u)
#define CFG_BUS_TYPE 0x00000007ul
#define CFG_MEM_TYPE_T 0x00000007ul
#define CFG_MEM_TYPE 0x00000038ul
#define CFG_DUAL_CAS_EN_T 0x00000008ul
#define CFG_ROM_128K_EN 0x00000008ul
#define CFG_ROM_REMAP 0x00000008ul
#define CFG_VGA_EN_T 0x00000010ul
#define CFG_CLOCK_EN 0x00000020ul
#define CFG_DUAL_CAS_EN 0x00000040ul
#define CFG_VMC_SENSE 0x00000040ul
#define CFG_SHARED_MEM_EN 0x00000040ul
#define CFG_LOCAL_BUS_OPTION 0x00000180ul
#define CFG_VFC_SENSE 0x00000080ul
#define CFG_INIT_DAC_TYPE 0x00000e00ul
#define CFG_INIT_CARD_ID 0x00007000ul
#define CFG_BLK_WR_SIZE 0x00001000ul
#define CFG_INT_QSF_EN 0x00002000ul
#define CFG_TRI_BUF_DIS 0x00008000ul
#define CFG_BOARD_ID 0x0000ff00ul
#define CFG_EXT_RAM_ADDR 0x003f0000ul
#define CFG_PANEL_ID 0x001f0000ul
#define CFG_MACROVISION_EN 0x00200000ul
#define CFG_ROM_DIS 0x00400000ul
#define CFG_PCI33EN 0x00400000ul
#define CFG_VGA_EN 0x00800000ul
#define CFG_FULLAGP 0x00800000ul
#define CFG_ARITHMOS_ENABLE 0x00800000ul
#define CFG_LOCAL_BUS_CFG 0x01000000ul
#define CFG_CHIP_EN 0x02000000ul
#define CFG_LOCAL_READ_DLY_DIS 0x04000000ul
#define CFG_ROM_OPTION 0x08000000ul
#define CFG_BUS_OPTION 0x10000000ul
#define CFG_LOCAL_DAC_WR_EN 0x20000000ul
#define CFG_VLB_RDY_DIS 0x40000000ul
#define CFG_AP_4GBYTE_DIS 0x80000000ul
#define CONFIG_STATUS64_1 IOPortTag(0x1du, 0x3au)
#define CFG_PCI_DAC_CFG 0x00000001ul
#define CFG_1C8_IO_SEL 0x00000020ul
#define CRC_SIG 0xfffffffful
#define MPP_CONFIG BlockIOTag(0x3bu)
#define MPP_PRESCALE 0x00000007ul
#define MPP_NSTATES 0x00000030ul
#define MPP_NSTATES_2 0x00000010ul
#define MPP_NSTATES_4 0x00000020ul
#define MPP_NSTATES_8 0x00000030ul
#define MPP_FORMAT 0x000000c0ul
#define MPP_FORMAT_DO8 0x00000000ul
#define MPP_FORMAT_DO16 0x00000040ul
#define MPP_FORMAT_DA8 0x00000080ul
#define MPP_FORMAT_DA16 0x000000c0ul
#define MPP_WAIT_STATE 0x00000700ul
#define MPP_CHKRDY_EN 0x00000800ul
#define MPP_INSERT_WAIT 0x00001000ul
#define MPP_TRISTATE_ADDR 0x00002000ul
#define MPP_READ_EARLY 0x00008000ul
#define MPP_RW_MODE 0x00030000ul
#define MPP_INT_MASK 0x000c0000ul
#define MPP_AUTO_INC_EN 0x00300000ul
#define MPP_CHKREQ_EN 0x00400000ul
#define MPP_CHKREQ_MODE 0x00800000ul
#define MPP_BUFFER_SIZE 0x03000000ul
#define MPP_BUFFER_MODE 0x0c000000ul
#define MPP_BUFFER_MODE_NORMAL 0x00000000ul
#define MPP_BUFFER_MODE_PREFETCH 0x04000000ul
#define MPP_BUFFER_MODE_BUS_MASTER 0x08000000ul
#define MPP_BUSY 0x40000000ul
#define MPP_EN 0x80000000ul
#define MPP_STROBE_SEQ BlockIOTag(0x3cu)
#define MPP_STB0_SEQ 0x000000fful
#define MPP_STB1_SEQ 0x0000ff00ul
#define MPP_ADDR BlockIOTag(0x3du)
#define MPP_DATA BlockIOTag(0x3eu)
#define TVO_CNTL BlockIOTag(0x3fu)
#define TVO_H_TOT_PIX 0x00000007ul
#define TVO_PC_OVR_DIS 0x00000008ul
#define TVO_H_TOT_EDGE 0x00000010ul
#define TVO_VBLANK_ONLY 0x00000080ul
#define TVO_MPEG_CLR_SRC 0x00030000ul
#define TVO_MPEG_CLK_EN 0x20000000ul
#define TVO_OVERRIDE_EN 0x40000000ul
#define TVO_EN 0x80000000ul
#define DST_OFF_PITCH BlockIOTag(0x40u)
#define DST_OFFSET 0x000ffffful
#define DST_PITCH 0xffc00000ul
#define DST_X BlockIOTag(0x41u)
#define DST_Y BlockIOTag(0x42u)
#define DST_Y_X BlockIOTag(0x43u)
#define DST_WIDTH BlockIOTag(0x44u)
#define DST_HEIGHT BlockIOTag(0x45u)
#define DST_HEIGHT_WIDTH BlockIOTag(0x46u)
#define DST_X_WIDTH BlockIOTag(0x47u)
#define DST_BRES_LNTH BlockIOTag(0x48u)
#define DST_BRES_ERR BlockIOTag(0x49u)
#define DST_BRES_INC BlockIOTag(0x4au)
#define DST_BRES_DEC BlockIOTag(0x4bu)
#define DST_CNTL BlockIOTag(0x4cu)
#define DST_X_DIR 0x00000001ul
#define DST_Y_DIR 0x00000002ul
#define DST_Y_MAJOR 0x00000004ul
#define DST_X_TILE 0x00000008ul
#define DST_Y_TILE 0x00000010ul
#define DST_LAST_PEL 0x00000020ul
#define DST_POLYGON_EN 0x00000040ul
#define DST_24_ROT_EN 0x00000080ul
#define DST_24_ROT 0x00000700ul
#define DST_BRES_SIGN 0x00000800ul
#define DST_BRES_ZERO 0x00000800ul
#define DST_POLYGON_RTEDGE_DIS 0x00001000ul
#define TRAIL_X_DIR 0x00002000ul
#define TRAP_FILL_DIR 0x00004000ul
#define TRAIL_BRES_SIGN 0x00008000ul
#define BRES_SIGN_AUTO 0x00020000ul
#define ALPHA_OVERLAP_ENB 0x00080000ul
#define SUB_PIX_ON 0x00100000ul
#define TRAIL_BRES_ERR BlockIOTag(0x4eu)
#define TRAIL_BRES_INC BlockIOTag(0x4fu)
#define TRAIL_BRES_DEC BlockIOTag(0x50u)
#define LEAD_BRES_LNTH BlockIOTag(0x51u)
#define Z_OFF_PITCH BlockIOTag(0x52u)
#define Z_CNTL BlockIOTag(0x53u)
#define ALPHA_TST_CNTL BlockIOTag(0x54u)
#define SECONDARY_STW_EXP BlockIOTag(0x56u)
#define SECONDARY_S_X_INC BlockIOTag(0x57u)
#define SECONDARY_S_Y_INC BlockIOTag(0x58u)
#define SECONDARY_S_START BlockIOTag(0x59u)
#define SECONDARY_W_X_INC BlockIOTag(0x5au)
#define SECONDARY_W_Y_INC BlockIOTag(0x5bu)
#define SECONDARY_W_START BlockIOTag(0x5cu)
#define SECONDARY_T_X_INC BlockIOTag(0x5du)
#define SECONDARY_T_Y_INC BlockIOTag(0x5eu)
#define SECONDARY_T_START BlockIOTag(0x5fu)
#define SRC_OFF_PITCH BlockIOTag(0x60u)
#define SRC_OFFSET 0x000ffffful
#define SRC_PITCH 0xffc00000ul
#define SRC_X BlockIOTag(0x61u)
#define SRC_Y BlockIOTag(0x62u)
#define SRC_Y_X BlockIOTag(0x63u)
#define SRC_WIDTH1 BlockIOTag(0x64u)
#define SRC_HEIGHT1 BlockIOTag(0x65u)
#define SRC_HEIGHT1_WIDTH1 BlockIOTag(0x66u)
#define SRC_X_START BlockIOTag(0x67u)
#define SRC_Y_START BlockIOTag(0x68u)
#define SRC_Y_X_START BlockIOTag(0x69u)
#define SRC_WIDTH2 BlockIOTag(0x6au)
#define SRC_HEIGHT2 BlockIOTag(0x6bu)
#define SRC_HEIGHT2_WIDTH2 BlockIOTag(0x6cu)
#define SRC_CNTL BlockIOTag(0x6du)
#define SRC_PATT_EN 0x00000001ul
#define SRC_PATT_ROT_EN 0x00000002ul
#define SRC_LINEAR_EN 0x00000004ul
#define SRC_BYTE_ALIGN 0x00000008ul
#define SRC_LINE_X_DIR 0x00000010ul
#define SRC_8X8X8_BRUSH 0x00000020ul
#define FAST_FILL_EN 0x00000040ul
#define SRC_TRACK_DST 0x00000080ul
#define BUS_MASTER_EN 0x00000100ul
#define BUS_MASTER_SYNC 0x00000200ul
#define BUS_MASTER_OP 0x00000c00ul
#define SRC_8X8X8_BRUSH_LOADED 0x00001000ul
#define COLOR_REG_WRITE_EN 0x00002000ul
#define BLOCK_WRITE_EN 0x00004000ul
#define SCALE_Y_OFF BlockIOTag(0x70u)
#define SCALE_OFF BlockIOTag(0x70u)
#define SECONDARY_SCALE_OFF BlockIOTag(0x70u)
#define TEX_0_OFF BlockIOTag(0x70u)
#define TEX_1_OFF BlockIOTag(0x71u)
#define TEX_2_OFF BlockIOTag(0x72u)
#define TEX_3_OFF BlockIOTag(0x73u)
#define TEX_4_OFF BlockIOTag(0x74u)
#define TEX_5_OFF BlockIOTag(0x75u)
#define TEX_6_OFF BlockIOTag(0x76u)
#define SCALE_WIDTH BlockIOTag(0x77u)
#define TEX_7_OFF BlockIOTag(0x77u)
#define SCALE_HEIGHT BlockIOTag(0x78u)
#define TEX_8_OFF BlockIOTag(0x78u)
#define TEX_9_OFF BlockIOTag(0x79u)
#define TEX_10_OFF BlockIOTag(0x7au)
#define S_Y_INC BlockIOTag(0x7bu)
#define SCALE_Y_PITCH BlockIOTag(0x7bu)
#define SCALE_X_INC BlockIOTag(0x7cu)
#define RED_X_INC BlockIOTag(0x7cu)
#define GREEN_X_INC BlockIOTag(0x7du)
#define SCALE_Y_INC BlockIOTag(0x7du)
#define SCALE_VACC BlockIOTag(0x7eu)
#define SCALE_3D_CNTL BlockIOTag(0x7fu)
#define HOST_DATA_0 BlockIOTag(0x80u)
#define HOST_DATA_1 BlockIOTag(0x81u)
#define HOST_DATA_2 BlockIOTag(0x82u)
#define HOST_DATA_3 BlockIOTag(0x83u)
#define HOST_DATA_4 BlockIOTag(0x84u)
#define HOST_DATA_5 BlockIOTag(0x85u)
#define HOST_DATA_6 BlockIOTag(0x86u)
#define HOST_DATA_7 BlockIOTag(0x87u)
#define HOST_DATA_8 BlockIOTag(0x88u)
#define HOST_DATA_9 BlockIOTag(0x89u)
#define HOST_DATA_A BlockIOTag(0x8au)
#define HOST_DATA_B BlockIOTag(0x8bu)
#define HOST_DATA_C BlockIOTag(0x8cu)
#define HOST_DATA_D BlockIOTag(0x8du)
#define HOST_DATA_E BlockIOTag(0x8eu)
#define HOST_DATA_F BlockIOTag(0x8fu)
#define HOST_CNTL BlockIOTag(0x90u)
#define HOST_BYTE_ALIGN 0x00000001ul
#define HOST_BIG_ENDIAN_EN 0x00000002ul
#define BM_HOSTDATA BlockIOTag(0x91u)
#define BM_ADDR BlockIOTag(0x92u)
#define BM_DATA BlockIOTag(0x92u)
#define BM_GUI_TABLE_CMD BlockIOTag(0x93u)
#define PAT_REG0 BlockIOTag(0xa0u)
#define PAT_REG1 BlockIOTag(0xa1u)
#define PAT_CNTL BlockIOTag(0xa2u)
#define PAT_MONO_EN 0x00000001ul
#define PAT_CLR_4x2_EN 0x00000002ul
#define PAT_CLR_8x1_EN 0x00000004ul
#define SC_LEFT BlockIOTag(0xa8u)
#define SC_RIGHT BlockIOTag(0xa9u)
#define SC_LEFT_RIGHT BlockIOTag(0xaau)
#define SC_TOP BlockIOTag(0xabu)
#define SC_BOTTOM BlockIOTag(0xacu)
#define SC_TOP_BOTTOM BlockIOTag(0xadu)
#define USR1_DST_OFF_PITCH BlockIOTag(0xaeu)
#define USR2_DST_OFF_PITCH BlockIOTag(0xafu)
#define DP_BKGD_CLR BlockIOTag(0xb0u)
#define DP_FRGD_CLR BlockIOTag(0xb1u)
#define DP_WRITE_MASK BlockIOTag(0xb2u)
#define DP_CHAIN_MASK BlockIOTag(0xb3u)
#define DP_CHAIN_1BPP 0x00000000ul
#define DP_CHAIN_4BPP 0x00008888ul
#define DP_CHAIN_8BPP 0x00008080ul
#define DP_CHAIN_8BPP_332 0x00009292ul
#define DP_CHAIN_15BPP_1555 0x00004210ul
#define DP_CHAIN_16BPP_565 0x00008410ul
#define DP_CHAIN_24BPP_888 0x00008080ul
#define DP_CHAIN_32BPP_8888 0x00008080ul
#define DP_PIX_WIDTH BlockIOTag(0xb4u)
#define DP_DST_PIX_WIDTH 0x0000000ful
#define COMPOSITE_PIX_WIDTH 0x000000f0ul
#define DP_SRC_PIX_WIDTH 0x00000f00ul
#define DP_HOST_TRIPLE_EN 0x00002000ul
#define DP_SRC_AUTONA_FIX_DIS 0x00004000ul
#define DP_FAST_SRCCOPY_DIS 0x00008000ul
#define DP_HOST_PIX_WIDTH 0x000f0000ul
#define DP_CI4_RGB_INDEX 0x00f00000ul
#define DP_BYTE_PIX_ORDER 0x01000000ul
#define DP_CONVERSION_TEMP 0x02000000ul
#define DP_CI4_RGB_LOW_NIBBLE 0x04000000ul
#define DP_C14_RGB_HIGH_NIBBLE 0x08000000ul
#define DP_SCALE_PIX_WIDTH 0xf0000000ul
#define DP_MIX BlockIOTag(0xb5u)
#define DP_BKGD_MIX 0x0000001ful
#define DP_FRGD_MIX 0x001f0000ul
#define DP_SRC BlockIOTag(0xb6u)
#define DP_BKGD_SRC 0x00000007ul
#define DP_FRGD_SRC 0x00000700ul
#define DP_MONO_SRC 0x00030000ul
#define DP_MONO_SRC_ALLONES 0x00000000ul
#define DP_MONO_SRC_PATTERN 0x00010000ul
#define DP_MONO_SRC_HOST 0x00020000ul
#define DP_MONO_SRC_BLIT 0x00030000ul
#define DP_FRGD_CLR_MIX BlockIOTag(0xb7u)
#define DP_FRGD_BKGD_CLR BlockIOTag(0xb8u)
#define DST_X_Y BlockIOTag(0xbau)
#define DST_WIDTH_HEIGHT BlockIOTag(0xbbu)
#define USR_DST_PITCH BlockIOTag(0xbcu)
#define DP_SET_GUI_ENGINE2 BlockIOTag(0xbeu)
#define DP_SET_GUI_ENGINE BlockIOTag(0xbfu)
#define CLR_CMP_CLR BlockIOTag(0xc0u)
#define CLR_CMP_MSK BlockIOTag(0xc1u)
#define CLR_CMP_CNTL BlockIOTag(0xc2u)
#define CLR_CMP_FN 0x00000007ul
#define CLR_CMP_FN_FALSE 0x00000000ul
#define CLR_CMP_FN_TRUE 0x00000001ul
#define CLR_CMP_FN_NOT_EQUAL 0x00000004ul
#define CLR_CMP_FN_EQUAL 0x00000005ul
#define CLR_CMP_SRC 0x03000000ul
#define CLR_CMP_SRC_DST 0x00000000ul
#define CLR_CMP_SRC_2D 0x01000000ul
#define CLR_CMP_SRC_TEXEL 0x02000000ul
#define FIFO_STAT BlockIOTag(0xc4u)
#define FIFO_STAT_BITS 0x0000fffful
#define FIFO_ERR 0x80000000ul
#define CONTEXT_MASK BlockIOTag(0xc8u)
#define CONTEXT_LOAD_CNTL BlockIOTag(0xcbu)
#define CONTEXT_LOAD_PTR 0x00007ffful
#define CONTEXT_LOAD_CMD 0x00030000ul
#define CONTEXT_LOAD_NONE 0x00000000ul
#define CONTEXT_LOAD_ONLY 0x00010000ul
#define CONTEXT_LOAD_FILL 0x00020000ul
#define CONTEXT_LOAD_LINE 0x00030000ul
#define CONTEXT_LOAD_DIS 0x80000000ul
#define GUI_TRAJ_CNTL BlockIOTag(0xccu)
#define GUI_STAT BlockIOTag(0xceu)
#define GUI_ACTIVE 0x00000001ul
#define DSTX_LT_SCISSOR_LEFT 0x00000100ul
#define DSTX_GT_SCISSOR_RIGHT 0x00000200ul
#define DSTY_LT_SCISSOR_TOP 0x00000400ul
#define DSTY_GT_SCISSOR_BOTTOM 0x00000800ul
#define GUI_FIFO 0x03ff0000ul
#define S_X_INC2 BlockIOTag(0xd0u)
#define TEX_PALETTE_INDEX BlockIOTag(0xd0u)
#define S_Y_INC2 BlockIOTag(0xd1u)
#define STW_EXP BlockIOTag(0xd1u)
#define S_XY_INC2 BlockIOTag(0xd2u)
#define LOG_MAX_INC BlockIOTag(0xd2u)
#define S_XINC_START BlockIOTag(0xd3u)
#define S_START BlockIOTag(0xd5u)
#define T_X_INC2 BlockIOTag(0xd6u)
#define W_X_INC BlockIOTag(0xd6u)
#define T_Y_INC2 BlockIOTag(0xd7u)
#define W_Y_INC BlockIOTag(0xd7u)
#define T_XY_INC2 BlockIOTag(0xd8u)
#define W_START BlockIOTag(0xd8u)
#define T_XINC_START BlockIOTag(0xd9u)
#define T_Y_INC BlockIOTag(0xdau)
#define SECONDARY_SCALE_PITCH BlockIOTag(0xdau)
#define T_START BlockIOTag(0xdbu)
#define TEX_SIZE_PITCH BlockIOTag(0xdcu)
#define TEX_CNTL BlockIOTag(0xddu)
#define SECONDARY_TEX_OFFSET BlockIOTag(0xdeu)
#define TEX_PAL_WR BlockIOTag(0xdfu)
#define TEX_PALETTE BlockIOTag(0xdfu)
#define SCALE_PITCH_BOTH BlockIOTag(0xe0u)
#define SECONDARY_SCALE_OFF_ACC BlockIOTag(0xe1u)
#define SCALE_OFF_ACC BlockIOTag(0xe2u)
#define SCALE_DST_Y_X BlockIOTag(0xe3u)
#define COMPOSITE_SHADOW_ID BlockIOTag(0xe6u)
#define SECONDARY_SCALE_X_INC BlockIOTag(0xe7u)
#define SPECULAR_RED_X_INC BlockIOTag(0xe7u)
#define SPECULAR_RED_Y_INC BlockIOTag(0xe8u)
#define SPECULAR_RED_START BlockIOTag(0xe9u)
#define SECONDARY_SCALE_HACC BlockIOTag(0xe9u)
#define SPECULAR_GREEN_X_INC BlockIOTag(0xeau)
#define SPECULAR_GREEN_Y_INC BlockIOTag(0xebu)
#define SPECULAR_GREEN_START BlockIOTag(0xecu)
#define SPECULAR_BLUE_X_INC BlockIOTag(0xedu)
#define SPECULAR_BLUE_Y_INC BlockIOTag(0xeeu)
#define SPECULAR_BLUE_START BlockIOTag(0xefu)
#define RED_Y_INC BlockIOTag(0xf1u)
#define SCALE_HACC BlockIOTag(0xf2u)
#define RED_START BlockIOTag(0xf2u)
#define GREEN_Y_INC BlockIOTag(0xf4u)
#define SECONDARY_SCALE_Y_INC BlockIOTag(0xf4u)
#define SECONDARY_SCALE_VACC BlockIOTag(0xf5u)
#define GREEN_START BlockIOTag(0xf5u)
#define BLUE_X_INC BlockIOTag(0xf6u)
#define SCALE_XUV_INC BlockIOTag(0xf6u)
#define BLUE_Y_INC BlockIOTag(0xf7u)
#define BLUE_START BlockIOTag(0xf8u)
#define SCALE_UV_HACC BlockIOTag(0xf8u)
#define Z_X_INC BlockIOTag(0xf9u)
#define Z_Y_INC BlockIOTag(0xfau)
#define Z_START BlockIOTag(0xfbu)
#define ALPHA_FOG_X_INC BlockIOTag(0xfcu)
#define ALPHA_FOG_Y_INC BlockIOTag(0xfdu)
#define ALPHA_FOG_START BlockIOTag(0xfeu)
#define OVERLAY_Y_X_START BlockIOTag(0x100u)
#define OVERLAY_Y_START 0x000003fful
#define OVERLAY_X_START 0x03ff0000ul
#define OVERLAY_LOCK_START 0x80000000ul
#define OVERLAY_Y_X_END BlockIOTag(0x101u)
#define OVERLAY_Y_END 0x000003fful
#define OVERLAY_X_END 0x03ff0000ul
#define OVERLAY_LOCK_END 0x80000000ul
#define OVERLAY_VIDEO_KEY_CLR BlockIOTag(0x102u)
#define OVERLAY_VIDEO_KEY_MSK BlockIOTag(0x103u)
#define OVERLAY_GRAPHICS_KEY_CLR BlockIOTag(0x104u)
#define OVERLAY_GRAPHICS_KEY_MSK BlockIOTag(0x105u)
#define OVERLAY_KEY_CNTL BlockIOTag(0x106u)
#define OVERLAY_VIDEO_FN 0x00000007ul
#define OVERLAY_GRAPHICS_FN 0x00000070ul
#define OVERLAY_CMP_MIX 0x00000100ul
#define OVERLAY_SCALE_INC BlockIOTag(0x108u)
#define OVERLAY_SCALE_CNTL BlockIOTag(0x109u)
#define SCALE_PIX_EXPAND 0x00000001ul
#define SCALE_Y2R_TEMP 0x00000002ul
#define SCALE_HORZ_MODE 0x00000004ul
#define SCALE_VERT_MODE 0x00000008ul
#define SCALE_SIGNED_UV 0x00000010ul
#define SCALE_GAMMA_SEL 0x00000060ul
#define SCALE_BANDWIDTH 0x04000000ul
#define SCALE_DIS_LIMIT 0x08000000ul
#define SCALE_CLK_FORCE_ON 0x20000000ul
#define OVERLAY_EN 0x40000000ul
#define SCALE_EN 0x80000000ul
#define SCALER_HEIGHT_WIDTH BlockIOTag(0x10au)
#define SCALER_TEST BlockIOTag(0x10bu)
#define SCALE_Y2R_DIS 0x00000002ul
#define SCALER_THRESHOLD BlockIOTag(0x10cu)
#define SCALER_BUF0_OFFSET BlockIOTag(0x10du)
#define SCALER_BUF1_OFFSET BlockIOTag(0x10eu)
#define SCALER_BUF_PITCH BlockIOTag(0x10fu)
#define CAPTURE_Y_X BlockIOTag(0x110u)
#define CAPTURE_START_END BlockIOTag(0x110u)
#define CAPTURE_HEIGHT_WIDTH BlockIOTag(0x111u)
#define CAPTURE_X_WIDTH BlockIOTag(0x111u)
#define VIDEO_FORMAT BlockIOTag(0x112u)
#define VIDEO_IN 0x0000000ful
#define VIDEO_IN_VYUY422 0x0000000bul
#define VIDEO_IN_YVYU422 0x0000000cul
#define VIDEO_SIGNED_UV 0x00000010ul
#define SCALER_IN 0x000f0000ul
#define SCALER_IN_15BPP 0x00030000ul
#define SCALER_IN_16BPP 0x00040000ul
#define SCALER_IN_32BPP 0x00060000ul
#define SCALER_IN_YUV9 0x00090000ul
#define SCALER_IN_YUV12 0x000a0000ul
#define SCALER_IN_VYUY422 0x000b0000ul
#define SCALER_IN_YVYU422 0x000c0000ul
#define HOST_BYTE_SHIFT_EN 0x10000000ul
#define HOST_YUV_APER 0x20000000ul
#define HOST_MEM_MODE 0xc0000000ul
#define HOST_MEM_MODE_NORMAL 0x00000000ul
#define HOST_MEM_MODE_Y 0x40000000ul
#define HOST_MEM_MODE_U 0x80000000ul
#define HOST_MEM_MODE_V 0xc0000000ul
#define VIDEO_CONFIG BlockIOTag(0x113u)
#define VBI_START_END BlockIOTag(0x113u)
#define CAPTURE_CONFIG BlockIOTag(0x114u)
#define CAP_INPUT_MODE 0x00000001ul
#define CAP_START_FIELD 0x00000002ul
#define CAP_BUF_MODE 0x00000004ul
#define CAP_START_BUF 0x00000008ul
#define CAP_BUF_TYPE 0x00000030ul
#define CAP_BUF_FIELD 0x00000000ul
#define CAP_BUF_ALTERNATING 0x00000010ul
#define CAP_BUF_FRAME 0x00000020ul
#define CAP_FIELD_FLIP 0x00000040ul
#define CAP_CCIR656_EN 0x00000080ul
#define CAP_MIRROR_EN 0x00001000ul
#define ONESHOT_MIRROR_EN 0x00002000ul
#define ONESHOT_MODE 0x00004000ul
#define CAP_HORZ_DOWN 0x00030000ul
#define CAP_VERT_DOWN 0x000c0000ul
#define ONESHOT_HORZ_DOWN 0x00300000ul
#define ONESHOT_VERT_DOWN 0x00c00000ul
#define OVL_BUF_MODE 0x10000000ul
#define OVL_BUF_NEXT 0x20000000ul
#define TRIG_CNTL BlockIOTag(0x115u)
#define CAP_TRIGGER 0x00000003ul
#define CAP_TRIGGER_NEXT 0x00000001ul
#define OVL_CUR_BUF 0x00000020ul
#define OVL_BUF_STATUS 0x00000040ul
#define CAP_BUF_STATUS 0x00000080ul
#define CAPTURE_EN 0x80000000ul
#define VIDEO_SYNC_TEST BlockIOTag(0x116u)
#define OVERLAY_EXCLUSIVE_HORZ BlockIOTag(0x116u)
#define EXCLUSIVE_HORZ_START 0x000000fful
#define EXCLUSIVE_HORZ_END 0x0000ff00ul
#define EXCLUSIVE_HORZ_PORCH 0x00ff0000ul
#define EXCLUSIVE_EN 0x80000000ul
#define EXT_CRTC_GEN_CNTL_R BlockIOTag(0x117u)
#define OVERLAY_EXCLUSIVE_VERT BlockIOTag(0x117u)
#define EXCLUSIVE_VERT_START 0x000003fful
#define EXCLUSIVE_VERT_END 0x03ff0000ul
#define VMC_CONFIG BlockIOTag(0x118u)
#define VBI_WIDTH BlockIOTag(0x118u)
#define VMC_STATUS BlockIOTag(0x119u)
#define CAPTURE_DEBUG BlockIOTag(0x119u)
#define VMC_CMD BlockIOTag(0x11au)
#define VIDEO_SYNC_TEST_B BlockIOTag(0x11au)
#define VMC_ARG0 BlockIOTag(0x11bu)
#define VMC_ARG1 BlockIOTag(0x11cu)
#define SNAPSHOT_VH_COUNTS BlockIOTag(0x11cu)
#define VMC_SNOOP_ARG0 BlockIOTag(0x11du)
#define SNAPSHOT_F_COUNT BlockIOTag(0x11du)
#define VMC_SNOOP_ARG1 BlockIOTag(0x11eu)
#define N_VIF_COUNT BlockIOTag(0x11eu)
#define SNAPSHOT_VIF_COUNT BlockIOTag(0x11fu)
#define BUF0_OFFSET BlockIOTag(0x120u)
#define CAPTURE_BUF0_OFFSET BlockIOTag(0x120u)
#define CAPTURE_BUF1_OFFSET BlockIOTag(0x121u)
#define ONESHOT_BUF_OFFSET BlockIOTag(0x122u)
#define BUF0_PITCH BlockIOTag(0x123u)
#define BUF1_OFFSET BlockIOTag(0x126u)
#define BUF1_PITCH BlockIOTag(0x129u)
#define BUF0_CAP_ODD_OFFSET BlockIOTag(0x12bu)
#define BUF1_CAP_ODD_OFFSET BlockIOTag(0x12cu)
#define SNAPSHOT2_VH_COUNTS BlockIOTag(0x12cu)
#define SNAPSHOT2_F_COUNT BlockIOTag(0x12du)
#define N_VIF2_COUNT BlockIOTag(0x12eu)
#define SNAPSHOT2_VIF_COUNT BlockIOTag(0x12fu)
#define VMC_STRM_DATA_0 BlockIOTag(0x130u)
#define VMC_STRM_DATA_1 BlockIOTag(0x131u)
#define VMC_STRM_DATA_2 BlockIOTag(0x132u)
#define VMC_STRM_DATA_3 BlockIOTag(0x133u)
#define VMC_STRM_DATA_4 BlockIOTag(0x134u)
#define VMC_STRM_DATA_5 BlockIOTag(0x135u)
#define VMC_STRM_DATA_6 BlockIOTag(0x136u)
#define VMC_STRM_DATA_7 BlockIOTag(0x137u)
#define VMC_STRM_DATA_8 BlockIOTag(0x138u)
#define VMC_STRM_DATA_9 BlockIOTag(0x139u)
#define VMC_STRM_DATA_A BlockIOTag(0x13au)
#define VMC_STRM_DATA_B BlockIOTag(0x13bu)
#define VMC_STRM_DATA_C BlockIOTag(0x13cu)
#define VMC_STRM_DATA_D BlockIOTag(0x13du)
#define VMC_STRM_DATA_E BlockIOTag(0x13eu)
#define VMC_STRM_DATA_F BlockIOTag(0x13fu)
#define CRT_HORZ_VERT_LOAD BlockIOTag(0x151u)
#define AGP_BASE BlockIOTag(0x152u)
#define AGP_CNTL BlockIOTag(0x153u)
#define SCALER_COLOUR_CNTL BlockIOTag(0x154u)
#define SCALE_BRIGHTNESS 0x0000007ful
#define SCALE_SATURATION_U 0x00001f00ul
#define SCALE_SATURATION_V 0x001f0000ul
#define SCALE_VERT_ADJ_UV 0x0fe00000ul
#define SCALE_HORZ_ADJ_UV 0xf0000000ul
#define SCALER_H_COEFF0 BlockIOTag(0x155u)
#define SCALER_H_COEFF1 BlockIOTag(0x156u)
#define SCALER_H_COEFF2 BlockIOTag(0x157u)
#define SCALER_H_COEFF3 BlockIOTag(0x158u)
#define SCALER_H_COEFF4 BlockIOTag(0x159u)
#define GUI_CMDFIFO_DEBUG BlockIOTag(0x15cu)
#define GUI_CMDFIFO_DATA BlockIOTag(0x15du)
#define GUI_CNTL BlockIOTag(0x15eu)
#define CMDFIFO_SIZE_MODE 0x00000003ul
#define IDCT_PRSR_MODE 0x00010000ul
#define IDCT_BLOCK_GUI_INITIATOR 0x00020000ul
#define BM_FRAME_BUF_OFFSET BlockIOTag(0x160u)
#define BM_SYSTEM_MEM_ADDR BlockIOTag(0x161u)
#define BM_COMMAND BlockIOTag(0x162u)
#define BM_STATUS BlockIOTag(0x163u)
#define BM_GUI_TABLE BlockIOTag(0x16eu)
#define BM_SYSTEM_TABLE BlockIOTag(0x16fu)
#define SCALER_BUF0_OFFSET_U BlockIOTag(0x175u)
#define SCALER_BUF0_OFFSET_V BlockIOTag(0x176u)
#define SCALER_BUF1_OFFSET_U BlockIOTag(0x177u)
#define SCALER_BUF1_OFFSET_V BlockIOTag(0x178u)
#define VERTEX_1_S BlockIOTag(0x190u)
#define VERTEX_1_T BlockIOTag(0x191u)
#define VERTEX_1_W BlockIOTag(0x192u)
#define VERTEX_1_SPEC_ARGB BlockIOTag(0x193u)
#define VERTEX_1_Z BlockIOTag(0x194u)
#define VERTEX_1_ARGB BlockIOTag(0x195u)
#define VERTEX_1_X_Y BlockIOTag(0x196u)
#define ONE_OVER_AREA BlockIOTag(0x197u)
#define VERTEX_2_S BlockIOTag(0x198u)
#define VERTEX_2_T BlockIOTag(0x199u)
#define VERTEX_2_W BlockIOTag(0x19au)
#define VERTEX_2_SPEC_ARGB BlockIOTag(0x19bu)
#define VERTEX_2_Z BlockIOTag(0x19cu)
#define VERTEX_2_ARGB BlockIOTag(0x19du)
#define VERTEX_2_X_Y BlockIOTag(0x19eu)
#define VERTEX_3_S BlockIOTag(0x1a0u)
#define VERTEX_3_T BlockIOTag(0x1a1u)
#define VERTEX_3_W BlockIOTag(0x1a2u)
#define VERTEX_3_SPEC_ARGB BlockIOTag(0x1a3u)
#define VERTEX_3_Z BlockIOTag(0x1a4u)
#define VERTEX_3_ARGB BlockIOTag(0x1a5u)
#define VERTEX_3_X_Y BlockIOTag(0x1a6u)
#define VERTEX_3_SECONDARY_S BlockIOTag(0x1a8u)
#define VERTEX_3_SECONDARY_T BlockIOTag(0x1a9u)
#define VERTEX_3_SECONDARY_W BlockIOTag(0x1aau)
#define ONE_OVER_AREA_UC BlockIOTag(0x1c0u)
#define SETUP_CNTL BlockIOTag(0x1c1u)
#define VERTEX_1_SECONDARY_S BlockIOTag(0x1cau)
#define VERTEX_1_SECONDARY_T BlockIOTag(0x1cbu)
#define VERTEX_1_SECONDARY_W BlockIOTag(0x1ccu)
#define VERTEX_2_SECONDARY_S BlockIOTag(0x1cdu)
#define VERTEX_2_SECONDARY_T BlockIOTag(0x1ceu)
#define VERTEX_2_SECONDARY_W BlockIOTag(0x1cfu)
#define CTL_MEM_APER_BYTE_ENDIAN 0x00u
#define CTL_MEM_APER_WORD_ENDIAN 0x01u
#define CTL_MEM_APER_LONG_ENDIAN 0x02u
#define ICS2595_CLOCK 0x000001f0ul
#define ICS2595_FB_DIV 0x0001fe00ul
#define ICS2595_POST_DIV 0x000c0000ul
#define ICS2595_STOP 0x00300000ul
#define ICS2595_TOGGLE (ICS2595_POST_DIV | ICS2595_STOP)
#define PLL_MPLL_CNTL 0x00u
#define MPLL_PC_GAIN 0x07u
#define MPLL_VC_GAIN 0x18u
#define MPLL_D_CYC 0x60u
#define MPLL_RANGE 0x80u
#define VPLL_CNTL 0x01u
#define VPLL_PC_GAIN 0x07u
#define VPLL_VC_GAIN 0x18u
#define VPLL_D_CYC 0x60u
#define VPLL_RANGE 0x80u
#define PLL_REF_DIV 0x02u
#define PLL_GEN_CNTL 0x03u
#define PLL_OVERRIDE 0x01u
#define PLL_SLEEP 0x01u
#define PLL_MCLK_RESET 0x02u
#define PLL_OSC_EN 0x04u
#define PLL_EXT_CLK_EN 0x08u
#define PLL_MCLK_SRC_SEL 0x70u
#define PLL_EXT_CLK_CNTL 0x80u
#define PLL_DLL_PWDN 0x80u
#define PLL_MCLK_FB_DIV 0x04u
#define PLL_VCLK_CNTL 0x05u
#define PLL_VCLK_SRC_SEL 0x03u
#define PLL_VCLK_RESET 0x04u
#define PLL_VCLK_INVERT 0x08u
#define PLL_ECP_DIV 0x30u
#define PLL_ERATE_GT_XRATE 0x40u
#define PLL_SCALER_LOCK_EN 0x80u
#define PLL_VCLK_POST_DIV 0x06u
#define PLL_VCLK0_POST_DIV 0x03u
#define PLL_VCLK1_POST_DIV 0x0cu
#define PLL_VCLK2_POST_DIV 0x30u
#define PLL_VCLK3_POST_DIV 0xc0u
#define PLL_VCLK0_FB_DIV 0x07u
#define PLL_VCLK1_FB_DIV 0x08u
#define PLL_VCLK2_FB_DIV 0x09u
#define PLL_VCLK3_FB_DIV 0x0au
#define PLL_XCLK_CNTL 0x0bu
#define PLL_XCLK_MCLK_RATIO 0x03u
#define PLL_XCLK_SRC_SEL 0x07u
#define PLL_MFB_TIMES_4_2B 0x08u
#define PLL_VCLK0_XDIV 0x10u
#define PLL_VCLK1_XDIV 0x20u
#define PLL_VCLK2_XDIV 0x40u
#define PLL_VCLK3_XDIV 0x80u
#define PLL_FCP_CNTL 0x0cu
#define PLL_FCP_POST_DIV 0x0fu
#define PLL_FCP_SRC_SEL 0x70u
#define PLL_DCLK_BY2_EN 0x80u
#define PLL_DLL_CNTL 0x0cu
#define PLL_DLL_REF_SRC 0x03u
#define PLL_DLL_FB_SRC 0x0cu
#define PLL_DLL_GAIN 0x30u
#define PLL_DLL_RESET 0x40u
#define PLL_DLL_HCLK_OUT_EN 0x80u
#define PLL_VFC_CNTL 0x0du
#define PLL_DCLK_INVB 0x01u
#define PLL_DCLKBY2_EN 0x02u
#define PLL_VFC_2PHASE 0x04u
#define PLL_VFC_DELAY 0x18u
#define PLL_VFC_DCLKBY2_SHIFT 0x20u
#define PLL_TST_SRC_SEL_BIT5 0x80u
#define PLL_TEST_CNTL 0x0eu
#define PLL_TST_SRC_SEL 0x1fu
#define PLL_TST_DIVIDERS 0x20u
#define PLL_TST_MASK_READ 0x40u
#define PLL_TST_ANALOG_MON_EN 0x80u
#define PLL_TEST_COUNT 0x0fu
#define PLL_LVDSPLL_CNTL0 0x10u
#define PLL_FPDI_NS_TIMING 0x01u
#define PLL_CURR_LEVEL 0x0eu
#define PLL_LVDS_TEST_MODE 0xf0u
#define PLL_LVDSPLL_CNTL1 0x11u
#define PLL_LPPL_RANGE 0x01u
#define PLL_LPLL_DUTY 0x06u
#define PLL_LPLL_VC_GAIN 0x18u
#define PLL_LPLL_CP_GAIN 0xe0u
#define PLL_AGP1_CNTL 0x12u
#define PLL_AGP2_CNTL 0x13u
#define PLL_DLL2_CNTL 0x14u
#define PLL_SCLK_FB_DIV 0x15u
#define PLL_SPLL_CNTL1 0x16u
#define PLL_SPLL_CNTL2 0x17u
#define PLL_APLL_STRAPS 0x18u
#define PLL_EXT_VPLL_CNTL 0x19u
#define PLL_EXT_VPLL_REF_SRC 0x03u
#define PLL_EXT_VPLL_EN 0x04u
#define PLL_EXT_VPLL_VGA_EN 0x08u
#define PLL_EXT_VPLL_INSYNC 0x10u
#define PLL_EXT_V2PLL_EN 0x80u
#define PLL_EXT_VPLL_REF_DIV 0x1au
#define PLL_EXT_VPLL_FB_DIV 0x1bu
#define PLL_EXT_VPLL_MSB 0x1cu
#define PLL_HTOTAL_CNTL 0x1du
#define PLL_BYTE_CLK_CNTL 0x1eu
#define PLL_TV_REF_DIV 0x1fu
#define PLL_TV_FB_DIV 0x20u
#define PLL_TV_CNTL 0x21u
#define PLL_TV_GEN_CNTL 0x22u
#define PLL_V2_CNTL 0x23u
#define PLL_V2_GEN_CNTL 0x24u
#define PLL_V2_REF_DIV 0x25u
#define PLL_V2_FB_DIV 0x26u
#define PLL_V2_MSB 0x27u
#define PLL_HTOTAL2_CNTL 0x28u
#define PLL_YCLK_CNTL 0x29u
#define PM_DYN_CLK_CNTL 0x2au
#define LCD_CONFIG_PANEL 0x00u
#define LCD_GEN_CNTL 0x01u
#define LCD_DSTN_CONTROL 0x02u
#define LCD_HFB_PITCH_ADDR 0x03u
#define LCD_HORZ_STRETCHING 0x04u
#define LCD_VERT_STRETCHING 0x05u
#define LCD_EXT_VERT_STRETCH 0x06u
#define VERT_STRETCH_RATIO3 0x000003fful
#define FORCE_DAC_DATA 0x000000fful
#define FORCE_DAC_DATA_SEL 0x00000300ul
#define VERT_STRETCH_MODE 0x00000400ul
#define VERT_PANEL_SIZE 0x003ff800ul
#define AUTO_VERT_RATIO 0x00400000ul
#define USE_AUTO_FP_POS 0x00800000ul
#define USE_AUTO_LCD_VSYNC 0x01000000ul
#define LCD_LT_GIO 0x07u
#define LCD_POWER_MANAGEMENT 0x08u
#define LCD_ZVGPIO 0x09u
#define LCD_ICON_CLR0 0x0au
#define LCD_ICON_CLR1 0x0bu
#define LCD_ICON_OFFSET 0x0cu
#define LCD_ICON_HORZ_VERT_POSN 0x0du
#define LCD_ICON_HORZ_VERT_OFF 0x0eu
#define LCD_ICON2_CLR0 0x0fu
#define LCD_ICON2_CLR1 0x10u
#define LCD_ICON2_OFFSET 0x11u
#define LCD_ICON2_HORZ_VERT_POSN 0x12u
#define LCD_ICON2_HORZ_VERT_OFF 0x13u
#define LCD_MISC_CNTL 0x14u
#define BL_MOD_LEVEL 0x000000fful
#define BIAS_MOD_LEVEL 0x0000ff00ul
#define BLMOD_EN 0x00010000ul
#define BIASMOD_EN 0x00020000ul
#define PWRSEQ_MODE 0x00080000ul
#define APC_EN 0x00100000ul
#define MONITOR_DET_EN 0x00200000ul
#define FORCE_DAC_DATA_SEL_X 0x00c00000ul
#define FORCE_DAC_DATA_X 0xff000000ul
#define LCD_TMDS_CNTL 0x15u
#define LCD_SCRATCH_PAD_4M 0x15u
#define LCD_TMDS_SYNC_CHAR_SETA 0x16u
#define LCD_SCRATCH_PAD_5M 0x16u
#define LCD_TMDS_SYNC_CHAR_SETB 0x17u
#define LCD_SCRATCH_PAD_6M 0x17u
#define LCD_TMDS_SRC 0x18u
#define LCD_SCRATCH_PAD_7M 0x18u
#define LCD_PLTSTBLK_CNTL 0x19u
#define LCD_SCRATCH_PAD_8M 0x19u
#define LCD_SYNC_GEN_CNTL 0x1au
#define LCD_PATTERN_GEN_SEED 0x1bu
#define LCD_APC_CNTL 0x1cu
#define LCD_POWER_MANAGEMENT_2 0x1du
#define LCD_XCLK_DISP_PM_EN 0x00000001ul
#define LCD_XCLK_DISP2_PM_EN 0x00000002ul
#define LCD_XCLK_VID_PM_EN 0x00000004ul
#define LCD_XCLK_SCL_PM_EN 0x00000008ul
#define LCD_XCLK_GUI_PM_EN 0x00000010ul
#define LCD_XCLK_SUB_PM_EN 0x00000020ul
#define LCD_MCLK_PM_EN 0x00000100ul
#define LCD_SS_EN 0x00000200ul
#define LCD_BLON_DIGON_EN 0x00000400ul
#define LCD_PM_DYN_XCLK_SYNC 0x00003000ul
#define LCD_SEL_W4MS 0x00004000ul
#define LCD_PM_DYN_XCLK_EN 0x00010000ul
#define LCD_PM_XCLK_ALWAYS 0x00020000ul
#define LCD_PM_DYN_XCLK_STATUS 0x00040000ul
#define LCD_PCI_ACC_DIS 0x00080000ul
#define LCD_PM_DYN_XCLK_DISP 0x00100000ul
#define LCD_PM_DYN_XCLK_DISP2 0x00200000ul
#define LCD_PM_DYN_XCLK_VID 0x00400000ul
#define LCD_PM_DYN_XCLK_HFB 0x00800000ul
#define LCD_PM_DYN_XCLK_SCL 0x01000000ul
#define LCD_PM_DYN_XCLK_SUB 0x02000000ul
#define LCD_PM_DYN_XCLK_GUI 0x04000000ul
#define LCD_PM_DYN_XCLK_HOST 0x08000000ul
#define LCD_PRI_ERR_PATTERN 0x1eu
#define LCD_CUR_ERR_PATTERN 0x1fu
#define LCD_PLTSTBLK_RPT 0x20u
#define LCD_SYNC_RPT 0x21u
#define LCD_CRC_PATTERN_RPT 0x22u
#define LCD_PL_TRANSMITTER_CNTL 0x23u
#define LCD_PL_PLL_CNTL 0x24u
#define LCD_ALPHA_BLENDING 0x25u
#define LCD_PORTRAIT_GEN_CNTL 0x26u
#define LCD_APC_CTRL_IO 0x27u
#define LCD_TEST_IO 0x28u
#define LCD_DP1_MEM_ACCESS 0x2au
#define LCD_DP0_MEM_ACCESS 0x2bu
#define LCD_DP0_DEBUG_A 0x2cu
#define LCD_DP0_DEBUG_B 0x2du
#define LCD_DP1_DEBUG_A 0x2eu
#define LCD_DP1_DEBUG_B 0x2fu
#define LCD_DPCTRL_DEBUG_A 0x30u
#define LCD_DPCTRL_DEBUG_B 0x31u
#define LCD_MEMBLK_DEBUG 0x32u
#define LCD_APC_LUT_AB 0x33u
#define LCD_SCRATCH_PAD_4X 0x33u
#define LCD_APC_LUT_CD 0x34u
#define LCD_SCRATCH_PAD_5X 0x34u
#define LCD_APC_LUT_EF 0x35u
#define LCD_SCRATCH_PAD_6X 0x35u
#define LCD_APC_LUT_GH 0x36u
#define LCD_SCRATCH_PAD_7X 0x36u
#define LCD_APC_LUT_IJ 0x37u
#define LCD_SCRATCH_PAD_8X 0x37u
#define LCD_APC_LUT_KL 0x38u
#define LCD_APC_LUT_MN 0x39u
#define LCD_APC_LUT_OP 0x3au
#define TV_MASTER_CNTL 0x10u
#define TV_RGB_CNTL 0x12u
#define TV_SYNC_CNTL 0x14u
#define TV_HTOTAL 0x20u
#define TV_HDISP 0x21u
#define TV_HSIZE 0x22u
#define TV_HSTART 0x23u
#define TV_HCOUNT 0x24u
#define TV_VTOTAL 0x25u
#define TV_VDISP 0x26u
#define TV_VCOUNT 0x27u
#define TV_FTOTAL 0x28u
#define TV_FCOUNT 0x29u
#define TV_FRESTART 0x2au
#define TV_HRESTART 0x2bu
#define TV_VRESTART 0x2cu
#define TV_HOST_READ_DATA 0x60u
#define TV_HOST_WRITE_DATA 0x61u
#define TV_HOST_RD_WT_CNTL 0x62u
#define TV_VSCALER_CNTL 0x70u
#define TV_TIMING_CNTL 0x71u
#define TV_GAMMA_CNTL 0x72u
#define TV_Y_FALL_CNTL 0x73u
#define TV_Y_RISE_CNTL 0x74u
#define TV_Y_SAW_TOOTH_CNTL 0x75u
#define TV_MODULATOR_CNTL1 0x80u
#define TV_MODULATOR_CNTL2 0x81u
#define TV_PRE_DAC_MUX_CNTL 0x90u
#define TV_DAC_CNTL 0xa0u
#define TV_CRC_CNTL 0xb0u
#define TV_VIDEO_PORT_SIG 0xb1u
#define TV_VBI_CC_CNTL 0xb8u
#define TV_VBI_EDS_CNTL 0xb9u
#define TV_VBI_20BIT_CNTL 0xbau
#define TV_VBI_DTO_CNTL 0xbdu
#define TV_VBI_LEVEL_CNTL 0xbeu
#define TV_UV_ADR 0xc0u
#define TV_FIFO_TEST_CNTL 0xc1u
#define IT_SDA_GET 0x40u
#define IT_SDA_SET 0x20u
#define IT_SDA_DIR 0x10u
#define IT_SCL_GET 0x04u
#define IT_SCL_SET 0x02u
#define IT_SCL_DIR 0x01u
#define IT_I2C_CNTL 0x0015u
#define COORD_MASK 0x07ffu
#define PIX_WIDTH_1BPP 0x00u
#define PIX_WIDTH_4BPP 0x01u
#define PIX_WIDTH_8BPP 0x02u
#define PIX_WIDTH_15BPP 0x03u
#define PIX_WIDTH_16BPP 0x04u
#define PIX_WIDTH_24BPP 0x05u
#define PIX_WIDTH_32BPP 0x06u
#define PIX_WIDTH_YUV422 0x07u
#define SRC_BKGD 0x00u
#define SRC_FRGD 0x01u
#define SRC_HOST 0x02u
#define SRC_BLIT 0x03u
#define SRC_PATTERN 0x04u
#define SRC_SCALER_3D 0x05u
#define MIX_MASK 0x001fu
#define MIX_NOT_DST 0x0000u
#define MIX_0 0x0001u
#define MIX_1 0x0002u
#define MIX_DST 0x0003u
#define MIX_NOT_SRC 0x0004u
#define MIX_XOR 0x0005u
#define MIX_XNOR 0x0006u
#define MIX_SRC 0x0007u
#define MIX_NAND 0x0008u
#define MIX_NOT_SRC_OR_DST 0x0009u
#define MIX_SRC_OR_NOT_DST 0x000au
#define MIX_OR 0x000bu
#define MIX_AND 0x000cu
#define MIX_SRC_AND_NOT_DST 0x000du
#define MIX_NOT_SRC_AND_DST 0x000eu
#define MIX_NOR 0x000fu
#define MIX_MIN 0x0010u
#define MIX_DST_MINUS_SRC 0x0011u
#define MIX_SRC_MINUS_DST 0x0012u
#define MIX_PLUS 0x0013u
#define MIX_MAX 0x0014u
#define MIX_HALF__DST_MINUS_SRC 0x0015u
#define MIX_HALF__SRC_MINUS_DST 0x0016u
#define MIX_AVERAGE 0x0017u
#define MIX_DST_MINUS_SRC_SAT 0x0018u
#define MIX_SRC_MINUS_DST_SAT 0x001au
#define MIX_HALF__DST_MINUS_SRC_SAT 0x001cu
#define MIX_HALF__SRC_MINUS_DST_SAT 0x001eu
#define MIX_AVERAGE_SAT 0x001fu
#define MIX_FN_PAINT MIX_SRC
#define OVERLAY_MIX_FALSE 0x00u
#define OVERLAY_MIX_TRUE 0x01u
#define OVERLAY_MIX_NOT_EQUAL 0x04u
#define OVERLAY_MIX_EQUAL 0x05u
#endif