MacroAssemblerARMv7.h [plain text]
#pragma once
#if ENABLE(ASSEMBLER)
#include "ARMv7Assembler.h"
#include "AbstractMacroAssembler.h"
namespace JSC {
class MacroAssemblerARMv7 : public AbstractMacroAssembler<ARMv7Assembler> {
static const RegisterID dataTempRegister = ARMRegisters::ip;
static const RegisterID addressTempRegister = ARMRegisters::r6;
static const ARMRegisters::FPDoubleRegisterID fpTempRegister = ARMRegisters::d7;
inline ARMRegisters::FPSingleRegisterID fpTempRegisterAsSingle() { return ARMRegisters::asSingle(fpTempRegister); }
public:
static const unsigned numGPRs = 16;
static const unsigned numFPRs = 16;
MacroAssemblerARMv7()
: m_makeJumpPatchable(false)
{
}
typedef ARMv7Assembler::LinkRecord LinkRecord;
typedef ARMv7Assembler::JumpType JumpType;
typedef ARMv7Assembler::JumpLinkType JumpLinkType;
typedef ARMv7Assembler::Condition Condition;
static const ARMv7Assembler::Condition DefaultCondition = ARMv7Assembler::ConditionInvalid;
static const ARMv7Assembler::JumpType DefaultJump = ARMv7Assembler::JumpNoConditionFixedSize;
static bool isCompactPtrAlignedAddressOffset(ptrdiff_t value)
{
return value >= -255 && value <= 255;
}
Vector<LinkRecord, 0, UnsafeVectorOverflow>& jumpsToLink() { return m_assembler.jumpsToLink(); }
void* unlinkedCode() { return m_assembler.unlinkedCode(); }
static bool canCompact(JumpType jumpType) { return ARMv7Assembler::canCompact(jumpType); }
static JumpLinkType computeJumpType(JumpType jumpType, const uint8_t* from, const uint8_t* to) { return ARMv7Assembler::computeJumpType(jumpType, from, to); }
static JumpLinkType computeJumpType(LinkRecord& record, const uint8_t* from, const uint8_t* to) { return ARMv7Assembler::computeJumpType(record, from, to); }
static int jumpSizeDelta(JumpType jumpType, JumpLinkType jumpLinkType) { return ARMv7Assembler::jumpSizeDelta(jumpType, jumpLinkType); }
static void link(LinkRecord& record, uint8_t* from, const uint8_t* fromInstruction, uint8_t* to) { return ARMv7Assembler::link(record, from, fromInstruction, to); }
struct ArmAddress {
enum AddressType {
HasOffset,
HasIndex,
} type;
RegisterID base;
union {
int32_t offset;
struct {
RegisterID index;
Scale scale;
};
} u;
explicit ArmAddress(RegisterID base, int32_t offset = 0)
: type(HasOffset)
, base(base)
{
u.offset = offset;
}
explicit ArmAddress(RegisterID base, RegisterID index, Scale scale = TimesOne)
: type(HasIndex)
, base(base)
{
u.index = index;
u.scale = scale;
}
};
public:
static const Scale ScalePtr = TimesFour;
enum RelationalCondition {
Equal = ARMv7Assembler::ConditionEQ,
NotEqual = ARMv7Assembler::ConditionNE,
Above = ARMv7Assembler::ConditionHI,
AboveOrEqual = ARMv7Assembler::ConditionHS,
Below = ARMv7Assembler::ConditionLO,
BelowOrEqual = ARMv7Assembler::ConditionLS,
GreaterThan = ARMv7Assembler::ConditionGT,
GreaterThanOrEqual = ARMv7Assembler::ConditionGE,
LessThan = ARMv7Assembler::ConditionLT,
LessThanOrEqual = ARMv7Assembler::ConditionLE
};
enum ResultCondition {
Overflow = ARMv7Assembler::ConditionVS,
Signed = ARMv7Assembler::ConditionMI,
PositiveOrZero = ARMv7Assembler::ConditionPL,
Zero = ARMv7Assembler::ConditionEQ,
NonZero = ARMv7Assembler::ConditionNE
};
enum DoubleCondition {
DoubleEqual = ARMv7Assembler::ConditionEQ,
DoubleNotEqual = ARMv7Assembler::ConditionVC, DoubleGreaterThan = ARMv7Assembler::ConditionGT,
DoubleGreaterThanOrEqual = ARMv7Assembler::ConditionGE,
DoubleLessThan = ARMv7Assembler::ConditionLO,
DoubleLessThanOrEqual = ARMv7Assembler::ConditionLS,
DoubleEqualOrUnordered = ARMv7Assembler::ConditionVS, DoubleNotEqualOrUnordered = ARMv7Assembler::ConditionNE,
DoubleGreaterThanOrUnordered = ARMv7Assembler::ConditionHI,
DoubleGreaterThanOrEqualOrUnordered = ARMv7Assembler::ConditionHS,
DoubleLessThanOrUnordered = ARMv7Assembler::ConditionLT,
DoubleLessThanOrEqualOrUnordered = ARMv7Assembler::ConditionLE,
};
static const RegisterID stackPointerRegister = ARMRegisters::sp;
static const RegisterID framePointerRegister = ARMRegisters::fp;
static const RegisterID linkRegister = ARMRegisters::lr;
void add32(RegisterID src, RegisterID dest)
{
m_assembler.add(dest, dest, src);
}
void add32(RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.add(dest, left, right);
}
void add32(TrustedImm32 imm, RegisterID dest)
{
add32(imm, dest, dest);
}
void add32(AbsoluteAddress src, RegisterID dest)
{
load32(src.m_ptr, dataTempRegister);
add32(dataTempRegister, dest);
}
void add32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
if (dest == ARMRegisters::sp && src != dest) {
move(src, ARMRegisters::sp);
src = ARMRegisters::sp;
}
if (armImm.isValid())
m_assembler.add(dest, src, armImm);
else {
move(imm, dataTempRegister);
m_assembler.add(dest, src, dataTempRegister);
}
}
void add32(TrustedImm32 imm, Address address)
{
load32(address, dataTempRegister);
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.add(dataTempRegister, dataTempRegister, armImm);
else {
move(imm, addressTempRegister);
m_assembler.add(dataTempRegister, dataTempRegister, addressTempRegister);
}
store32(dataTempRegister, address);
}
void add32(Address src, RegisterID dest)
{
load32(src, dataTempRegister);
add32(dataTempRegister, dest);
}
void add32(TrustedImm32 imm, AbsoluteAddress address)
{
load32(address.m_ptr, dataTempRegister);
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.add(dataTempRegister, dataTempRegister, armImm);
else {
move(imm, addressTempRegister);
m_assembler.add(dataTempRegister, dataTempRegister, addressTempRegister);
}
store32(dataTempRegister, address.m_ptr);
}
void getEffectiveAddress(BaseIndex address, RegisterID dest)
{
m_assembler.lsl(addressTempRegister, address.index, static_cast<int>(address.scale));
m_assembler.add(dest, address.base, addressTempRegister);
if (address.offset)
add32(TrustedImm32(address.offset), dest);
}
void addPtrNoFlags(TrustedImm32 imm, RegisterID srcDest)
{
add32(imm, srcDest);
}
void add64(TrustedImm32 imm, AbsoluteAddress address)
{
move(TrustedImmPtr(address.m_ptr), addressTempRegister);
m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(0));
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.add_S(dataTempRegister, dataTempRegister, armImm);
else {
move(imm, addressTempRegister);
m_assembler.add_S(dataTempRegister, dataTempRegister, addressTempRegister);
move(TrustedImmPtr(address.m_ptr), addressTempRegister);
}
m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(0));
m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(4));
m_assembler.adc(dataTempRegister, dataTempRegister, ARMThumbImmediate::makeEncodedImm(imm.m_value >> 31));
m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(4));
}
void and32(RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.ARM_and(dest, op1, op2);
}
void and32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.ARM_and(dest, src, armImm);
else {
move(imm, dataTempRegister);
m_assembler.ARM_and(dest, src, dataTempRegister);
}
}
void and32(RegisterID src, RegisterID dest)
{
and32(dest, src, dest);
}
void and32(TrustedImm32 imm, RegisterID dest)
{
and32(imm, dest, dest);
}
void and32(Address src, RegisterID dest)
{
load32(src, dataTempRegister);
and32(dataTempRegister, dest);
}
void countLeadingZeros32(RegisterID src, RegisterID dest)
{
m_assembler.clz(dest, src);
}
void lshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
ASSERT(armImm.isValid());
m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);
m_assembler.lsl(dest, src, dataTempRegister);
}
void lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
{
m_assembler.lsl(dest, src, imm.m_value & 0x1f);
}
void lshift32(RegisterID shiftAmount, RegisterID dest)
{
lshift32(dest, shiftAmount, dest);
}
void lshift32(TrustedImm32 imm, RegisterID dest)
{
lshift32(dest, imm, dest);
}
void mul32(RegisterID src, RegisterID dest)
{
m_assembler.smull(dest, dataTempRegister, dest, src);
}
void mul32(RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.smull(dest, dataTempRegister, left, right);
}
void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
move(imm, dataTempRegister);
m_assembler.smull(dest, dataTempRegister, src, dataTempRegister);
}
void neg32(RegisterID srcDest)
{
m_assembler.neg(srcDest, srcDest);
}
void neg32(RegisterID src, RegisterID dest)
{
m_assembler.neg(dest, src);
}
void or32(RegisterID src, RegisterID dest)
{
m_assembler.orr(dest, dest, src);
}
void or32(RegisterID src, AbsoluteAddress dest)
{
move(TrustedImmPtr(dest.m_ptr), addressTempRegister);
load32(addressTempRegister, dataTempRegister);
or32(src, dataTempRegister);
store32(dataTempRegister, addressTempRegister);
}
void or32(TrustedImm32 imm, AbsoluteAddress address)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid()) {
move(TrustedImmPtr(address.m_ptr), addressTempRegister);
load32(addressTempRegister, dataTempRegister);
m_assembler.orr(dataTempRegister, dataTempRegister, armImm);
store32(dataTempRegister, addressTempRegister);
} else {
move(TrustedImmPtr(address.m_ptr), addressTempRegister);
load32(addressTempRegister, dataTempRegister);
move(imm, addressTempRegister);
m_assembler.orr(dataTempRegister, dataTempRegister, addressTempRegister);
move(TrustedImmPtr(address.m_ptr), addressTempRegister);
store32(dataTempRegister, addressTempRegister);
}
}
void or32(TrustedImm32 imm, Address address)
{
load32(address, dataTempRegister);
or32(imm, dataTempRegister, dataTempRegister);
store32(dataTempRegister, address);
}
void or32(TrustedImm32 imm, RegisterID dest)
{
or32(imm, dest, dest);
}
void or32(RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.orr(dest, op1, op2);
}
void or32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.orr(dest, src, armImm);
else {
ASSERT(src != dataTempRegister);
move(imm, dataTempRegister);
m_assembler.orr(dest, src, dataTempRegister);
}
}
void rshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
ASSERT(armImm.isValid());
m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);
m_assembler.asr(dest, src, dataTempRegister);
}
void rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
{
if (!imm.m_value)
move(src, dest);
else
m_assembler.asr(dest, src, imm.m_value & 0x1f);
}
void rshift32(RegisterID shiftAmount, RegisterID dest)
{
rshift32(dest, shiftAmount, dest);
}
void rshift32(TrustedImm32 imm, RegisterID dest)
{
rshift32(dest, imm, dest);
}
void urshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
ASSERT(armImm.isValid());
m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);
m_assembler.lsr(dest, src, dataTempRegister);
}
void urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
{
if (!imm.m_value)
move(src, dest);
else
m_assembler.lsr(dest, src, imm.m_value & 0x1f);
}
void urshift32(RegisterID shiftAmount, RegisterID dest)
{
urshift32(dest, shiftAmount, dest);
}
void urshift32(TrustedImm32 imm, RegisterID dest)
{
urshift32(dest, imm, dest);
}
void sub32(RegisterID src, RegisterID dest)
{
m_assembler.sub(dest, dest, src);
}
void sub32(RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.sub(dest, left, right);
}
void sub32(TrustedImm32 imm, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.sub(dest, dest, armImm);
else {
move(imm, dataTempRegister);
m_assembler.sub(dest, dest, dataTempRegister);
}
}
void sub32(TrustedImm32 imm, Address address)
{
load32(address, dataTempRegister);
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.sub(dataTempRegister, dataTempRegister, armImm);
else {
move(imm, addressTempRegister);
m_assembler.sub(dataTempRegister, dataTempRegister, addressTempRegister);
}
store32(dataTempRegister, address);
}
void sub32(Address src, RegisterID dest)
{
load32(src, dataTempRegister);
sub32(dataTempRegister, dest);
}
void sub32(TrustedImm32 imm, AbsoluteAddress address)
{
load32(address.m_ptr, dataTempRegister);
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.sub(dataTempRegister, dataTempRegister, armImm);
else {
move(imm, addressTempRegister);
m_assembler.sub(dataTempRegister, dataTempRegister, addressTempRegister);
}
store32(dataTempRegister, address.m_ptr);
}
void xor32(RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.eor(dest, op1, op2);
}
void xor32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
if (imm.m_value == -1) {
m_assembler.mvn(dest, src);
return;
}
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.eor(dest, src, armImm);
else {
move(imm, dataTempRegister);
m_assembler.eor(dest, src, dataTempRegister);
}
}
void xor32(RegisterID src, RegisterID dest)
{
xor32(dest, src, dest);
}
void xor32(Address src, RegisterID dest)
{
load32(src, dataTempRegister);
xor32(dataTempRegister, dest);
}
void xor32(TrustedImm32 imm, RegisterID dest)
{
if (imm.m_value == -1)
m_assembler.mvn(dest, dest);
else
xor32(imm, dest, dest);
}
private:
void load32(ArmAddress address, RegisterID dest)
{
if (address.type == ArmAddress::HasIndex)
m_assembler.ldr(dest, address.base, address.u.index, address.u.scale);
else if (address.u.offset >= 0) {
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
ASSERT(armImm.isValid());
m_assembler.ldr(dest, address.base, armImm);
} else {
ASSERT(address.u.offset >= -255);
m_assembler.ldr(dest, address.base, address.u.offset, true, false);
}
}
void load16(ArmAddress address, RegisterID dest)
{
if (address.type == ArmAddress::HasIndex)
m_assembler.ldrh(dest, address.base, address.u.index, address.u.scale);
else if (address.u.offset >= 0) {
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
ASSERT(armImm.isValid());
m_assembler.ldrh(dest, address.base, armImm);
} else {
ASSERT(address.u.offset >= -255);
m_assembler.ldrh(dest, address.base, address.u.offset, true, false);
}
}
void load16SignedExtendTo32(ArmAddress address, RegisterID dest)
{
ASSERT(address.type == ArmAddress::HasIndex);
m_assembler.ldrsh(dest, address.base, address.u.index, address.u.scale);
}
void load8(ArmAddress address, RegisterID dest)
{
if (address.type == ArmAddress::HasIndex)
m_assembler.ldrb(dest, address.base, address.u.index, address.u.scale);
else if (address.u.offset >= 0) {
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
ASSERT(armImm.isValid());
m_assembler.ldrb(dest, address.base, armImm);
} else {
ASSERT(address.u.offset >= -255);
m_assembler.ldrb(dest, address.base, address.u.offset, true, false);
}
}
void load8SignedExtendTo32(ArmAddress address, RegisterID dest)
{
ASSERT(address.type == ArmAddress::HasIndex);
m_assembler.ldrsb(dest, address.base, address.u.index, address.u.scale);
}
protected:
void store32(RegisterID src, ArmAddress address)
{
if (address.type == ArmAddress::HasIndex)
m_assembler.str(src, address.base, address.u.index, address.u.scale);
else if (address.u.offset >= 0) {
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
ASSERT(armImm.isValid());
m_assembler.str(src, address.base, armImm);
} else {
ASSERT(address.u.offset >= -255);
m_assembler.str(src, address.base, address.u.offset, true, false);
}
}
private:
void store8(RegisterID src, ArmAddress address)
{
if (address.type == ArmAddress::HasIndex)
m_assembler.strb(src, address.base, address.u.index, address.u.scale);
else if (address.u.offset >= 0) {
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
ASSERT(armImm.isValid());
m_assembler.strb(src, address.base, armImm);
} else {
ASSERT(address.u.offset >= -255);
m_assembler.strb(src, address.base, address.u.offset, true, false);
}
}
void store16(RegisterID src, ArmAddress address)
{
if (address.type == ArmAddress::HasIndex)
m_assembler.strh(src, address.base, address.u.index, address.u.scale);
else if (address.u.offset >= 0) {
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
ASSERT(armImm.isValid());
m_assembler.strh(src, address.base, armImm);
} else {
ASSERT(address.u.offset >= -255);
m_assembler.strh(src, address.base, address.u.offset, true, false);
}
}
public:
void load32(ImplicitAddress address, RegisterID dest)
{
load32(setupArmAddress(address), dest);
}
void load32(BaseIndex address, RegisterID dest)
{
load32(setupArmAddress(address), dest);
}
void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
{
load32(setupArmAddress(address), dest);
}
void load16Unaligned(BaseIndex address, RegisterID dest)
{
load16(setupArmAddress(address), dest);
}
void load32(const void* address, RegisterID dest)
{
move(TrustedImmPtr(address), addressTempRegister);
m_assembler.ldr(dest, addressTempRegister, ARMThumbImmediate::makeUInt16(0));
}
void abortWithReason(AbortReason reason)
{
move(TrustedImm32(reason), dataTempRegister);
breakpoint();
}
void abortWithReason(AbortReason reason, intptr_t misc)
{
move(TrustedImm32(misc), addressTempRegister);
abortWithReason(reason);
}
ConvertibleLoadLabel convertibleLoadPtr(Address address, RegisterID dest)
{
ConvertibleLoadLabel result(this);
ASSERT(address.offset >= 0 && address.offset <= 255);
m_assembler.ldrWide8BitImmediate(dest, address.base, address.offset);
return result;
}
void load8(ImplicitAddress address, RegisterID dest)
{
load8(setupArmAddress(address), dest);
}
void load8SignedExtendTo32(ImplicitAddress, RegisterID)
{
UNREACHABLE_FOR_PLATFORM();
}
void load8(BaseIndex address, RegisterID dest)
{
load8(setupArmAddress(address), dest);
}
void load8SignedExtendTo32(BaseIndex address, RegisterID dest)
{
load8SignedExtendTo32(setupArmAddress(address), dest);
}
void load8(const void* address, RegisterID dest)
{
move(TrustedImmPtr(address), dest);
load8(dest, dest);
}
DataLabel32 load32WithAddressOffsetPatch(Address address, RegisterID dest)
{
DataLabel32 label = moveWithPatch(TrustedImm32(address.offset), dataTempRegister);
load32(ArmAddress(address.base, dataTempRegister), dest);
return label;
}
DataLabelCompact load32WithCompactAddressOffsetPatch(Address address, RegisterID dest)
{
padBeforePatch();
RegisterID base = address.base;
DataLabelCompact label(this);
ASSERT(isCompactPtrAlignedAddressOffset(address.offset));
m_assembler.ldr(dest, base, address.offset, true, false);
return label;
}
void load16(BaseIndex address, RegisterID dest)
{
m_assembler.ldrh(dest, makeBaseIndexBase(address), address.index, address.scale);
}
void load16SignedExtendTo32(BaseIndex address, RegisterID dest)
{
load16SignedExtendTo32(setupArmAddress(address), dest);
}
void load16(ImplicitAddress address, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.offset);
if (armImm.isValid())
m_assembler.ldrh(dest, address.base, armImm);
else {
move(TrustedImm32(address.offset), dataTempRegister);
m_assembler.ldrh(dest, address.base, dataTempRegister);
}
}
void load16SignedExtendTo32(ImplicitAddress, RegisterID)
{
UNREACHABLE_FOR_PLATFORM();
}
DataLabel32 store32WithAddressOffsetPatch(RegisterID src, Address address)
{
DataLabel32 label = moveWithPatch(TrustedImm32(address.offset), dataTempRegister);
store32(src, ArmAddress(address.base, dataTempRegister));
return label;
}
void store32(RegisterID src, ImplicitAddress address)
{
store32(src, setupArmAddress(address));
}
void store32(RegisterID src, BaseIndex address)
{
store32(src, setupArmAddress(address));
}
void store32(TrustedImm32 imm, ImplicitAddress address)
{
move(imm, dataTempRegister);
store32(dataTempRegister, setupArmAddress(address));
}
void store32(TrustedImm32 imm, BaseIndex address)
{
move(imm, dataTempRegister);
store32(dataTempRegister, setupArmAddress(address));
}
void store32(RegisterID src, const void* address)
{
move(TrustedImmPtr(address), addressTempRegister);
m_assembler.str(src, addressTempRegister, ARMThumbImmediate::makeUInt16(0));
}
void store32(TrustedImm32 imm, const void* address)
{
move(imm, dataTempRegister);
store32(dataTempRegister, address);
}
void store8(RegisterID src, Address address)
{
store8(src, setupArmAddress(address));
}
void store8(RegisterID src, BaseIndex address)
{
store8(src, setupArmAddress(address));
}
void store8(RegisterID src, void* address)
{
move(TrustedImmPtr(address), addressTempRegister);
store8(src, ArmAddress(addressTempRegister, 0));
}
void store8(TrustedImm32 imm, void* address)
{
TrustedImm32 imm8(static_cast<int8_t>(imm.m_value));
move(imm8, dataTempRegister);
store8(dataTempRegister, address);
}
void store8(TrustedImm32 imm, Address address)
{
TrustedImm32 imm8(static_cast<int8_t>(imm.m_value));
move(imm8, dataTempRegister);
store8(dataTempRegister, address);
}
void store16(RegisterID src, BaseIndex address)
{
store16(src, setupArmAddress(address));
}
void moveDoubleToInts(FPRegisterID src, RegisterID dest1, RegisterID dest2)
{
m_assembler.vmov(dest1, dest2, src);
}
void moveIntsToDouble(RegisterID src1, RegisterID src2, FPRegisterID dest, FPRegisterID scratch)
{
UNUSED_PARAM(scratch);
m_assembler.vmov(dest, src1, src2);
}
static bool shouldBlindForSpecificArch(uint32_t value)
{
ARMThumbImmediate immediate = ARMThumbImmediate::makeEncodedImm(value);
if (!immediate.isValid())
return true;
if (immediate.isEncodedImm())
return false;
return !immediate.isUInt12();
}
static bool supportsFloatingPoint() { return true; }
static bool supportsFloatingPointTruncate() { return true; }
static bool supportsFloatingPointSqrt() { return true; }
static bool supportsFloatingPointAbs() { return true; }
static bool supportsFloatingPointRounding() { return false; }
void loadDouble(ImplicitAddress address, FPRegisterID dest)
{
RegisterID base = address.base;
int32_t offset = address.offset;
if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
add32(TrustedImm32(offset), base, addressTempRegister);
base = addressTempRegister;
offset = 0;
}
m_assembler.vldr(dest, base, offset);
}
void loadFloat(ImplicitAddress address, FPRegisterID dest)
{
RegisterID base = address.base;
int32_t offset = address.offset;
if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
add32(TrustedImm32(offset), base, addressTempRegister);
base = addressTempRegister;
offset = 0;
}
m_assembler.flds(ARMRegisters::asSingle(dest), base, offset);
}
void loadDouble(BaseIndex address, FPRegisterID dest)
{
move(address.index, addressTempRegister);
lshift32(TrustedImm32(address.scale), addressTempRegister);
add32(address.base, addressTempRegister);
loadDouble(Address(addressTempRegister, address.offset), dest);
}
void loadFloat(BaseIndex address, FPRegisterID dest)
{
move(address.index, addressTempRegister);
lshift32(TrustedImm32(address.scale), addressTempRegister);
add32(address.base, addressTempRegister);
loadFloat(Address(addressTempRegister, address.offset), dest);
}
void moveDouble(FPRegisterID src, FPRegisterID dest)
{
if (src != dest)
m_assembler.vmov(dest, src);
}
void moveZeroToDouble(FPRegisterID reg)
{
static double zeroConstant = 0.;
loadDouble(TrustedImmPtr(&zeroConstant), reg);
}
void loadDouble(TrustedImmPtr address, FPRegisterID dest)
{
move(address, addressTempRegister);
m_assembler.vldr(dest, addressTempRegister, 0);
}
void storeDouble(FPRegisterID src, ImplicitAddress address)
{
RegisterID base = address.base;
int32_t offset = address.offset;
if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
add32(TrustedImm32(offset), base, addressTempRegister);
base = addressTempRegister;
offset = 0;
}
m_assembler.vstr(src, base, offset);
}
void storeFloat(FPRegisterID src, ImplicitAddress address)
{
RegisterID base = address.base;
int32_t offset = address.offset;
if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
add32(TrustedImm32(offset), base, addressTempRegister);
base = addressTempRegister;
offset = 0;
}
m_assembler.fsts(ARMRegisters::asSingle(src), base, offset);
}
void storeDouble(FPRegisterID src, TrustedImmPtr address)
{
move(address, addressTempRegister);
storeDouble(src, addressTempRegister);
}
void storeDouble(FPRegisterID src, BaseIndex address)
{
move(address.index, addressTempRegister);
lshift32(TrustedImm32(address.scale), addressTempRegister);
add32(address.base, addressTempRegister);
storeDouble(src, Address(addressTempRegister, address.offset));
}
void storeFloat(FPRegisterID src, BaseIndex address)
{
move(address.index, addressTempRegister);
lshift32(TrustedImm32(address.scale), addressTempRegister);
add32(address.base, addressTempRegister);
storeFloat(src, Address(addressTempRegister, address.offset));
}
void addDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.vadd(dest, dest, src);
}
void addDouble(Address src, FPRegisterID dest)
{
loadDouble(src, fpTempRegister);
addDouble(fpTempRegister, dest);
}
void addDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
{
m_assembler.vadd(dest, op1, op2);
}
void addDouble(AbsoluteAddress address, FPRegisterID dest)
{
loadDouble(TrustedImmPtr(address.m_ptr), fpTempRegister);
m_assembler.vadd(dest, dest, fpTempRegister);
}
void divDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.vdiv(dest, dest, src);
}
void divDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
{
m_assembler.vdiv(dest, op1, op2);
}
void subDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.vsub(dest, dest, src);
}
void subDouble(Address src, FPRegisterID dest)
{
loadDouble(src, fpTempRegister);
subDouble(fpTempRegister, dest);
}
void subDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
{
m_assembler.vsub(dest, op1, op2);
}
void mulDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.vmul(dest, dest, src);
}
void mulDouble(Address src, FPRegisterID dest)
{
loadDouble(src, fpTempRegister);
mulDouble(fpTempRegister, dest);
}
void mulDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
{
m_assembler.vmul(dest, op1, op2);
}
void sqrtDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.vsqrt(dest, src);
}
void absDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.vabs(dest, src);
}
void negateDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.vneg(dest, src);
}
NO_RETURN_DUE_TO_CRASH void ceilDouble(FPRegisterID, FPRegisterID)
{
ASSERT(!supportsFloatingPointRounding());
CRASH();
}
NO_RETURN_DUE_TO_CRASH void floorDouble(FPRegisterID, FPRegisterID)
{
ASSERT(!supportsFloatingPointRounding());
CRASH();
}
NO_RETURN_DUE_TO_CRASH void roundTowardZeroDouble(FPRegisterID, FPRegisterID)
{
ASSERT(!supportsFloatingPointRounding());
CRASH();
}
void convertInt32ToDouble(RegisterID src, FPRegisterID dest)
{
m_assembler.vmov(fpTempRegister, src, src);
m_assembler.vcvt_signedToFloatingPoint(dest, fpTempRegisterAsSingle());
}
void convertInt32ToDouble(Address address, FPRegisterID dest)
{
load32(address, dataTempRegister);
m_assembler.vmov(fpTempRegister, dataTempRegister, dataTempRegister);
m_assembler.vcvt_signedToFloatingPoint(dest, fpTempRegisterAsSingle());
}
void convertInt32ToDouble(AbsoluteAddress address, FPRegisterID dest)
{
load32(address.m_ptr, dataTempRegister);
m_assembler.vmov(fpTempRegister, dataTempRegister, dataTempRegister);
m_assembler.vcvt_signedToFloatingPoint(dest, fpTempRegisterAsSingle());
}
void convertFloatToDouble(FPRegisterID src, FPRegisterID dst)
{
m_assembler.vcvtds(dst, ARMRegisters::asSingle(src));
}
void convertDoubleToFloat(FPRegisterID src, FPRegisterID dst)
{
m_assembler.vcvtsd(ARMRegisters::asSingle(dst), src);
}
Jump branchDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right)
{
m_assembler.vcmp(left, right);
m_assembler.vmrs();
if (cond == DoubleNotEqual) {
Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
Jump result = makeBranch(ARMv7Assembler::ConditionNE);
unordered.link(this);
return result;
}
if (cond == DoubleEqualOrUnordered) {
Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
Jump notEqual = makeBranch(ARMv7Assembler::ConditionNE);
unordered.link(this);
Jump result = jump();
notEqual.link(this);
return result;
}
return makeBranch(cond);
}
enum BranchTruncateType { BranchIfTruncateFailed, BranchIfTruncateSuccessful };
Jump branchTruncateDoubleToInt32(FPRegisterID src, RegisterID dest, BranchTruncateType branchType = BranchIfTruncateFailed)
{
m_assembler.vcvt_floatingPointToSigned(fpTempRegisterAsSingle(), src);
m_assembler.vmov(dest, fpTempRegisterAsSingle());
Jump underflow = branchAdd32(Zero, dest, dest, dataTempRegister);
Jump noOverflow = branch32(NotEqual, dataTempRegister, TrustedImm32(-2));
underflow.link(this);
if (branchType == BranchIfTruncateSuccessful)
return noOverflow;
Jump failure = jump();
noOverflow.link(this);
return failure;
}
void truncateDoubleToInt32(FPRegisterID src, RegisterID dest)
{
m_assembler.vcvt_floatingPointToSigned(fpTempRegisterAsSingle(), src);
m_assembler.vmov(dest, fpTempRegisterAsSingle());
}
void truncateDoubleToUint32(FPRegisterID src, RegisterID dest)
{
m_assembler.vcvt_floatingPointToUnsigned(fpTempRegisterAsSingle(), src);
m_assembler.vmov(dest, fpTempRegisterAsSingle());
}
void branchConvertDoubleToInt32(FPRegisterID src, RegisterID dest, JumpList& failureCases, FPRegisterID, bool negZeroCheck = true)
{
m_assembler.vcvt_floatingPointToSigned(fpTempRegisterAsSingle(), src);
m_assembler.vmov(dest, fpTempRegisterAsSingle());
m_assembler.vcvt_signedToFloatingPoint(fpTempRegister, fpTempRegisterAsSingle());
failureCases.append(branchDouble(DoubleNotEqualOrUnordered, src, fpTempRegister));
if (negZeroCheck)
failureCases.append(branchTest32(Zero, dest));
}
Jump branchDoubleNonZero(FPRegisterID reg, FPRegisterID)
{
m_assembler.vcmpz(reg);
m_assembler.vmrs();
Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
Jump result = makeBranch(ARMv7Assembler::ConditionNE);
unordered.link(this);
return result;
}
Jump branchDoubleZeroOrNaN(FPRegisterID reg, FPRegisterID)
{
m_assembler.vcmpz(reg);
m_assembler.vmrs();
Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
Jump notEqual = makeBranch(ARMv7Assembler::ConditionNE);
unordered.link(this);
Jump result = jump();
notEqual.link(this);
return result;
}
void pop(RegisterID dest)
{
m_assembler.pop(dest);
}
void push(RegisterID src)
{
m_assembler.push(src);
}
void push(Address address)
{
load32(address, dataTempRegister);
push(dataTempRegister);
}
void push(TrustedImm32 imm)
{
move(imm, dataTempRegister);
push(dataTempRegister);
}
void popPair(RegisterID dest1, RegisterID dest2)
{
m_assembler.pop(1 << dest1 | 1 << dest2);
}
void pushPair(RegisterID src1, RegisterID src2)
{
m_assembler.push(1 << src1 | 1 << src2);
}
void move(TrustedImm32 imm, RegisterID dest)
{
uint32_t value = imm.m_value;
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(value);
if (armImm.isValid())
m_assembler.mov(dest, armImm);
else if ((armImm = ARMThumbImmediate::makeEncodedImm(~value)).isValid())
m_assembler.mvn(dest, armImm);
else {
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(value));
if (value & 0xffff0000)
m_assembler.movt(dest, ARMThumbImmediate::makeUInt16(value >> 16));
}
}
void move(RegisterID src, RegisterID dest)
{
if (src != dest)
m_assembler.mov(dest, src);
}
void move(TrustedImmPtr imm, RegisterID dest)
{
move(TrustedImm32(imm), dest);
}
void swap(RegisterID reg1, RegisterID reg2)
{
move(reg1, dataTempRegister);
move(reg2, reg1);
move(dataTempRegister, reg2);
}
void signExtend32ToPtr(RegisterID src, RegisterID dest)
{
move(src, dest);
}
void zeroExtend32ToPtr(RegisterID src, RegisterID dest)
{
move(src, dest);
}
static RelationalCondition invert(RelationalCondition cond)
{
return static_cast<RelationalCondition>(cond ^ 1);
}
void nop()
{
m_assembler.nop();
}
void memoryFence()
{
m_assembler.dmbSY();
}
void storeFence()
{
m_assembler.dmbISHST();
}
static void replaceWithJump(CodeLocationLabel instructionStart, CodeLocationLabel destination)
{
ARMv7Assembler::replaceWithJump(instructionStart.dataLocation(), destination.dataLocation());
}
static ptrdiff_t maxJumpReplacementSize()
{
return ARMv7Assembler::maxJumpReplacementSize();
}
static ptrdiff_t patchableJumpSize()
{
return ARMv7Assembler::patchableJumpSize();
}
private:
void compare32AndSetFlags(RegisterID left, TrustedImm32 right)
{
int32_t imm = right.m_value;
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm);
if (armImm.isValid())
m_assembler.cmp(left, armImm);
else if ((armImm = ARMThumbImmediate::makeEncodedImm(-imm)).isValid())
m_assembler.cmn(left, armImm);
else {
move(TrustedImm32(imm), dataTempRegister);
m_assembler.cmp(left, dataTempRegister);
}
}
public:
void test32(RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
int32_t imm = mask.m_value;
if (imm == -1)
m_assembler.tst(reg, reg);
else {
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm);
if (armImm.isValid()) {
if (reg == ARMRegisters::sp) {
move(reg, addressTempRegister);
m_assembler.tst(addressTempRegister, armImm);
} else
m_assembler.tst(reg, armImm);
} else {
move(mask, dataTempRegister);
if (reg == ARMRegisters::sp) {
move(reg, addressTempRegister);
m_assembler.tst(addressTempRegister, dataTempRegister);
} else
m_assembler.tst(reg, dataTempRegister);
}
}
}
Jump branch(ResultCondition cond)
{
return Jump(makeBranch(cond));
}
Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
{
m_assembler.cmp(left, right);
return Jump(makeBranch(cond));
}
Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right)
{
compare32AndSetFlags(left, right);
return Jump(makeBranch(cond));
}
Jump branch32(RelationalCondition cond, RegisterID left, Address right)
{
load32(right, dataTempRegister);
return branch32(cond, left, dataTempRegister);
}
Jump branch32(RelationalCondition cond, Address left, RegisterID right)
{
load32(left, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
{
load32(left, addressTempRegister);
return branch32(cond, addressTempRegister, right);
}
Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
load32(left, addressTempRegister);
return branch32(cond, addressTempRegister, right);
}
Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
load32WithUnalignedHalfWords(left, addressTempRegister);
return branch32(cond, addressTempRegister, right);
}
Jump branch32(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
{
load32(left.m_ptr, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
Jump branch32(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
{
load32(left.m_ptr, addressTempRegister);
return branch32(cond, addressTempRegister, right);
}
Jump branchPtr(RelationalCondition cond, BaseIndex left, RegisterID right)
{
load32(left, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
Jump branch8(RelationalCondition cond, RegisterID left, TrustedImm32 right)
{
TrustedImm32 right8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, right);
compare32AndSetFlags(left, right8);
return Jump(makeBranch(cond));
}
Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
{
TrustedImm32 right8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, right);
MacroAssemblerHelpers::load8OnCondition(*this, cond, left, addressTempRegister);
return branch8(cond, addressTempRegister, right8);
}
Jump branch8(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
TrustedImm32 right8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, right);
MacroAssemblerHelpers::load8OnCondition(*this, cond, left, addressTempRegister);
return branch32(cond, addressTempRegister, right8);
}
Jump branch8(RelationalCondition cond, AbsoluteAddress address, TrustedImm32 right)
{
TrustedImm32 right8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, right);
move(TrustedImmPtr(address.m_ptr), addressTempRegister);
MacroAssemblerHelpers::load8OnCondition(*this, cond, Address(addressTempRegister), addressTempRegister);
return branch32(cond, addressTempRegister, right8);
}
Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
{
ASSERT(cond == Zero || cond == NonZero || cond == Signed || cond == PositiveOrZero);
m_assembler.tst(reg, mask);
return Jump(makeBranch(cond));
}
Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
ASSERT(cond == Zero || cond == NonZero || cond == Signed || cond == PositiveOrZero);
test32(reg, mask);
return Jump(makeBranch(cond));
}
Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
load32(address, addressTempRegister);
return branchTest32(cond, addressTempRegister, mask);
}
Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
load32(address, addressTempRegister);
return branchTest32(cond, addressTempRegister, mask);
}
Jump branchTest8(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
TrustedImm32 mask8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, mask);
MacroAssemblerHelpers::load8OnCondition(*this, cond, address, addressTempRegister);
return branchTest32(cond, addressTempRegister, mask8);
}
Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
TrustedImm32 mask8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, mask);
MacroAssemblerHelpers::load8OnCondition(*this, cond, address, addressTempRegister);
return branchTest32(cond, addressTempRegister, mask8);
}
Jump branchTest8(ResultCondition cond, AbsoluteAddress address, TrustedImm32 mask = TrustedImm32(-1))
{
TrustedImm32 mask8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, mask);
move(TrustedImmPtr(address.m_ptr), addressTempRegister);
MacroAssemblerHelpers::load8OnCondition(*this, cond, Address(addressTempRegister), addressTempRegister);
return branchTest32(cond, addressTempRegister, mask8);
}
void jump(RegisterID target)
{
m_assembler.bx(target);
}
void jump(Address address)
{
load32(address, dataTempRegister);
m_assembler.bx(dataTempRegister);
}
void jump(AbsoluteAddress address)
{
move(TrustedImmPtr(address.m_ptr), dataTempRegister);
load32(Address(dataTempRegister), dataTempRegister);
m_assembler.bx(dataTempRegister);
}
Jump branchAdd32(ResultCondition cond, RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.add_S(dest, op1, op2);
return Jump(makeBranch(cond));
}
Jump branchAdd32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.add_S(dest, op1, armImm);
else {
move(imm, dataTempRegister);
m_assembler.add_S(dest, op1, dataTempRegister);
}
return Jump(makeBranch(cond));
}
Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
{
return branchAdd32(cond, dest, src, dest);
}
Jump branchAdd32(ResultCondition cond, Address src, RegisterID dest)
{
load32(src, dataTempRegister);
return branchAdd32(cond, dest, dataTempRegister, dest);
}
Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
return branchAdd32(cond, dest, imm, dest);
}
Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest)
{
move(TrustedImmPtr(dest.m_ptr), addressTempRegister);
m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt16(0));
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.add_S(dataTempRegister, dataTempRegister, armImm);
else {
move(imm, addressTempRegister);
m_assembler.add_S(dataTempRegister, dataTempRegister, addressTempRegister);
move(TrustedImmPtr(dest.m_ptr), addressTempRegister);
}
m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt16(0));
return Jump(makeBranch(cond));
}
Jump branchMul32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
{
m_assembler.smull(dest, dataTempRegister, src1, src2);
if (cond == Overflow) {
m_assembler.asr(addressTempRegister, dest, 31);
return branch32(NotEqual, addressTempRegister, dataTempRegister);
}
return branchTest32(cond, dest);
}
Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
{
return branchMul32(cond, src, dest, dest);
}
Jump branchMul32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
{
move(imm, dataTempRegister);
return branchMul32(cond, dataTempRegister, src, dest);
}
Jump branchNeg32(ResultCondition cond, RegisterID srcDest)
{
ARMThumbImmediate zero = ARMThumbImmediate::makeUInt12(0);
m_assembler.sub_S(srcDest, zero, srcDest);
return Jump(makeBranch(cond));
}
Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
{
m_assembler.orr_S(dest, dest, src);
return Jump(makeBranch(cond));
}
Jump branchSub32(ResultCondition cond, RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.sub_S(dest, op1, op2);
return Jump(makeBranch(cond));
}
Jump branchSub32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest)
{
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.sub_S(dest, op1, armImm);
else {
move(imm, dataTempRegister);
m_assembler.sub_S(dest, op1, dataTempRegister);
}
return Jump(makeBranch(cond));
}
Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
{
return branchSub32(cond, dest, src, dest);
}
Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
return branchSub32(cond, dest, imm, dest);
}
void relativeTableJump(RegisterID index, int scale)
{
ASSERT(scale >= 0 && scale <= 31);
move(ARMRegisters::pc, dataTempRegister);
m_assembler.add(dataTempRegister, dataTempRegister, ARMThumbImmediate::makeEncodedImm(9));
ShiftTypeAndAmount shift(SRType_LSL, scale);
m_assembler.add(dataTempRegister, dataTempRegister, index, shift);
jump(dataTempRegister);
}
void breakpoint(uint8_t imm = 0)
{
m_assembler.bkpt(imm);
}
static bool isBreakpoint(void* address) { return ARMv7Assembler::isBkpt(address); }
ALWAYS_INLINE Call nearCall()
{
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
return Call(m_assembler.blx(dataTempRegister), Call::LinkableNear);
}
ALWAYS_INLINE Call nearTailCall()
{
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
return Call(m_assembler.bx(dataTempRegister), Call::LinkableNearTail);
}
ALWAYS_INLINE Call call()
{
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
return Call(m_assembler.blx(dataTempRegister), Call::Linkable);
}
ALWAYS_INLINE Call call(RegisterID target)
{
return Call(m_assembler.blx(target), Call::None);
}
ALWAYS_INLINE Call call(Address address)
{
load32(address, dataTempRegister);
return Call(m_assembler.blx(dataTempRegister), Call::None);
}
ALWAYS_INLINE void ret()
{
m_assembler.bx(linkRegister);
}
void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.cmp(left, right);
m_assembler.it(armV7Condition(cond), false);
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(1));
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
void compare32(RelationalCondition cond, Address left, RegisterID right, RegisterID dest)
{
load32(left, dataTempRegister);
compare32(cond, dataTempRegister, right, dest);
}
void compare8(RelationalCondition cond, Address left, TrustedImm32 right, RegisterID dest)
{
TrustedImm32 right8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, right);
MacroAssemblerHelpers::load8OnCondition(*this, cond, left, addressTempRegister);
compare32(cond, addressTempRegister, right8, dest);
}
void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
{
compare32AndSetFlags(left, right);
m_assembler.it(armV7Condition(cond), false);
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(1));
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
void test32(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
load32(address, dataTempRegister);
test32(dataTempRegister, mask);
m_assembler.it(armV7Condition(cond), false);
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(1));
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
TrustedImm32 mask8 = MacroAssemblerHelpers::mask8OnCondition(*this, cond, mask);
MacroAssemblerHelpers::load8OnCondition(*this, cond, address, dataTempRegister);
test32(dataTempRegister, mask8);
m_assembler.it(armV7Condition(cond), false);
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(1));
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
ALWAYS_INLINE DataLabel32 moveWithPatch(TrustedImm32 imm, RegisterID dst)
{
padBeforePatch();
moveFixedWidthEncoding(imm, dst);
return DataLabel32(this);
}
ALWAYS_INLINE DataLabelPtr moveWithPatch(TrustedImmPtr imm, RegisterID dst)
{
padBeforePatch();
moveFixedWidthEncoding(TrustedImm32(imm), dst);
return DataLabelPtr(this);
}
ALWAYS_INLINE Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
dataLabel = moveWithPatch(initialRightValue, dataTempRegister);
return branch32(cond, left, dataTempRegister);
}
ALWAYS_INLINE Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
load32(left, addressTempRegister);
dataLabel = moveWithPatch(initialRightValue, dataTempRegister);
return branch32(cond, addressTempRegister, dataTempRegister);
}
ALWAYS_INLINE Jump branch32WithPatch(RelationalCondition cond, Address left, DataLabel32& dataLabel, TrustedImm32 initialRightValue = TrustedImm32(0))
{
load32(left, addressTempRegister);
dataLabel = moveWithPatch(initialRightValue, dataTempRegister);
return branch32(cond, addressTempRegister, dataTempRegister);
}
PatchableJump patchableBranchPtr(RelationalCondition cond, Address left, TrustedImmPtr right = TrustedImmPtr(0))
{
m_makeJumpPatchable = true;
Jump result = branch32(cond, left, TrustedImm32(right));
m_makeJumpPatchable = false;
return PatchableJump(result);
}
PatchableJump patchableBranchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
m_makeJumpPatchable = true;
Jump result = branchTest32(cond, reg, mask);
m_makeJumpPatchable = false;
return PatchableJump(result);
}
PatchableJump patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm)
{
m_makeJumpPatchable = true;
Jump result = branch32(cond, reg, imm);
m_makeJumpPatchable = false;
return PatchableJump(result);
}
PatchableJump patchableBranch32(RelationalCondition cond, Address left, TrustedImm32 imm)
{
m_makeJumpPatchable = true;
Jump result = branch32(cond, left, imm);
m_makeJumpPatchable = false;
return PatchableJump(result);
}
PatchableJump patchableBranchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
m_makeJumpPatchable = true;
Jump result = branchPtrWithPatch(cond, left, dataLabel, initialRightValue);
m_makeJumpPatchable = false;
return PatchableJump(result);
}
PatchableJump patchableBranch32WithPatch(RelationalCondition cond, Address left, DataLabel32& dataLabel, TrustedImm32 initialRightValue = TrustedImm32(0))
{
m_makeJumpPatchable = true;
Jump result = branch32WithPatch(cond, left, dataLabel, initialRightValue);
m_makeJumpPatchable = false;
return PatchableJump(result);
}
PatchableJump patchableJump()
{
padBeforePatch();
m_makeJumpPatchable = true;
Jump result = jump();
m_makeJumpPatchable = false;
return PatchableJump(result);
}
ALWAYS_INLINE DataLabelPtr storePtrWithPatch(TrustedImmPtr initialValue, ImplicitAddress address)
{
DataLabelPtr label = moveWithPatch(initialValue, dataTempRegister);
store32(dataTempRegister, address);
return label;
}
ALWAYS_INLINE DataLabelPtr storePtrWithPatch(ImplicitAddress address) { return storePtrWithPatch(TrustedImmPtr(0), address); }
ALWAYS_INLINE Call tailRecursiveCall()
{
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
return Call(m_assembler.bx(dataTempRegister), Call::Linkable);
}
ALWAYS_INLINE Call makeTailRecursiveCall(Jump oldJump)
{
oldJump.link(this);
return tailRecursiveCall();
}
static FunctionPtr readCallTarget(CodeLocationCall call)
{
return FunctionPtr(reinterpret_cast<void(*)()>(ARMv7Assembler::readCallTarget(call.dataLocation())));
}
static bool canJumpReplacePatchableBranchPtrWithPatch() { return false; }
static bool canJumpReplacePatchableBranch32WithPatch() { return false; }
static CodeLocationLabel startOfBranchPtrWithPatchOnRegister(CodeLocationDataLabelPtr label)
{
const unsigned twoWordOpSize = 4;
return label.labelAtOffset(-twoWordOpSize * 2);
}
static void revertJumpReplacementToBranchPtrWithPatch(CodeLocationLabel instructionStart, RegisterID rd, void* initialValue)
{
#if OS(LINUX)
ARMv7Assembler::revertJumpTo_movT3movtcmpT2(instructionStart.dataLocation(), rd, dataTempRegister, reinterpret_cast<uintptr_t>(initialValue));
#else
UNUSED_PARAM(rd);
ARMv7Assembler::revertJumpTo_movT3(instructionStart.dataLocation(), dataTempRegister, ARMThumbImmediate::makeUInt16(reinterpret_cast<uintptr_t>(initialValue) & 0xffff));
#endif
}
static CodeLocationLabel startOfPatchableBranchPtrWithPatchOnAddress(CodeLocationDataLabelPtr)
{
UNREACHABLE_FOR_PLATFORM();
return CodeLocationLabel();
}
static CodeLocationLabel startOfPatchableBranch32WithPatchOnAddress(CodeLocationDataLabel32)
{
UNREACHABLE_FOR_PLATFORM();
return CodeLocationLabel();
}
static void revertJumpReplacementToPatchableBranchPtrWithPatch(CodeLocationLabel, Address, void*)
{
UNREACHABLE_FOR_PLATFORM();
}
static void revertJumpReplacementToPatchableBranch32WithPatch(CodeLocationLabel, Address, int32_t)
{
UNREACHABLE_FOR_PLATFORM();
}
static void repatchCall(CodeLocationCall call, CodeLocationLabel destination)
{
ARMv7Assembler::relinkCall(call.dataLocation(), destination.executableAddress());
}
static void repatchCall(CodeLocationCall call, FunctionPtr destination)
{
ARMv7Assembler::relinkCall(call.dataLocation(), destination.executableAddress());
}
protected:
ALWAYS_INLINE Jump jump()
{
m_assembler.label(); moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
return Jump(m_assembler.bx(dataTempRegister), m_makeJumpPatchable ? ARMv7Assembler::JumpNoConditionFixedSize : ARMv7Assembler::JumpNoCondition);
}
ALWAYS_INLINE Jump makeBranch(ARMv7Assembler::Condition cond)
{
m_assembler.label(); m_assembler.it(cond, true, true);
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
return Jump(m_assembler.bx(dataTempRegister), m_makeJumpPatchable ? ARMv7Assembler::JumpConditionFixedSize : ARMv7Assembler::JumpCondition, cond);
}
ALWAYS_INLINE Jump makeBranch(RelationalCondition cond) { return makeBranch(armV7Condition(cond)); }
ALWAYS_INLINE Jump makeBranch(ResultCondition cond) { return makeBranch(armV7Condition(cond)); }
ALWAYS_INLINE Jump makeBranch(DoubleCondition cond) { return makeBranch(armV7Condition(cond)); }
ArmAddress setupArmAddress(BaseIndex address)
{
if (address.offset) {
ARMThumbImmediate imm = ARMThumbImmediate::makeUInt12OrEncodedImm(address.offset);
if (imm.isValid())
m_assembler.add(addressTempRegister, address.base, imm);
else {
move(TrustedImm32(address.offset), addressTempRegister);
m_assembler.add(addressTempRegister, addressTempRegister, address.base);
}
return ArmAddress(addressTempRegister, address.index, address.scale);
} else
return ArmAddress(address.base, address.index, address.scale);
}
ArmAddress setupArmAddress(Address address)
{
if ((address.offset >= -0xff) && (address.offset <= 0xfff))
return ArmAddress(address.base, address.offset);
move(TrustedImm32(address.offset), addressTempRegister);
return ArmAddress(address.base, addressTempRegister);
}
ArmAddress setupArmAddress(ImplicitAddress address)
{
if ((address.offset >= -0xff) && (address.offset <= 0xfff))
return ArmAddress(address.base, address.offset);
move(TrustedImm32(address.offset), addressTempRegister);
return ArmAddress(address.base, addressTempRegister);
}
RegisterID makeBaseIndexBase(BaseIndex address)
{
if (!address.offset)
return address.base;
ARMThumbImmediate imm = ARMThumbImmediate::makeUInt12OrEncodedImm(address.offset);
if (imm.isValid())
m_assembler.add(addressTempRegister, address.base, imm);
else {
move(TrustedImm32(address.offset), addressTempRegister);
m_assembler.add(addressTempRegister, addressTempRegister, address.base);
}
return addressTempRegister;
}
void moveFixedWidthEncoding(TrustedImm32 imm, RegisterID dst)
{
uint32_t value = imm.m_value;
m_assembler.movT3(dst, ARMThumbImmediate::makeUInt16(value & 0xffff));
m_assembler.movt(dst, ARMThumbImmediate::makeUInt16(value >> 16));
}
ARMv7Assembler::Condition armV7Condition(RelationalCondition cond)
{
return static_cast<ARMv7Assembler::Condition>(cond);
}
ARMv7Assembler::Condition armV7Condition(ResultCondition cond)
{
return static_cast<ARMv7Assembler::Condition>(cond);
}
ARMv7Assembler::Condition armV7Condition(DoubleCondition cond)
{
return static_cast<ARMv7Assembler::Condition>(cond);
}
private:
friend class LinkBuffer;
static void linkCall(void* code, Call call, FunctionPtr function)
{
if (call.isFlagSet(Call::Tail))
ARMv7Assembler::linkJump(code, call.m_label, function.value());
else
ARMv7Assembler::linkCall(code, call.m_label, function.value());
}
bool m_makeJumpPatchable;
};
}
#endif // ENABLE(ASSEMBLER)