MacroAssemblerMIPS.h [plain text]
#ifndef MacroAssemblerMIPS_h
#define MacroAssemblerMIPS_h
#if ENABLE(ASSEMBLER) && CPU(MIPS)
#include "AbstractMacroAssembler.h"
#include "MIPSAssembler.h"
namespace JSC {
class MacroAssemblerMIPS : public AbstractMacroAssembler<MIPSAssembler, MacroAssemblerMIPS> {
public:
typedef MIPSRegisters::FPRegisterID FPRegisterID;
MacroAssemblerMIPS()
: m_fixedWidth(false)
{
}
static bool isCompactPtrAlignedAddressOffset(ptrdiff_t value)
{
return value >= -2147483647 - 1 && value <= 2147483647;
}
static const Scale ScalePtr = TimesFour;
static const RegisterID immTempRegister = MIPSRegisters::t0;
static const RegisterID dataTempRegister = MIPSRegisters::t1;
static const RegisterID addrTempRegister = MIPSRegisters::t7;
static const RegisterID cmpTempRegister = MIPSRegisters::t8;
static const FPRegisterID fpTempRegister = MIPSRegisters::f16;
static const int MaximumCompactPtrAlignedAddressOffset = 0x7FFFFFFF;
enum RelationalCondition {
Equal,
NotEqual,
Above,
AboveOrEqual,
Below,
BelowOrEqual,
GreaterThan,
GreaterThanOrEqual,
LessThan,
LessThanOrEqual
};
enum ResultCondition {
Overflow,
Signed,
PositiveOrZero,
Zero,
NonZero
};
enum DoubleCondition {
DoubleEqual,
DoubleNotEqual,
DoubleGreaterThan,
DoubleGreaterThanOrEqual,
DoubleLessThan,
DoubleLessThanOrEqual,
DoubleEqualOrUnordered,
DoubleNotEqualOrUnordered,
DoubleGreaterThanOrUnordered,
DoubleGreaterThanOrEqualOrUnordered,
DoubleLessThanOrUnordered,
DoubleLessThanOrEqualOrUnordered
};
static const RegisterID stackPointerRegister = MIPSRegisters::sp;
static const RegisterID framePointerRegister = MIPSRegisters::fp;
static const RegisterID returnAddressRegister = MIPSRegisters::ra;
void add32(RegisterID src, RegisterID dest)
{
m_assembler.addu(dest, dest, src);
}
void add32(RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.addu(dest, op1, op2);
}
void add32(TrustedImm32 imm, RegisterID dest)
{
add32(imm, dest, dest);
}
void add32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
if (imm.m_value >= -32768 && imm.m_value <= 32767
&& !m_fixedWidth) {
m_assembler.addiu(dest, src, imm.m_value);
} else {
move(imm, immTempRegister);
m_assembler.addu(dest, src, immTempRegister);
}
}
void add32(RegisterID src, TrustedImm32 imm, RegisterID dest)
{
add32(imm, src, dest);
}
void add32(TrustedImm32 imm, Address address)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.lw(dataTempRegister, address.base, address.offset);
if (imm.m_value >= -32768 && imm.m_value <= 32767
&& !m_fixedWidth)
m_assembler.addiu(dataTempRegister, dataTempRegister, imm.m_value);
else {
move(imm, immTempRegister);
m_assembler.addu(dataTempRegister, dataTempRegister, immTempRegister);
}
m_assembler.sw(dataTempRegister, address.base, address.offset);
} else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lw(dataTempRegister, addrTempRegister, address.offset);
if (imm.m_value >= -32768 && imm.m_value <= 32767 && !m_fixedWidth)
m_assembler.addiu(dataTempRegister, dataTempRegister, imm.m_value);
else {
move(imm, immTempRegister);
m_assembler.addu(dataTempRegister, dataTempRegister, immTempRegister);
}
m_assembler.sw(dataTempRegister, addrTempRegister, address.offset);
}
}
void add32(Address src, RegisterID dest)
{
load32(src, dataTempRegister);
add32(dataTempRegister, dest);
}
void add32(AbsoluteAddress src, RegisterID dest)
{
load32(src.m_ptr, dataTempRegister);
add32(dataTempRegister, dest);
}
void add32(RegisterID src, Address dest)
{
if (dest.offset >= -32768 && dest.offset <= 32767 && !m_fixedWidth) {
m_assembler.lw(dataTempRegister, dest.base, dest.offset);
m_assembler.addu(dataTempRegister, dataTempRegister, src);
m_assembler.sw(dataTempRegister, dest.base, dest.offset);
} else {
m_assembler.lui(addrTempRegister, (dest.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, dest.base);
m_assembler.lw(dataTempRegister, addrTempRegister, dest.offset);
m_assembler.addu(dataTempRegister, dataTempRegister, src);
m_assembler.sw(dataTempRegister, addrTempRegister, dest.offset);
}
}
void add32(TrustedImm32 imm, AbsoluteAddress address)
{
move(TrustedImmPtr(address.m_ptr), addrTempRegister);
m_assembler.lw(cmpTempRegister, addrTempRegister, 0);
if (imm.m_value >= -32768 && imm.m_value <= 32767 && !m_fixedWidth)
m_assembler.addiu(dataTempRegister, cmpTempRegister, imm.m_value);
else {
move(imm, immTempRegister);
m_assembler.addu(dataTempRegister, cmpTempRegister, immTempRegister);
}
m_assembler.sw(dataTempRegister, addrTempRegister, 0);
}
void add64(TrustedImm32 imm, AbsoluteAddress address)
{
add32(imm, address);
m_assembler.sltu(immTempRegister, dataTempRegister, cmpTempRegister);
m_assembler.lw(dataTempRegister, addrTempRegister, 4);
if (imm.m_value >> 31)
m_assembler.addiu(dataTempRegister, dataTempRegister, -1);
m_assembler.addu(dataTempRegister, dataTempRegister, immTempRegister);
m_assembler.sw(dataTempRegister, addrTempRegister, 4);
}
void and32(Address src, RegisterID dest)
{
load32(src, dataTempRegister);
and32(dataTempRegister, dest);
}
void and32(RegisterID src, RegisterID dest)
{
m_assembler.andInsn(dest, dest, src);
}
void and32(RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.andInsn(dest, op1, op2);
}
void and32(TrustedImm32 imm, RegisterID dest)
{
if (!imm.m_value && !m_fixedWidth)
move(MIPSRegisters::zero, dest);
else if (imm.m_value > 0 && imm.m_value <= 65535 && !m_fixedWidth)
m_assembler.andi(dest, dest, imm.m_value);
else {
move(imm, immTempRegister);
m_assembler.andInsn(dest, dest, immTempRegister);
}
}
void and32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
if (!imm.m_value && !m_fixedWidth)
move(MIPSRegisters::zero, dest);
else if (imm.m_value > 0 && imm.m_value <= 65535 && !m_fixedWidth)
m_assembler.andi(dest, src, imm.m_value);
else {
move(imm, immTempRegister);
m_assembler.andInsn(dest, src, immTempRegister);
}
}
void countLeadingZeros32(RegisterID src, RegisterID dest)
{
#if WTF_MIPS_ISA_AT_LEAST(32)
m_assembler.clz(dest, src);
#else
static_assert(false, "CLZ opcode is not available for this ISA");
#endif
}
void lshift32(RegisterID shiftAmount, RegisterID dest)
{
m_assembler.sllv(dest, dest, shiftAmount);
}
void lshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
{
m_assembler.sllv(dest, src, shiftAmount);
}
void lshift32(TrustedImm32 imm, RegisterID dest)
{
move(imm, immTempRegister);
m_assembler.sllv(dest, dest, immTempRegister);
}
void lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
{
move(imm, immTempRegister);
m_assembler.sllv(dest, src, immTempRegister);
}
void mul32(RegisterID src, RegisterID dest)
{
m_assembler.mul(dest, dest, src);
}
void mul32(RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.mul(dest, op1, op2);
}
void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
if (!imm.m_value && !m_fixedWidth)
move(MIPSRegisters::zero, dest);
else if (imm.m_value == 1 && !m_fixedWidth)
move(src, dest);
else {
move(imm, dataTempRegister);
m_assembler.mul(dest, src, dataTempRegister);
}
}
void neg32(RegisterID srcDest)
{
m_assembler.subu(srcDest, MIPSRegisters::zero, srcDest);
}
void or32(RegisterID src, RegisterID dest)
{
m_assembler.orInsn(dest, dest, src);
}
void or32(RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.orInsn(dest, op1, op2);
}
void or32(TrustedImm32 imm, AbsoluteAddress dest)
{
if (!imm.m_value && !m_fixedWidth)
return;
load32(dest.m_ptr, immTempRegister);
or32(imm, immTempRegister);
store32(immTempRegister, dest.m_ptr);
}
void or32(TrustedImm32 imm, RegisterID dest)
{
if (!imm.m_value && !m_fixedWidth)
return;
if (imm.m_value > 0 && imm.m_value <= 65535
&& !m_fixedWidth) {
m_assembler.ori(dest, dest, imm.m_value);
return;
}
move(imm, dataTempRegister);
m_assembler.orInsn(dest, dest, dataTempRegister);
}
void or32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
if (!imm.m_value && !m_fixedWidth) {
move(src, dest);
return;
}
if (imm.m_value > 0 && imm.m_value <= 65535 && !m_fixedWidth) {
m_assembler.ori(dest, src, imm.m_value);
return;
}
move(imm, dataTempRegister);
m_assembler.orInsn(dest, src, dataTempRegister);
}
void or32(RegisterID src, AbsoluteAddress dest)
{
load32(dest.m_ptr, dataTempRegister);
m_assembler.orInsn(dataTempRegister, dataTempRegister, src);
store32(dataTempRegister, dest.m_ptr);
}
void rshift32(RegisterID shiftAmount, RegisterID dest)
{
m_assembler.srav(dest, dest, shiftAmount);
}
void rshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
{
m_assembler.srav(dest, src, shiftAmount);
}
void rshift32(TrustedImm32 imm, RegisterID dest)
{
m_assembler.sra(dest, dest, imm.m_value);
}
void rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
{
m_assembler.sra(dest, src, imm.m_value);
}
void urshift32(RegisterID shiftAmount, RegisterID dest)
{
m_assembler.srlv(dest, dest, shiftAmount);
}
void urshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
{
m_assembler.srlv(dest, src, shiftAmount);
}
void urshift32(TrustedImm32 imm, RegisterID dest)
{
m_assembler.srl(dest, dest, imm.m_value);
}
void urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
{
m_assembler.srl(dest, src, imm.m_value);
}
void sub32(RegisterID src, RegisterID dest)
{
m_assembler.subu(dest, dest, src);
}
void sub32(RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.subu(dest, op1, op2);
}
void sub32(TrustedImm32 imm, RegisterID dest)
{
if (imm.m_value >= -32767 && imm.m_value <= 32768
&& !m_fixedWidth) {
m_assembler.addiu(dest, dest, -imm.m_value);
} else {
move(imm, immTempRegister);
m_assembler.subu(dest, dest, immTempRegister);
}
}
void sub32(RegisterID src, TrustedImm32 imm, RegisterID dest)
{
if (imm.m_value >= -32767 && imm.m_value <= 32768
&& !m_fixedWidth) {
m_assembler.addiu(dest, src, -imm.m_value);
} else {
move(imm, immTempRegister);
m_assembler.subu(dest, src, immTempRegister);
}
}
void sub32(TrustedImm32 imm, Address address)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.lw(dataTempRegister, address.base, address.offset);
if (imm.m_value >= -32767 && imm.m_value <= 32768 && !m_fixedWidth)
m_assembler.addiu(dataTempRegister, dataTempRegister, -imm.m_value);
else {
move(imm, immTempRegister);
m_assembler.subu(dataTempRegister, dataTempRegister, immTempRegister);
}
m_assembler.sw(dataTempRegister, address.base, address.offset);
} else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lw(dataTempRegister, addrTempRegister, address.offset);
if (imm.m_value >= -32767 && imm.m_value <= 32768
&& !m_fixedWidth)
m_assembler.addiu(dataTempRegister, dataTempRegister, -imm.m_value);
else {
move(imm, immTempRegister);
m_assembler.subu(dataTempRegister, dataTempRegister, immTempRegister);
}
m_assembler.sw(dataTempRegister, addrTempRegister, address.offset);
}
}
void sub32(Address src, RegisterID dest)
{
load32(src, dataTempRegister);
sub32(dataTempRegister, dest);
}
void sub32(TrustedImm32 imm, AbsoluteAddress address)
{
move(TrustedImmPtr(address.m_ptr), addrTempRegister);
m_assembler.lw(dataTempRegister, addrTempRegister, 0);
if (imm.m_value >= -32767 && imm.m_value <= 32768 && !m_fixedWidth)
m_assembler.addiu(dataTempRegister, dataTempRegister, -imm.m_value);
else {
move(imm, immTempRegister);
m_assembler.subu(dataTempRegister, dataTempRegister, immTempRegister);
}
m_assembler.sw(dataTempRegister, addrTempRegister, 0);
}
void xor32(RegisterID src, RegisterID dest)
{
m_assembler.xorInsn(dest, dest, src);
}
void xor32(RegisterID op1, RegisterID op2, RegisterID dest)
{
m_assembler.xorInsn(dest, op1, op2);
}
void xor32(TrustedImm32 imm, RegisterID dest)
{
if (imm.m_value == -1) {
m_assembler.nor(dest, dest, MIPSRegisters::zero);
return;
}
move(imm, immTempRegister);
m_assembler.xorInsn(dest, dest, immTempRegister);
}
void xor32(TrustedImm32 imm, RegisterID src, RegisterID dest)
{
if (imm.m_value == -1) {
m_assembler.nor(dest, src, MIPSRegisters::zero);
return;
}
move(imm, immTempRegister);
m_assembler.xorInsn(dest, src, immTempRegister);
}
void sqrtDouble(FPRegisterID src, FPRegisterID dst)
{
m_assembler.sqrtd(dst, src);
}
void absDouble(FPRegisterID src, FPRegisterID dst)
{
m_assembler.absd(dst, src);
}
NO_RETURN_DUE_TO_CRASH void ceilDouble(FPRegisterID, FPRegisterID)
{
ASSERT(!supportsFloatingPointRounding());
CRASH();
}
NO_RETURN_DUE_TO_CRASH void floorDouble(FPRegisterID, FPRegisterID)
{
ASSERT(!supportsFloatingPointRounding());
CRASH();
}
NO_RETURN_DUE_TO_CRASH void roundTowardZeroDouble(FPRegisterID, FPRegisterID)
{
ASSERT(!supportsFloatingPointRounding());
CRASH();
}
ConvertibleLoadLabel convertibleLoadPtr(Address address, RegisterID dest)
{
ConvertibleLoadLabel result(this);
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lw(dest, addrTempRegister, address.offset);
return result;
}
void load8(ImplicitAddress address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth)
m_assembler.lbu(dest, address.base, address.offset);
else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lbu(dest, addrTempRegister, address.offset);
}
}
void load8(BaseIndex address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lbu(dest, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.lbu(dest, addrTempRegister, address.offset);
}
}
ALWAYS_INLINE void load8(AbsoluteAddress address, RegisterID dest)
{
load8(address.m_ptr, dest);
}
void load8(const void* address, RegisterID dest)
{
move(TrustedImmPtr(address), addrTempRegister);
m_assembler.lbu(dest, addrTempRegister, 0);
}
void load8SignedExtendTo32(BaseIndex address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lb(dest, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.lb(dest, addrTempRegister, address.offset);
}
}
void load32(ImplicitAddress address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth)
m_assembler.lw(dest, address.base, address.offset);
else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lw(dest, addrTempRegister, address.offset);
}
}
void load32(BaseIndex address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lw(dest, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.lw(dest, addrTempRegister, address.offset);
}
}
void load16Unaligned(BaseIndex address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767 && !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
#if CPU(BIG_ENDIAN)
m_assembler.lbu(immTempRegister, addrTempRegister, address.offset + 1);
m_assembler.lbu(dest, addrTempRegister, address.offset);
#else
m_assembler.lbu(immTempRegister, addrTempRegister, address.offset);
m_assembler.lbu(dest, addrTempRegister, address.offset + 1);
#endif
m_assembler.sll(dest, dest, 8);
m_assembler.orInsn(dest, dest, immTempRegister);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, address.offset >> 16);
m_assembler.ori(immTempRegister, immTempRegister, address.offset);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
#if CPU(BIG_ENDIAN)
m_assembler.lbu(immTempRegister, addrTempRegister, 1);
m_assembler.lbu(dest, addrTempRegister, 0);
#else
m_assembler.lbu(immTempRegister, addrTempRegister, 0);
m_assembler.lbu(dest, addrTempRegister, 1);
#endif
m_assembler.sll(dest, dest, 8);
m_assembler.orInsn(dest, dest, immTempRegister);
}
}
void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32764
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
#if CPU(BIG_ENDIAN)
m_assembler.lwl(dest, addrTempRegister, address.offset);
m_assembler.lwr(dest, addrTempRegister, address.offset + 3);
#else
m_assembler.lwl(dest, addrTempRegister, address.offset + 3);
m_assembler.lwr(dest, addrTempRegister, address.offset);
#endif
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, address.offset >> 16);
m_assembler.ori(immTempRegister, immTempRegister, address.offset);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
#if CPU(BIG_ENDIAN)
m_assembler.lwl(dest, addrTempRegister, 0);
m_assembler.lwr(dest, addrTempRegister, 3);
#else
m_assembler.lwl(dest, addrTempRegister, 3);
m_assembler.lwr(dest, addrTempRegister, 0);
#endif
}
}
void load32(const void* address, RegisterID dest)
{
move(TrustedImmPtr(address), addrTempRegister);
m_assembler.lw(dest, addrTempRegister, 0);
}
DataLabel32 load32WithAddressOffsetPatch(Address address, RegisterID dest)
{
m_fixedWidth = true;
DataLabel32 dataLabel(this);
move(TrustedImm32(address.offset), addrTempRegister);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lw(dest, addrTempRegister, 0);
m_fixedWidth = false;
return dataLabel;
}
DataLabelCompact load32WithCompactAddressOffsetPatch(Address address, RegisterID dest)
{
DataLabelCompact dataLabel(this);
load32WithAddressOffsetPatch(address, dest);
return dataLabel;
}
void load16(ImplicitAddress address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth)
m_assembler.lhu(dest, address.base, address.offset);
else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lhu(dest, addrTempRegister, address.offset);
}
}
void load16(BaseIndex address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lhu(dest, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.lhu(dest, addrTempRegister, address.offset);
}
}
void load16SignedExtendTo32(BaseIndex address, RegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lh(dest, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.lh(dest, addrTempRegister, address.offset);
}
}
DataLabel32 store32WithAddressOffsetPatch(RegisterID src, Address address)
{
m_fixedWidth = true;
DataLabel32 dataLabel(this);
move(TrustedImm32(address.offset), addrTempRegister);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.sw(src, addrTempRegister, 0);
m_fixedWidth = false;
return dataLabel;
}
void store8(RegisterID src, BaseIndex address)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.sb(src, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.sb(src, addrTempRegister, address.offset);
}
}
void store8(RegisterID src, void* address)
{
move(TrustedImmPtr(address), addrTempRegister);
m_assembler.sb(src, addrTempRegister, 0);
}
void store8(TrustedImm32 imm, void* address)
{
TrustedImm32 imm8(static_cast<int8_t>(imm.m_value));
if (!imm8.m_value && !m_fixedWidth) {
move(TrustedImmPtr(address), addrTempRegister);
m_assembler.sb(MIPSRegisters::zero, addrTempRegister, 0);
} else {
move(imm8, immTempRegister);
move(TrustedImmPtr(address), addrTempRegister);
m_assembler.sb(immTempRegister, addrTempRegister, 0);
}
}
void store8(TrustedImm32 imm, ImplicitAddress address)
{
TrustedImm32 imm8(static_cast<int8_t>(imm.m_value));
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
if (!imm8.m_value)
m_assembler.sb(MIPSRegisters::zero, address.base, address.offset);
else {
move(imm8, immTempRegister);
m_assembler.sb(immTempRegister, address.base, address.offset);
}
} else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
if (!imm8.m_value && !m_fixedWidth)
m_assembler.sb(MIPSRegisters::zero, addrTempRegister, address.offset);
else {
move(imm8, immTempRegister);
m_assembler.sb(immTempRegister, addrTempRegister, address.offset);
}
}
}
void store16(RegisterID src, BaseIndex address)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.sh(src, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.sh(src, addrTempRegister, address.offset);
}
}
void store32(RegisterID src, ImplicitAddress address)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth)
m_assembler.sw(src, address.base, address.offset);
else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.sw(src, addrTempRegister, address.offset);
}
}
void store32(RegisterID src, BaseIndex address)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.sw(src, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.sw(src, addrTempRegister, address.offset);
}
}
void store32(TrustedImm32 imm, ImplicitAddress address)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
if (!imm.m_value)
m_assembler.sw(MIPSRegisters::zero, address.base, address.offset);
else {
move(imm, immTempRegister);
m_assembler.sw(immTempRegister, address.base, address.offset);
}
} else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
if (!imm.m_value && !m_fixedWidth)
m_assembler.sw(MIPSRegisters::zero, addrTempRegister, address.offset);
else {
move(imm, immTempRegister);
m_assembler.sw(immTempRegister, addrTempRegister, address.offset);
}
}
}
void store32(TrustedImm32 imm, BaseIndex address)
{
if (address.offset >= -32768 && address.offset <= 32767 && !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
if (!imm.m_value)
m_assembler.sw(MIPSRegisters::zero, addrTempRegister, address.offset);
else {
move(imm, immTempRegister);
m_assembler.sw(immTempRegister, addrTempRegister, address.offset);
}
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
if (!imm.m_value && !m_fixedWidth)
m_assembler.sw(MIPSRegisters::zero, addrTempRegister, address.offset);
else {
move(imm, immTempRegister);
m_assembler.sw(immTempRegister, addrTempRegister, address.offset);
}
}
}
void store32(RegisterID src, const void* address)
{
move(TrustedImmPtr(address), addrTempRegister);
m_assembler.sw(src, addrTempRegister, 0);
}
void store32(TrustedImm32 imm, const void* address)
{
if (!imm.m_value && !m_fixedWidth) {
move(TrustedImmPtr(address), addrTempRegister);
m_assembler.sw(MIPSRegisters::zero, addrTempRegister, 0);
} else {
move(imm, immTempRegister);
move(TrustedImmPtr(address), addrTempRegister);
m_assembler.sw(immTempRegister, addrTempRegister, 0);
}
}
static bool supportsFloatingPoint()
{
#if WTF_MIPS_DOUBLE_FLOAT
return true;
#else
return false;
#endif
}
static bool supportsFloatingPointTruncate()
{
#if WTF_MIPS_DOUBLE_FLOAT && WTF_MIPS_ISA_AT_LEAST(2)
return true;
#else
return false;
#endif
}
static bool supportsFloatingPointSqrt()
{
#if WTF_MIPS_DOUBLE_FLOAT && WTF_MIPS_ISA_AT_LEAST(2)
return true;
#else
return false;
#endif
}
static bool supportsFloatingPointAbs()
{
#if WTF_MIPS_DOUBLE_FLOAT && WTF_MIPS_ISA_AT_LEAST(2)
return true;
#else
return false;
#endif
}
static bool supportsFloatingPointRounding() { return false; }
void pop(RegisterID dest)
{
m_assembler.lw(dest, MIPSRegisters::sp, 0);
m_assembler.addiu(MIPSRegisters::sp, MIPSRegisters::sp, 4);
}
void popPair(RegisterID dest1, RegisterID dest2)
{
m_assembler.lw(dest1, MIPSRegisters::sp, 0);
m_assembler.lw(dest2, MIPSRegisters::sp, 4);
m_assembler.addiu(MIPSRegisters::sp, MIPSRegisters::sp, 8);
}
void push(RegisterID src)
{
m_assembler.addiu(MIPSRegisters::sp, MIPSRegisters::sp, -4);
m_assembler.sw(src, MIPSRegisters::sp, 0);
}
void push(Address address)
{
load32(address, dataTempRegister);
push(dataTempRegister);
}
void push(TrustedImm32 imm)
{
move(imm, immTempRegister);
push(immTempRegister);
}
void pushPair(RegisterID src1, RegisterID src2)
{
m_assembler.addiu(MIPSRegisters::sp, MIPSRegisters::sp, -8);
m_assembler.sw(src2, MIPSRegisters::sp, 4);
m_assembler.sw(src1, MIPSRegisters::sp, 0);
}
void move(TrustedImm32 imm, RegisterID dest)
{
if (!imm.m_value && !m_fixedWidth)
move(MIPSRegisters::zero, dest);
else if (m_fixedWidth) {
m_assembler.lui(dest, imm.m_value >> 16);
m_assembler.ori(dest, dest, imm.m_value);
} else
m_assembler.li(dest, imm.m_value);
}
void move(RegisterID src, RegisterID dest)
{
if (src != dest || m_fixedWidth)
m_assembler.move(dest, src);
}
void move(TrustedImmPtr imm, RegisterID dest)
{
move(TrustedImm32(imm), dest);
}
void swap(RegisterID reg1, RegisterID reg2)
{
move(reg1, immTempRegister);
move(reg2, reg1);
move(immTempRegister, reg2);
}
void signExtend32ToPtr(RegisterID src, RegisterID dest)
{
if (src != dest || m_fixedWidth)
move(src, dest);
}
void zeroExtend32ToPtr(RegisterID src, RegisterID dest)
{
if (src != dest || m_fixedWidth)
move(src, dest);
}
Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
{
TrustedImm32 right8(static_cast<int8_t>(right.m_value));
load8(left, dataTempRegister);
move(right8, immTempRegister);
return branch32(cond, dataTempRegister, immTempRegister);
}
Jump branch8(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
{
TrustedImm32 right8(static_cast<int8_t>(right.m_value));
load8(left, dataTempRegister);
move(right8, immTempRegister);
return branch32(cond, dataTempRegister, immTempRegister);
}
void compare8(RelationalCondition cond, Address left, TrustedImm32 right, RegisterID dest)
{
TrustedImm32 right8(static_cast<int8_t>(right.m_value));
load8(left, dataTempRegister);
move(right8, immTempRegister);
compare32(cond, dataTempRegister, immTempRegister, dest);
}
Jump branch8(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
TrustedImm32 right8(static_cast<int8_t>(right.m_value));
load8(left, dataTempRegister);
move(right8, immTempRegister);
return branch32(cond, dataTempRegister, immTempRegister);
}
Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
{
if (cond == Equal)
return branchEqual(left, right);
if (cond == NotEqual)
return branchNotEqual(left, right);
if (cond == Above) {
m_assembler.sltu(cmpTempRegister, right, left);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == AboveOrEqual) {
m_assembler.sltu(cmpTempRegister, left, right);
return branchEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == Below) {
m_assembler.sltu(cmpTempRegister, left, right);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == BelowOrEqual) {
m_assembler.sltu(cmpTempRegister, right, left);
return branchEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == GreaterThan) {
m_assembler.slt(cmpTempRegister, right, left);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == GreaterThanOrEqual) {
m_assembler.slt(cmpTempRegister, left, right);
return branchEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == LessThan) {
m_assembler.slt(cmpTempRegister, left, right);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == LessThanOrEqual) {
m_assembler.slt(cmpTempRegister, right, left);
return branchEqual(cmpTempRegister, MIPSRegisters::zero);
}
ASSERT(0);
return Jump();
}
Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right)
{
move(right, immTempRegister);
return branch32(cond, left, immTempRegister);
}
Jump branch32(RelationalCondition cond, RegisterID left, Address right)
{
load32(right, dataTempRegister);
return branch32(cond, left, dataTempRegister);
}
Jump branch32(RelationalCondition cond, Address left, RegisterID right)
{
load32(left, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
{
load32(left, dataTempRegister);
move(right, immTempRegister);
return branch32(cond, dataTempRegister, immTempRegister);
}
Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
load32(left, dataTempRegister);
move(right, immTempRegister);
return branch32(cond, dataTempRegister, immTempRegister);
}
Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
load32WithUnalignedHalfWords(left, dataTempRegister);
move(right, immTempRegister);
return branch32(cond, dataTempRegister, immTempRegister);
}
Jump branch32(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
{
load32(left.m_ptr, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
Jump branch32(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
{
load32(left.m_ptr, dataTempRegister);
move(right, immTempRegister);
return branch32(cond, dataTempRegister, immTempRegister);
}
Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
{
ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
m_assembler.andInsn(cmpTempRegister, reg, mask);
switch (cond) {
case Zero:
return branchEqual(cmpTempRegister, MIPSRegisters::zero);
case NonZero:
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
case Signed:
m_assembler.slt(cmpTempRegister, cmpTempRegister, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
default:
RELEASE_ASSERT_NOT_REACHED();
}
}
Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
if (mask.m_value == -1 && !m_fixedWidth) {
switch (cond) {
case Zero:
return branchEqual(reg, MIPSRegisters::zero);
case NonZero:
return branchNotEqual(reg, MIPSRegisters::zero);
case Signed:
m_assembler.slt(cmpTempRegister, reg, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
default:
RELEASE_ASSERT_NOT_REACHED();
}
}
move(mask, immTempRegister);
return branchTest32(cond, reg, immTempRegister);
}
Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
load32(address, dataTempRegister);
return branchTest32(cond, dataTempRegister, mask);
}
Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
load32(address, dataTempRegister);
return branchTest32(cond, dataTempRegister, mask);
}
Jump branchTest8(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
TrustedImm32 mask8(static_cast<int8_t>(mask.m_value));
load8(address, dataTempRegister);
return branchTest32(cond, dataTempRegister, mask8);
}
Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
TrustedImm32 mask8(static_cast<int8_t>(mask.m_value));
load8(address, dataTempRegister);
return branchTest32(cond, dataTempRegister, mask8);
}
Jump branchTest8(ResultCondition cond, AbsoluteAddress address, TrustedImm32 mask = TrustedImm32(-1))
{
TrustedImm32 mask8(static_cast<int8_t>(mask.m_value));
move(TrustedImmPtr(address.m_ptr), dataTempRegister);
load8(Address(dataTempRegister), dataTempRegister);
return branchTest32(cond, dataTempRegister, mask8);
}
Jump jump()
{
return branchEqual(MIPSRegisters::zero, MIPSRegisters::zero);
}
void jump(RegisterID target)
{
move(target, MIPSRegisters::t9);
m_assembler.jr(MIPSRegisters::t9);
m_assembler.nop();
}
void jump(Address address)
{
m_fixedWidth = true;
load32(address, MIPSRegisters::t9);
m_assembler.jr(MIPSRegisters::t9);
m_assembler.nop();
m_fixedWidth = false;
}
void jump(AbsoluteAddress address)
{
m_fixedWidth = true;
load32(address.m_ptr, MIPSRegisters::t9);
m_assembler.jr(MIPSRegisters::t9);
m_assembler.nop();
m_fixedWidth = false;
}
void moveDoubleToInts(FPRegisterID src, RegisterID dest1, RegisterID dest2)
{
m_assembler.vmov(dest1, dest2, src);
}
void moveIntsToDouble(RegisterID src1, RegisterID src2, FPRegisterID dest, FPRegisterID scratch)
{
UNUSED_PARAM(scratch);
m_assembler.vmov(dest, src1, src2);
}
Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == PositiveOrZero) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
move(dest, dataTempRegister);
m_assembler.xorInsn(cmpTempRegister, dataTempRegister, src);
m_assembler.bltz(cmpTempRegister, 10);
m_assembler.addu(dest, dataTempRegister, src);
m_assembler.xorInsn(cmpTempRegister, dest, dataTempRegister);
m_assembler.bgez(cmpTempRegister, 7);
m_assembler.nop();
return jump();
}
if (cond == Signed) {
add32(src, dest);
m_assembler.slt(cmpTempRegister, dest, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == PositiveOrZero) {
add32(src, dest);
m_assembler.slt(cmpTempRegister, dest, MIPSRegisters::zero);
return branchEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == Zero) {
add32(src, dest);
return branchEqual(dest, MIPSRegisters::zero);
}
if (cond == NonZero) {
add32(src, dest);
return branchNotEqual(dest, MIPSRegisters::zero);
}
ASSERT(0);
return Jump();
}
Jump branchAdd32(ResultCondition cond, RegisterID op1, RegisterID op2, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == PositiveOrZero) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
move(op1, dataTempRegister);
m_assembler.xorInsn(cmpTempRegister, dataTempRegister, op2);
m_assembler.bltz(cmpTempRegister, 10);
m_assembler.addu(dest, dataTempRegister, op2);
m_assembler.xorInsn(cmpTempRegister, dest, dataTempRegister);
m_assembler.bgez(cmpTempRegister, 7);
m_assembler.nop();
return jump();
}
if (cond == Signed) {
add32(op1, op2, dest);
m_assembler.slt(cmpTempRegister, dest, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == PositiveOrZero) {
add32(op1, op2, dest);
m_assembler.slt(cmpTempRegister, dest, MIPSRegisters::zero);
return branchEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == Zero) {
add32(op1, op2, dest);
return branchEqual(dest, MIPSRegisters::zero);
}
if (cond == NonZero) {
add32(op1, op2, dest);
return branchNotEqual(dest, MIPSRegisters::zero);
}
ASSERT(0);
return Jump();
}
Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
move(imm, immTempRegister);
return branchAdd32(cond, immTempRegister, dest);
}
Jump branchAdd32(ResultCondition cond, Address address, RegisterID dest)
{
load32(address, immTempRegister);
return branchAdd32(cond, immTempRegister, dest);
}
Jump branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
{
move(imm, immTempRegister);
move(src, dest);
return branchAdd32(cond, immTempRegister, dest);
}
Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == PositiveOrZero) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
if (imm.m_value >= -32768 && imm.m_value <= 32767 && !m_fixedWidth) {
load32(dest.m_ptr, dataTempRegister);
m_assembler.xori(cmpTempRegister, dataTempRegister, imm.m_value);
m_assembler.bltz(cmpTempRegister, 10);
m_assembler.addiu(dataTempRegister, dataTempRegister, imm.m_value);
store32(dataTempRegister, dest.m_ptr);
m_assembler.xori(cmpTempRegister, dataTempRegister, imm.m_value);
m_assembler.bgez(cmpTempRegister, 7);
m_assembler.nop();
} else {
load32(dest.m_ptr, dataTempRegister);
move(imm, immTempRegister);
m_assembler.xorInsn(cmpTempRegister, dataTempRegister, immTempRegister);
m_assembler.bltz(cmpTempRegister, 10);
m_assembler.addiu(dataTempRegister, dataTempRegister, immTempRegister);
store32(dataTempRegister, dest.m_ptr);
m_assembler.xori(cmpTempRegister, dataTempRegister, immTempRegister);
m_assembler.bgez(cmpTempRegister, 7);
m_assembler.nop();
}
return jump();
}
move(imm, immTempRegister);
load32(dest.m_ptr, dataTempRegister);
add32(immTempRegister, dataTempRegister);
store32(dataTempRegister, dest.m_ptr);
if (cond == Signed) {
m_assembler.slt(cmpTempRegister, dataTempRegister, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == PositiveOrZero) {
m_assembler.slt(cmpTempRegister, dataTempRegister, MIPSRegisters::zero);
return branchEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == Zero)
return branchEqual(dataTempRegister, MIPSRegisters::zero);
if (cond == NonZero)
return branchNotEqual(dataTempRegister, MIPSRegisters::zero);
ASSERT(0);
return Jump();
}
Jump branchMul32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
m_assembler.mult(src1, src2);
m_assembler.mfhi(dataTempRegister);
m_assembler.mflo(dest);
m_assembler.sra(addrTempRegister, dest, 31);
m_assembler.beq(dataTempRegister, addrTempRegister, 7);
m_assembler.nop();
return jump();
}
if (cond == Signed) {
mul32(src1, src2, dest);
m_assembler.slt(cmpTempRegister, dest, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == Zero) {
mul32(src1, src2, dest);
return branchEqual(dest, MIPSRegisters::zero);
}
if (cond == NonZero) {
mul32(src1, src2, dest);
return branchNotEqual(dest, MIPSRegisters::zero);
}
ASSERT(0);
return Jump();
}
Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
m_assembler.mult(src, dest);
m_assembler.mfhi(dataTempRegister);
m_assembler.mflo(dest);
m_assembler.sra(addrTempRegister, dest, 31);
m_assembler.beq(dataTempRegister, addrTempRegister, 7);
m_assembler.nop();
return jump();
}
if (cond == Signed) {
mul32(src, dest);
m_assembler.slt(cmpTempRegister, dest, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == Zero) {
mul32(src, dest);
return branchEqual(dest, MIPSRegisters::zero);
}
if (cond == NonZero) {
mul32(src, dest);
return branchNotEqual(dest, MIPSRegisters::zero);
}
ASSERT(0);
return Jump();
}
Jump branchMul32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
{
move(imm, immTempRegister);
return branchMul32(cond, immTempRegister, src, dest);
}
Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
move(dest, dataTempRegister);
m_assembler.xorInsn(cmpTempRegister, dataTempRegister, src);
m_assembler.bgez(cmpTempRegister, 10);
m_assembler.subu(dest, dataTempRegister, src);
m_assembler.xorInsn(cmpTempRegister, dest, dataTempRegister);
m_assembler.bgez(cmpTempRegister, 7);
m_assembler.nop();
return jump();
}
if (cond == Signed) {
sub32(src, dest);
m_assembler.slt(cmpTempRegister, dest, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == Zero) {
sub32(src, dest);
return branchEqual(dest, MIPSRegisters::zero);
}
if (cond == NonZero) {
sub32(src, dest);
return branchNotEqual(dest, MIPSRegisters::zero);
}
ASSERT(0);
return Jump();
}
Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
move(imm, immTempRegister);
return branchSub32(cond, immTempRegister, dest);
}
Jump branchSub32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
{
move(imm, immTempRegister);
return branchSub32(cond, src, immTempRegister, dest);
}
Jump branchSub32(ResultCondition cond, RegisterID op1, RegisterID op2, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
move(op1, dataTempRegister);
m_assembler.xorInsn(cmpTempRegister, dataTempRegister, op2);
m_assembler.bgez(cmpTempRegister, 10);
m_assembler.subu(dest, dataTempRegister, op2);
m_assembler.xorInsn(cmpTempRegister, dest, dataTempRegister);
m_assembler.bgez(cmpTempRegister, 7);
m_assembler.nop();
return jump();
}
if (cond == Signed) {
sub32(op1, op2, dest);
m_assembler.slt(cmpTempRegister, dest, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == Zero) {
sub32(op1, op2, dest);
return branchEqual(dest, MIPSRegisters::zero);
}
if (cond == NonZero) {
sub32(op1, op2, dest);
return branchNotEqual(dest, MIPSRegisters::zero);
}
ASSERT(0);
return Jump();
}
Jump branchNeg32(ResultCondition cond, RegisterID srcDest)
{
m_assembler.li(dataTempRegister, -1);
return branchMul32(cond, dataTempRegister, srcDest);
}
Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Signed) {
or32(src, dest);
m_assembler.slt(cmpTempRegister, dest, MIPSRegisters::zero);
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
if (cond == Zero) {
or32(src, dest);
return branchEqual(dest, MIPSRegisters::zero);
}
if (cond == NonZero) {
or32(src, dest);
return branchNotEqual(dest, MIPSRegisters::zero);
}
ASSERT(0);
return Jump();
}
void breakpoint()
{
m_assembler.bkpt();
}
Call nearCall()
{
m_assembler.nop();
m_assembler.nop();
m_assembler.jal();
m_assembler.nop();
return Call(m_assembler.label(), Call::LinkableNear);
}
Call nearTailCall()
{
m_assembler.nop();
m_assembler.nop();
m_assembler.beq(MIPSRegisters::zero, MIPSRegisters::zero, 0);
m_assembler.nop();
insertRelaxationWords();
return Call(m_assembler.label(), Call::LinkableNearTail);
}
Call call()
{
m_assembler.lui(MIPSRegisters::t9, 0);
m_assembler.ori(MIPSRegisters::t9, MIPSRegisters::t9, 0);
m_assembler.jalr(MIPSRegisters::t9);
m_assembler.nop();
return Call(m_assembler.label(), Call::Linkable);
}
Call call(RegisterID target)
{
move(target, MIPSRegisters::t9);
m_assembler.jalr(MIPSRegisters::t9);
m_assembler.nop();
return Call(m_assembler.label(), Call::None);
}
Call call(Address address)
{
m_fixedWidth = true;
load32(address, MIPSRegisters::t9);
m_assembler.jalr(MIPSRegisters::t9);
m_assembler.nop();
m_fixedWidth = false;
return Call(m_assembler.label(), Call::None);
}
void ret()
{
m_assembler.jr(MIPSRegisters::ra);
m_assembler.nop();
}
void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
{
if (cond == Equal) {
m_assembler.xorInsn(dest, left, right);
m_assembler.sltiu(dest, dest, 1);
} else if (cond == NotEqual) {
m_assembler.xorInsn(dest, left, right);
m_assembler.sltu(dest, MIPSRegisters::zero, dest);
} else if (cond == Above)
m_assembler.sltu(dest, right, left);
else if (cond == AboveOrEqual) {
m_assembler.sltu(dest, left, right);
m_assembler.xori(dest, dest, 1);
} else if (cond == Below)
m_assembler.sltu(dest, left, right);
else if (cond == BelowOrEqual) {
m_assembler.sltu(dest, right, left);
m_assembler.xori(dest, dest, 1);
} else if (cond == GreaterThan)
m_assembler.slt(dest, right, left);
else if (cond == GreaterThanOrEqual) {
m_assembler.slt(dest, left, right);
m_assembler.xori(dest, dest, 1);
} else if (cond == LessThan)
m_assembler.slt(dest, left, right);
else if (cond == LessThanOrEqual) {
m_assembler.slt(dest, right, left);
m_assembler.xori(dest, dest, 1);
}
}
void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
{
move(right, immTempRegister);
compare32(cond, left, immTempRegister, dest);
}
void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
ASSERT((cond == Zero) || (cond == NonZero));
TrustedImm32 mask8(static_cast<int8_t>(mask.m_value));
load8(address, dataTempRegister);
if (mask8.m_value == -1 && !m_fixedWidth) {
if (cond == Zero)
m_assembler.sltiu(dest, dataTempRegister, 1);
else
m_assembler.sltu(dest, MIPSRegisters::zero, dataTempRegister);
} else {
move(mask8, immTempRegister);
m_assembler.andInsn(cmpTempRegister, dataTempRegister, immTempRegister);
if (cond == Zero)
m_assembler.sltiu(dest, cmpTempRegister, 1);
else
m_assembler.sltu(dest, MIPSRegisters::zero, cmpTempRegister);
}
}
void test32(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
ASSERT((cond == Zero) || (cond == NonZero));
load32(address, dataTempRegister);
if (mask.m_value == -1 && !m_fixedWidth) {
if (cond == Zero)
m_assembler.sltiu(dest, dataTempRegister, 1);
else
m_assembler.sltu(dest, MIPSRegisters::zero, dataTempRegister);
} else {
move(mask, immTempRegister);
m_assembler.andInsn(cmpTempRegister, dataTempRegister, immTempRegister);
if (cond == Zero)
m_assembler.sltiu(dest, cmpTempRegister, 1);
else
m_assembler.sltu(dest, MIPSRegisters::zero, cmpTempRegister);
}
}
DataLabel32 moveWithPatch(TrustedImm32 imm, RegisterID dest)
{
m_fixedWidth = true;
DataLabel32 label(this);
move(imm, dest);
m_fixedWidth = false;
return label;
}
DataLabelPtr moveWithPatch(TrustedImmPtr initialValue, RegisterID dest)
{
m_fixedWidth = true;
DataLabelPtr label(this);
move(initialValue, dest);
m_fixedWidth = false;
return label;
}
Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
m_fixedWidth = true;
dataLabel = moveWithPatch(initialRightValue, immTempRegister);
Jump temp = branch32(cond, left, immTempRegister);
m_fixedWidth = false;
return temp;
}
Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
m_fixedWidth = true;
load32(left, dataTempRegister);
dataLabel = moveWithPatch(initialRightValue, immTempRegister);
Jump temp = branch32(cond, dataTempRegister, immTempRegister);
m_fixedWidth = false;
return temp;
}
Jump branch32WithPatch(RelationalCondition cond, Address left, DataLabel32& dataLabel, TrustedImm32 initialRightValue = TrustedImm32(0))
{
m_fixedWidth = true;
load32(left, dataTempRegister);
dataLabel = moveWithPatch(initialRightValue, immTempRegister);
Jump temp = branch32(cond, dataTempRegister, immTempRegister);
m_fixedWidth = false;
return temp;
}
DataLabelPtr storePtrWithPatch(TrustedImmPtr initialValue, ImplicitAddress address)
{
m_fixedWidth = true;
DataLabelPtr dataLabel = moveWithPatch(initialValue, dataTempRegister);
store32(dataTempRegister, address);
m_fixedWidth = false;
return dataLabel;
}
DataLabelPtr storePtrWithPatch(ImplicitAddress address)
{
return storePtrWithPatch(TrustedImmPtr(0), address);
}
Call tailRecursiveCall()
{
m_fixedWidth = true;
move(TrustedImm32(0), MIPSRegisters::t9);
m_assembler.jr(MIPSRegisters::t9);
m_assembler.nop();
m_fixedWidth = false;
return Call(m_assembler.label(), Call::Linkable);
}
Call makeTailRecursiveCall(Jump oldJump)
{
oldJump.link(this);
return tailRecursiveCall();
}
void loadFloat(BaseIndex address, FPRegisterID dest)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lwc1(dest, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.lwc1(dest, addrTempRegister, address.offset);
}
}
void loadDouble(ImplicitAddress address, FPRegisterID dest)
{
#if WTF_MIPS_ISA(1)
move(TrustedImm32(address.offset), addrTempRegister);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lwc1(dest, addrTempRegister, 0);
m_assembler.lwc1(FPRegisterID(dest + 1), addrTempRegister, 4);
#else
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.ldc1(dest, address.base, address.offset);
} else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.ldc1(dest, addrTempRegister, address.offset);
}
#endif
}
void loadDouble(BaseIndex address, FPRegisterID dest)
{
#if WTF_MIPS_ISA(1)
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lwc1(dest, addrTempRegister, address.offset);
m_assembler.lwc1(FPRegisterID(dest + 1), addrTempRegister, address.offset + 4);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.lwc1(dest, addrTempRegister, address.offset);
m_assembler.lwc1(FPRegisterID(dest + 1), addrTempRegister, address.offset + 4);
}
#else
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.ldc1(dest, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.ldc1(dest, addrTempRegister, address.offset);
}
#endif
}
void loadDouble(TrustedImmPtr address, FPRegisterID dest)
{
#if WTF_MIPS_ISA(1)
move(address, addrTempRegister);
m_assembler.lwc1(dest, addrTempRegister, 0);
m_assembler.lwc1(FPRegisterID(dest + 1), addrTempRegister, 4);
#else
move(address, addrTempRegister);
m_assembler.ldc1(dest, addrTempRegister, 0);
#endif
}
void storeFloat(FPRegisterID src, BaseIndex address)
{
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.swc1(src, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.swc1(src, addrTempRegister, address.offset);
}
}
void storeDouble(FPRegisterID src, ImplicitAddress address)
{
#if WTF_MIPS_ISA(1)
move(TrustedImm32(address.offset), addrTempRegister);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.swc1(src, addrTempRegister, 0);
m_assembler.swc1(FPRegisterID(src + 1), addrTempRegister, 4);
#else
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth)
m_assembler.sdc1(src, address.base, address.offset);
else {
m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.sdc1(src, addrTempRegister, address.offset);
}
#endif
}
void storeDouble(FPRegisterID src, BaseIndex address)
{
#if WTF_MIPS_ISA(1)
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.swc1(src, addrTempRegister, address.offset);
m_assembler.swc1(FPRegisterID(src + 1), addrTempRegister, address.offset + 4);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.swc1(src, addrTempRegister, address.offset);
m_assembler.swc1(FPRegisterID(src + 1), addrTempRegister, address.offset + 4);
}
#else
if (address.offset >= -32768 && address.offset <= 32767
&& !m_fixedWidth) {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.sdc1(src, addrTempRegister, address.offset);
} else {
m_assembler.sll(addrTempRegister, address.index, address.scale);
m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
m_assembler.lui(immTempRegister, (address.offset + 0x8000) >> 16);
m_assembler.addu(addrTempRegister, addrTempRegister, immTempRegister);
m_assembler.sdc1(src, addrTempRegister, address.offset);
}
#endif
}
void storeDouble(FPRegisterID src, TrustedImmPtr address)
{
#if WTF_MIPS_ISA(1)
move(address, addrTempRegister);
m_assembler.swc1(src, addrTempRegister, 0);
m_assembler.swc1(FPRegisterID(src + 1), addrTempRegister, 4);
#else
move(address, addrTempRegister);
m_assembler.sdc1(src, addrTempRegister, 0);
#endif
}
void moveDouble(FPRegisterID src, FPRegisterID dest)
{
if (src != dest || m_fixedWidth)
m_assembler.movd(dest, src);
}
void moveZeroToDouble(FPRegisterID reg)
{
convertInt32ToDouble(MIPSRegisters::zero, reg);
}
void swapDouble(FPRegisterID fr1, FPRegisterID fr2)
{
moveDouble(fr1, fpTempRegister);
moveDouble(fr2, fr1);
moveDouble(fpTempRegister, fr2);
}
void addDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.addd(dest, dest, src);
}
void addDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
{
m_assembler.addd(dest, op1, op2);
}
void addDouble(Address src, FPRegisterID dest)
{
loadDouble(src, fpTempRegister);
m_assembler.addd(dest, dest, fpTempRegister);
}
void addDouble(AbsoluteAddress address, FPRegisterID dest)
{
loadDouble(TrustedImmPtr(address.m_ptr), fpTempRegister);
m_assembler.addd(dest, dest, fpTempRegister);
}
void subDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.subd(dest, dest, src);
}
void subDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
{
m_assembler.subd(dest, op1, op2);
}
void subDouble(Address src, FPRegisterID dest)
{
loadDouble(src, fpTempRegister);
m_assembler.subd(dest, dest, fpTempRegister);
}
void mulDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.muld(dest, dest, src);
}
void mulDouble(Address src, FPRegisterID dest)
{
loadDouble(src, fpTempRegister);
m_assembler.muld(dest, dest, fpTempRegister);
}
void mulDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
{
m_assembler.muld(dest, op1, op2);
}
void divDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.divd(dest, dest, src);
}
void divDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
{
m_assembler.divd(dest, op1, op2);
}
void divDouble(Address src, FPRegisterID dest)
{
loadDouble(src, fpTempRegister);
m_assembler.divd(dest, dest, fpTempRegister);
}
void negateDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.negd(dest, src);
}
void convertInt32ToDouble(RegisterID src, FPRegisterID dest)
{
m_assembler.mtc1(src, fpTempRegister);
m_assembler.cvtdw(dest, fpTempRegister);
}
void convertInt32ToDouble(Address src, FPRegisterID dest)
{
load32(src, dataTempRegister);
m_assembler.mtc1(dataTempRegister, fpTempRegister);
m_assembler.cvtdw(dest, fpTempRegister);
}
void convertInt32ToDouble(AbsoluteAddress src, FPRegisterID dest)
{
load32(src.m_ptr, dataTempRegister);
m_assembler.mtc1(dataTempRegister, fpTempRegister);
m_assembler.cvtdw(dest, fpTempRegister);
}
void convertFloatToDouble(FPRegisterID src, FPRegisterID dst)
{
m_assembler.cvtds(dst, src);
}
void convertDoubleToFloat(FPRegisterID src, FPRegisterID dst)
{
m_assembler.cvtsd(dst, src);
}
void insertRelaxationWords()
{
m_assembler.beq(MIPSRegisters::zero, MIPSRegisters::zero, 3); m_assembler.nop();
m_assembler.nop();
m_assembler.nop();
}
Jump branchTrue()
{
m_assembler.appendJump();
m_assembler.bc1t();
m_assembler.nop();
insertRelaxationWords();
return Jump(m_assembler.label());
}
Jump branchFalse()
{
m_assembler.appendJump();
m_assembler.bc1f();
m_assembler.nop();
insertRelaxationWords();
return Jump(m_assembler.label());
}
Jump branchEqual(RegisterID rs, RegisterID rt)
{
m_assembler.nop();
m_assembler.nop();
m_assembler.appendJump();
m_assembler.beq(rs, rt, 0);
m_assembler.nop();
insertRelaxationWords();
return Jump(m_assembler.label());
}
Jump branchNotEqual(RegisterID rs, RegisterID rt)
{
m_assembler.nop();
m_assembler.nop();
m_assembler.appendJump();
m_assembler.bne(rs, rt, 0);
m_assembler.nop();
insertRelaxationWords();
return Jump(m_assembler.label());
}
Jump branchDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right)
{
if (cond == DoubleEqual) {
m_assembler.ceqd(left, right);
return branchTrue();
}
if (cond == DoubleNotEqual) {
m_assembler.cueqd(left, right);
return branchFalse(); }
if (cond == DoubleGreaterThan) {
m_assembler.cngtd(left, right);
return branchFalse(); }
if (cond == DoubleGreaterThanOrEqual) {
m_assembler.cnged(left, right);
return branchFalse(); }
if (cond == DoubleLessThan) {
m_assembler.cltd(left, right);
return branchTrue();
}
if (cond == DoubleLessThanOrEqual) {
m_assembler.cled(left, right);
return branchTrue();
}
if (cond == DoubleEqualOrUnordered) {
m_assembler.cueqd(left, right);
return branchTrue();
}
if (cond == DoubleNotEqualOrUnordered) {
m_assembler.ceqd(left, right);
return branchFalse(); }
if (cond == DoubleGreaterThanOrUnordered) {
m_assembler.coled(left, right);
return branchFalse(); }
if (cond == DoubleGreaterThanOrEqualOrUnordered) {
m_assembler.coltd(left, right);
return branchFalse(); }
if (cond == DoubleLessThanOrUnordered) {
m_assembler.cultd(left, right);
return branchTrue();
}
if (cond == DoubleLessThanOrEqualOrUnordered) {
m_assembler.culed(left, right);
return branchTrue();
}
ASSERT(0);
return Jump();
}
enum BranchTruncateType { BranchIfTruncateFailed, BranchIfTruncateSuccessful };
Jump branchTruncateDoubleToInt32(FPRegisterID src, RegisterID dest, BranchTruncateType branchType = BranchIfTruncateFailed)
{
m_assembler.truncwd(fpTempRegister, src);
m_assembler.mfc1(dest, fpTempRegister);
return branch32(branchType == BranchIfTruncateFailed ? Equal : NotEqual, dest, TrustedImm32(0x7fffffff));
}
Jump branchTruncateDoubleToUint32(FPRegisterID src, RegisterID dest, BranchTruncateType branchType = BranchIfTruncateFailed)
{
m_assembler.truncwd(fpTempRegister, src);
m_assembler.mfc1(dest, fpTempRegister);
return branch32(branchType == BranchIfTruncateFailed ? Equal : NotEqual, dest, TrustedImm32(0x7fffffff));
}
void truncateDoubleToInt32(FPRegisterID src, RegisterID dest)
{
m_assembler.truncwd(fpTempRegister, src);
m_assembler.mfc1(dest, fpTempRegister);
}
void truncateDoubleToUint32(FPRegisterID src, RegisterID dest)
{
m_assembler.truncwd(fpTempRegister, src);
m_assembler.mfc1(dest, fpTempRegister);
}
void branchConvertDoubleToInt32(FPRegisterID src, RegisterID dest, JumpList& failureCases, FPRegisterID fpTemp, bool negZeroCheck = true)
{
m_assembler.cvtwd(fpTempRegister, src);
m_assembler.mfc1(dest, fpTempRegister);
if (negZeroCheck)
failureCases.append(branch32(Equal, dest, MIPSRegisters::zero));
convertInt32ToDouble(dest, fpTemp);
failureCases.append(branchDouble(DoubleNotEqualOrUnordered, fpTemp, src));
}
Jump branchDoubleNonZero(FPRegisterID reg, FPRegisterID scratch)
{
m_assembler.vmov(scratch, MIPSRegisters::zero, MIPSRegisters::zero);
return branchDouble(DoubleNotEqual, reg, scratch);
}
Jump branchDoubleZeroOrNaN(FPRegisterID reg, FPRegisterID scratch)
{
m_assembler.vmov(scratch, MIPSRegisters::zero, MIPSRegisters::zero);
return branchDouble(DoubleEqualOrUnordered, reg, scratch);
}
static RelationalCondition invert(RelationalCondition cond)
{
RelationalCondition r;
if (cond == Equal)
r = NotEqual;
else if (cond == NotEqual)
r = Equal;
else if (cond == Above)
r = BelowOrEqual;
else if (cond == AboveOrEqual)
r = Below;
else if (cond == Below)
r = AboveOrEqual;
else if (cond == BelowOrEqual)
r = Above;
else if (cond == GreaterThan)
r = LessThanOrEqual;
else if (cond == GreaterThanOrEqual)
r = LessThan;
else if (cond == LessThan)
r = GreaterThanOrEqual;
else if (cond == LessThanOrEqual)
r = GreaterThan;
return r;
}
void nop()
{
m_assembler.nop();
}
void memoryFence()
{
m_assembler.sync();
}
void abortWithReason(AbortReason reason)
{
move(TrustedImm32(reason), dataTempRegister);
breakpoint();
}
void abortWithReason(AbortReason reason, intptr_t misc)
{
move(TrustedImm32(misc), immTempRegister);
abortWithReason(reason);
}
static FunctionPtr readCallTarget(CodeLocationCall call)
{
return FunctionPtr(reinterpret_cast<void(*)()>(MIPSAssembler::readCallTarget(call.dataLocation())));
}
static void replaceWithJump(CodeLocationLabel instructionStart, CodeLocationLabel destination)
{
MIPSAssembler::replaceWithJump(instructionStart.dataLocation(), destination.dataLocation());
}
static ptrdiff_t maxJumpReplacementSize()
{
MIPSAssembler::maxJumpReplacementSize();
return 0;
}
static bool canJumpReplacePatchableBranchPtrWithPatch() { return false; }
static bool canJumpReplacePatchableBranch32WithPatch() { return false; }
static CodeLocationLabel startOfPatchableBranch32WithPatchOnAddress(CodeLocationDataLabel32)
{
UNREACHABLE_FOR_PLATFORM();
return CodeLocationLabel();
}
static CodeLocationLabel startOfBranchPtrWithPatchOnRegister(CodeLocationDataLabelPtr label)
{
return label.labelAtOffset(0);
}
static void revertJumpReplacementToBranchPtrWithPatch(CodeLocationLabel instructionStart, RegisterID, void* initialValue)
{
MIPSAssembler::revertJumpToMove(instructionStart.dataLocation(), immTempRegister, reinterpret_cast<int>(initialValue) & 0xffff);
}
static CodeLocationLabel startOfPatchableBranchPtrWithPatchOnAddress(CodeLocationDataLabelPtr)
{
UNREACHABLE_FOR_PLATFORM();
return CodeLocationLabel();
}
static void revertJumpReplacementToPatchableBranch32WithPatch(CodeLocationLabel, Address, int32_t)
{
UNREACHABLE_FOR_PLATFORM();
}
static void revertJumpReplacementToPatchableBranchPtrWithPatch(CodeLocationLabel, Address, void*)
{
UNREACHABLE_FOR_PLATFORM();
}
static void repatchCall(CodeLocationCall call, CodeLocationLabel destination)
{
MIPSAssembler::relinkCall(call.dataLocation(), destination.executableAddress());
}
static void repatchCall(CodeLocationCall call, FunctionPtr destination)
{
MIPSAssembler::relinkCall(call.dataLocation(), destination.executableAddress());
}
private:
bool m_fixedWidth;
friend class LinkBuffer;
static void linkCall(void* code, Call call, FunctionPtr function)
{
if (call.isFlagSet(Call::Tail))
MIPSAssembler::linkJump(code, call.m_label, function.value());
else
MIPSAssembler::linkCall(code, call.m_label, function.value());
}
};
}
#endif // ENABLE(ASSEMBLER) && CPU(MIPS)
#endif // MacroAssemblerMIPS_h