DFGVirtualRegisterAllocationPhase.cpp [plain text]
#include "config.h"
#include "DFGVirtualRegisterAllocationPhase.h"
#if ENABLE(DFG_JIT)
#include "DFGGraph.h"
#include "DFGScoreBoard.h"
#include "JSCellInlines.h"
namespace JSC { namespace DFG {
class VirtualRegisterAllocationPhase : public Phase {
public:
VirtualRegisterAllocationPhase(Graph& graph)
: Phase(graph, "virtual register allocation")
{
}
bool run()
{
#if DFG_ENABLE(DEBUG_VERBOSE)
dataLogF("Preserved vars: ");
m_graph.m_preservedVars.dump(WTF::dataFile());
dataLogF("\n");
#endif
ScoreBoard scoreBoard(m_graph.m_preservedVars);
scoreBoard.assertClear();
#if DFG_ENABLE(DEBUG_PROPAGATION_VERBOSE)
bool needsNewLine = false;
#endif
for (size_t blockIndex = 0; blockIndex < m_graph.m_blocks.size(); ++blockIndex) {
BasicBlock* block = m_graph.m_blocks[blockIndex].get();
if (!block)
continue;
if (!block->isReachable)
continue;
for (size_t indexInBlock = 0; indexInBlock < block->size(); ++indexInBlock) {
Node* node = block->at(indexInBlock);
#if DFG_ENABLE(DEBUG_PROPAGATION_VERBOSE)
if (needsNewLine)
dataLogF("\n");
dataLogF(" @%u:", node->index());
needsNewLine = true;
#endif
if (!node->shouldGenerate())
continue;
switch (node->op()) {
case Phi:
case Flush:
case PhantomLocal:
continue;
case GetLocal:
ASSERT(!node->child1()->hasResult());
break;
default:
break;
}
if (node->flags() & NodeHasVarArgs) {
for (unsigned childIdx = node->firstChild(); childIdx < node->firstChild() + node->numChildren(); childIdx++)
scoreBoard.useIfHasResult(m_graph.m_varArgChildren[childIdx]);
} else {
scoreBoard.useIfHasResult(node->child1());
scoreBoard.useIfHasResult(node->child2());
scoreBoard.useIfHasResult(node->child3());
}
if (!node->hasResult())
continue;
VirtualRegister virtualRegister = scoreBoard.allocate();
#if DFG_ENABLE(DEBUG_PROPAGATION_VERBOSE)
dataLogF(
" Assigning virtual register %u to node %u.",
virtualRegister, node->index());
#endif
node->setVirtualRegister(virtualRegister);
if (node->mustGenerate())
scoreBoard.use(node);
}
scoreBoard.assertClear();
}
#if DFG_ENABLE(DEBUG_PROPAGATION_VERBOSE)
if (needsNewLine)
dataLogF("\n");
#endif
unsigned calleeRegisters = scoreBoard.highWatermark() + m_graph.m_parameterSlots;
size_t inlineCallFrameCount = codeBlock()->inlineCallFrames().size();
for (size_t i = 0; i < inlineCallFrameCount; i++) {
InlineCallFrame& inlineCallFrame = codeBlock()->inlineCallFrames()[i];
CodeBlock* codeBlock = baselineCodeBlockForInlineCallFrame(&inlineCallFrame);
unsigned requiredCalleeRegisters = inlineCallFrame.stackOffset + codeBlock->m_numCalleeRegisters;
if (requiredCalleeRegisters > calleeRegisters)
calleeRegisters = requiredCalleeRegisters;
}
if ((unsigned)codeBlock()->m_numCalleeRegisters < calleeRegisters)
codeBlock()->m_numCalleeRegisters = calleeRegisters;
#if DFG_ENABLE(DEBUG_VERBOSE)
dataLogF("Num callee registers: %u\n", calleeRegisters);
#endif
return true;
}
};
bool performVirtualRegisterAllocation(Graph& graph)
{
SamplingRegion samplingRegion("DFG Virtual Register Allocation Phase");
return runPhase<VirtualRegisterAllocationPhase>(graph);
}
} }
#endif // ENABLE(DFG_JIT)